REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 09-06-24 Thomas M. Hess B Update boilerplate to current MIL-PRF-38535 requirements. - PHN 15-09-28 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY Charles F. Saffle Original date of drawing CHECKED BY Charles F. Saffle YY-MM-DD APPROVED BY Thomas M. Hess 03-08-19 SIZE CODE IDENT. NO. A REV AMSC N/A DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO TITLE MICROCIRCUIT, DIGITAL, ADVANCED HIGH SPEED CMOS, QUADRUPLE 2-INPUT POSITIVE AND GATE WITH TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DWG NO. V62/03654 16236 B PAGE 1 OF 9 5962-V099-15 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance quadruple 2-input positive AND gate with TTL compatible inputs microcircuit, with an operating temperature range of -55°C to +125°C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/03654 - Drawing number 01 X E Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). Device type Generic 01 74AHCT08-EP Circuit function Quadruple 2-input positive AND gate with TTL compatible inputs 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins X Y 14 14 JEDEC PUB 95 Package style JEDEC MO-153 JEDEC MS-012 Plastic small-outline Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator A B C D E Z 1.3 Absolute maximum ratings. Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other 1/ Supply voltage range (VCC) ......................................................................................... Input voltage range (VI) ............................................................................................... Output voltage range (VO) ........................................................................................... Input clamp current (IIK) (VI < 0) .................................................................................. Output clamp current (IOK) (VO < 0 or VO > VCC) .......................................................... Continuous output current (IO) (VO = 0 to VCC) ............................................................ Continuous current through VCC or GND ..................................................................... Package thermal impedance (θJA): X package ............................................................................................................... Y package ............................................................................................................... Storage temperature range (TSTG)............................................................................... -0.5 V to +7.0 V -0.5 V to +7.0 V 2/ -0.5 V to VCC + 0.5 V -20 mA ±20 mA ±25 mA ±50 mA 2/ 113°C/W 3/ 86°C/W 3/ -65°C to +150°C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03654 PAGE 2 1.4 Recommended operating conditions. 1/ 2/ Supply voltage range (VCC) ......................................................................................... Minimum high level input voltage (VIH) ........................................................................ Maximum low level input voltage (VIL) ......................................................................... Input voltage range (VI) ............................................................................................... Output voltage range (VO) ........................................................................................... Maximum high level output current (IOH) ..................................................................... Maximum low level output current (IOL) ....................................................................... Maximum input transition rise or fall rate (∆t/∆v) ......................................................... Operating free-air temperature range (TA) .................................................................. 4.5 V to 5.5 V 2.0 V 0.8 V 0.0 V to 5.5 V 0.0 V to VCC -8.0 mA 8.0 mA 20 ns/V -55°C to +125°C 2. APPLICABLE DOCUMENTS JEDEC – SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 JESD51-7 – – Registered and Standard Outlines for Semiconductor Devices High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association, 3103 North 10th Street, Suite 240–S, Arlington, VA 22201-2107). 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Truth table. The truth table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 Timing waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. 1/ 2/ All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Use of this product beyond the manufacturers design rules or stated parameters is done at the user’s risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03654 PAGE 3 TABLE I. Electrical performance characteristics. 1/ Test High level output voltage VCC Temperature, TA IOH = -50 µA 4.5 V 25°C, -55°C to 125°C IOH = -8 mA 4.5 V 25°C IOL = 50 µA 4.5 V 25°C, -55°C to 125°C IOL = 8 mA 4.5 V 25°C -55°C to 125°C Symbol VOH Conditions Device type 01 Input current Quiescent supply current Quiescent supply current delta, TTL input levels VOL II ICC ∆ICC 2/ VI = 5.5 V or GND 0.0 V to 5.5 V 25°C Unit V 3.94 3.80 -55°C to 125°C Low level output voltage Limits Min Max 4.4 01 0.1 V 0.36 0.44 01 ±0.1 µA µA VI = VCC or GND IO = 0 A 5.5 V 25°C -55°C to 125°C 01 ±1.0 2.0 20.0 One input at 3.4 V. Other inputs at VCC or GND 5.5 V 25°C 01 1.35 mA 1.5 10 pF -55°C to 125°C Input capacitance CI VI = VCC or GND 5.0 V -55°C to 125°C 25°C 01 Power dissipation capacitance Cpd No load, 5.0 V 25°C 01 CL = 50 pF 5.0 V 25°C 01 0.8 V 25°C 25°C 01 01 -0.8 3/ 5.0 V 5.0 V 4.4 V V 2.0 f = 1 MHz Quiet output, maximum dynamic VOL VOL(P) Quiet output, minimum dynamic VOL Quiet output, minimum dynamic VOH VOL(V) VOH(V) High level dynamic input voltage VIH(D) 5.0 V 25°C 01 Low level dynamic input voltage Propagation delay time, A or B to Y VIL(D) tPLH, tPHL 5.0 V 4.5 V and 5.5 V 4.5 V and 5.5 V 25°C 25°C 01 01 CL = 15 pF See figure 5 CL = 50 pF See figure 5 1/ 2/ 3/ -55°C to 125°C pF V 0.8 6.9 1.0 -55°C to 125°C 25°C 18 TYP 01 V ns 8.0 7.9 1.0 9.0 Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC. Characteristics are for surface-mount packages only. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03654 PAGE 4 Case X Symbol A A1 b c D Millimeters Min Max Dimensions Inches Symbol Min Max --1.20 0.05 0.15 0.19 0.30 0.15 NOM 4.90 5.10 --.047 .002 .006 .007 .012 .006 NOM .193 .201 E E1 e L Millimeters Min Max Min Inches Max 4.30 4.50 6.20 6.60 0.65 NOM 0.50 0.75 .169 .177 .244 .260 .026 NOM .020 .030 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.15 mm. 3. Falls within JEDEC MO-153. 4. All linear dimensions are shown in millimeters (inches). Inches equivalents are given for general information only. FIGURE 1. Case outlines. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03654 PAGE 5 Case Y Symbol Millimeters Min Max Dimensions Inches Symbol Min Max A A1 b c D --1.75 0.10 0.25 0.35 0.51 0.20 NOM 8.55 8.75 --.069 .004 .010 .014 .020 .008 NOM .337 .344 E E1 e L Millimeters Min Max Inches Min Max 3.81 4.00 5.80 6.20 1.27 NOM 0.40 1.12 .150 .157 .228 .244 .050 NOM .016 .044 NOTES: 1. This drawing is subject to change without notice. 2. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inches (0.15 mm). 3. Falls within JEDEC MS-012. 4. All linear dimensions are shown in inches (millimeters). Metric equivalents are given for general information only. FIGURE 1. Case outlines - Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03654 PAGE 6 (each gate) Inputs A B Output Y H L X H X L H L L X = Immaterial FIGURE 2. Truth table. FIGURE 3. Logic diagram. Terminal number 1 2 3 4 5 6 7 Device type 01 Case outlines: X and Y Terminal Terminal symbol number 1A 8 1B 9 1Y 10 2A 11 2B 12 2Y 13 GND 14 Terminal symbol 3Y 3A 3B 4Y 4A 4B VCC FIGURE 4. Terminal connections. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03654 PAGE 7 Notes: 1. 2. 3. 4. 5. CL includes probe and jig capacitance. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50Ω, tr ≤ 3 ns, tf ≤ 3 ns. The outputs are measured one at a time with one input transition per measurement. For 3-state and Open Drain outputs tests: tPLH/tPHL S1 = Open tPLZ/tPZL S1 = VCC tPHZ/tPZH S1 = GND Open Drain S1 = VCC FIGURE 5. Timing waveforms and test circuit. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03654 PAGE 8 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/03654-01XE 01295 SN74AHCT08MPWREP AHT08EP V62/03654-01YE 01295 SN74AHCT08MDREP AHCT08MEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code 01295 DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Source of supply Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/03654 PAGE 9