IRF IRFZ48R

PD - 93958
IRFZ48R
HEXFET® Power MOSFET
Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Drop in Replacement of the IRFZ48
for Linear/Audio Applications
Description
l
D
VDSS = 60V
RDS(on) = 0.018Ω
G
ID = 50*A
S
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation levels
to approximately 50 watts. The low thermal resistance and
low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
Units
50*
50*
290
190
1.3
± 20
100
50
19
4.5
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
–––
0.50
–––
0.8
–––
62
°C/W
1
8/24/00
IRFZ48R
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
60
–––
–––
2.0
27
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.060
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
8.1
250
210
250
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
2400
1300
190
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.018
Ω
VGS = 10V, ID = 43A „
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 43A„
25
VDS = 60V, VGS = 0V
µA
250
VDS = 48V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
110
ID = 72A
29
nC VDS = 48V
36
VGS = 10V, See Fig. 6 and 13 „
–––
VDD = 30V
–––
ID = 72A
ns
–––
RG = 9.1Ω
–––
RD = 0.34Ω, See Fig. 10 „
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 50*
showing the
A
G
integral reverse
––– ––– 290
S
p-n junction diode.
––– ––– 2.0
V
TJ = 25°C, IS = 72A, VGS = 0V „
––– 120 180
ns
TJ = 25°C, IF = 72A
––– 0.50 0.80
µC di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
ƒ ISD ≤ 72A, di/dt ≤ 200A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
max. junction temperature. ( See fig. 11 )
‚ VDD = 25V, Starting TJ = 25°C, L = 22µH
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
RG = 25Ω, IAS = 72A. (See Figure 12)
* Current limited by the package, (Die Current = 72A)
2
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IRFZ48R
Fig 2. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 1. Typical Output Characteristics
2.5
ID = 72A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( ° C)
Fig 3. Typical Transfer Characteristics
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Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFZ48R
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R
ID , Drain Current (A)
DS(on)
100
10us
100us
1ms
10
10ms
TC = 25 ° C
TJ = 175 °C
Single Pulse
1
0.1
1
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
Fig 8. Maximum Safe Operating Area
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IRFZ48R
RD
VDS
80
LIMITED BY PACKAGE
VGS
D.U.T.
RG
+
V
DD
ID , Drain Current (A)
60
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
40
Fig 10a. Switching Time Test Circuit
VDS
20
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
td(on)
Fig 9. Maximum Drain Current Vs.
Case Temperature
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response(Z thJC )
1
D = 0.50
0.20
0.1
0.10
PDM
0.05
t1
0.02
0.01
0.01
0.00001
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x ZthJC + TC
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
L
VDS
D R IV E R
D .U .T
RG
+
- VD D
IA S
20V
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D S S
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
IRFZ48R
250
ID
29A
51A
BOTTOM 72A
TOP
200
150
100
50
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( ° C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
10 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
6
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFZ48R
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

•
•
•
•
RG
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRFZ48R
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
2.87 (.11 3)
2.62 (.10 3)
10.54 (.415)
10.29 (.405)
3.7 8 (.149 )
3.5 4 (.139 )
-A -
-B4.69 (.185 )
4.20 (.165 )
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.60 0)
14.84 (.58 4)
1.15 (.04 5)
M IN
1
2
14.09 (.55 5)
13.47 (.53 0)
4.06 (.160)
3.55 (.140)
3X
3X
LE A D A S S IG N M E N T S
1 - G ATE
2 - D R A IN
3 - SOURCE
4 - D R A IN
3
1 .40 (.0 55)
1 .15 (.0 45)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NO TES:
1 D IM E N S IO N IN G & T O LE R A N C IN G P E R A N S I Y 14.5M , 1 982.
2 C O N TR O LLIN G D IM E N S IO N : IN C H
3 O U T LIN E C O N F O R M S TO JE D E C O U T LIN E T O -2 20A B .
4 H E A T S IN K & LE A D M E A S U R E M E N T S D O N O T IN C LU D E B U R R S .
Part Marking Information
TO-220AB
E X A M P L E : TH IS IS A N IR F 1 0 1 0
W ITH A S S E M B L Y
LOT CO DE 9B1M
A
IN TE R N A T IO N A L
R E C T IF IE R
LO GO
ASSEMBLY
LOT CODE
PART NUMBER
IR F 1 0 1 0
9246
9B
1M
D A TE C O D E
(Y Y W W )
YY = YEAR
W W = W EEK
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Data and specifications subject to change without notice. 8/00
8
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