Data Sheet No. PD94262 IRU3055 5-BIT PROGRAMMABLE 3-PHASE SYNCHRONOUS BUCK CONTROLLER IC PRELIMINARY DATA SHEET TEST SPEC FEATURES DESCRIPTION Meets VRM 9.0 Specification 3-Phase Controller with On-Board MOSFET Driver On-Board DAC programs the output voltage from 1.075V to 1.850V Loss-less Short Circuit Protection Programmable Frequency Synchronous operation allows maximum efficiency Minimum Part Count Soft-Start Power Good Function Hiccup Mode Current Limit The IRU3055 is a 3-phase synchronous Buck controller which provides high performance DC to DC converter for high current applications. The IRU3055 controller IC is specifically designed to meet Intel and AMD specifications for the new microprocessor requiring low voltage and high current. The IRU3055 features under-voltage lockout for both 5V and 12V supplies, an external and programmable softstart function as well as programming the oscillator frequency by using an external resistor. APPLICATIONS Intel Pentium 4 and AMD K7 TYPICAL APPLICATION VCH3 Vcc C5 1uF VCH12 5V C3 1uF D1 C1 1uF C2 0.1uF V CL1 V CL23 HDrv1 12V L1 1uH Q1 IRF3704S R1 C4 1000uF C6 6x 1500uF OCSet L2 2.2K Ref Q2 IRF3711S LDrv1 PGnd1/ OCGnd Rt 1uH R2 1.5K C8 1uF CS1 SS C9 1uF R3 47K C10 0.1uF HDrv2 Q3 IRF3704S LDrv2 Q4 IRF3711S IRU3055 D4 PGnd2 L3 1uH R4 1.5K D3 C11 CS2 1uF D2 HDrv3 Q5 IRF3704S LDrv3 Q6 IRF3711S D1 D0 C12 R6 22nF 27K PGnd3 Comp L4 1uH R5 1.5K C13 CS3 C7 100pF (Optional) 1.5V / 60A 1uF Fb C14 8x 2700uF Figure 1 - Typical application of IRU3055. PACKAGE ORDER INFORMATION TA (8C) 0 To 70 Rev. 1.4 08/13/02 DEVICE IRU3055CQ PACKAGE 36-Pin Plastic QSOP WB (Q) www.irf.com 1 IRU3055 ABSOLUTE MAXIMUM RATINGS VCH12 and VCH3 Supply Voltage ................................... 30V (not rated for inductor load) VCL1 and VCL23 Supply Voltage ................................... 20V VCC Supply Voltage .................................................. 7V Storage Temperature Range ...................................... -65°C To 150°C Operating Junction Temperature Range ..................... 0°C To 125°C PACKAGE INFORMATION 36-PIN WIDE BODY PLASTIC QSOP (Q) Rt 36 VCL1 1 Comp 2 35 LDrv1 Fb 3 34 PGnd1 SS 4 33 OCGnd CS1 5 32 HDrv1 CS2 6 31 VCH12 CS3 7 30 HDrv2 Vcc 8 29 NC V SET 9 28 Gnd D0 10 27 PGnd2 D1 11 26 LDrv2 D2 12 25 VCL23 D3 13 24 LDrv3 D4 14 23 PGnd3 Fault 15 22 HDrv3 21 VCH3 OCSet 16 Gnd 17 20 Ref SD 18 19 PGood uJA =608C/W ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over VCL1=VCL23=VCH12=VCH3=12V, Vcc=5V and TA=0 to 70°C. Typical values refer to TA=25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. PARAMETER Supply Current Section Operating Supply Current VID Section DAC Output Voltage (Note 1) DAC Output Line Regulation DAC Output Temp Variation VID Input LO VID Input HI VID Input Internal Pull-Up Resistor to 3.3V 2 SYM TEST CONDITION MIN TYP MAX UNITS ICC ICLH CL High Side=3000pF CL Low Side=6000pF V5 V12 (150KHz frequency) 17 30 19 50 21 70 mA -1.5 -0.7 Vs -0.06 1.4 +1.5 +0.7 2 0.4 16.4 20.4 VDAC LREG TREG 4.5 < Vcc < 5.5V 08C < temp < 708C 2 12.4 VIDR www.irf.com % % % V V KV Rev. 1.4 08/13/02 IRU3055 PARAMETER SYM Power Good Section Under-Voltage Lower Trip Point PGUVL Under-Voltage Upper Trip Point PGUVH UV Hysteresis PGHYST Over-Voltage Upper Trip Point OVL Over-Voltage Lower Trip Point OVH OV Hysteresis OVHYST Power Good Output LO PGL Power Good Output HI PGH UVLO Threshold - 5V UVLO5UP UVLO Hysteresis - 5V UVLO5HYST UVLO Threshold - 12V UVLO12UP UVLO Hysteresis - 12V UVLO12HYST Over-Voltage Section OVP Threshold OVPTH Error Amp Section Transconductance gm Input Bias Current IBERR Input Offset Voltage VOSERR Current Sense Section Input Bias Current IBCS Input Offset Voltage VOSCS CS Matching CS MATCH Current Limit Section OC Threshold Set Current IBOC OC Comp Offset Voltage VOSOC Hiccup Duty Cycle HIC Soft-Start Section Charge Current ISS Output Drivers Section Rise Time TRL TRH Fall Time TFL TFH Dead Band DB LH DB HL Oscillator Section Osc Frequency per Phase PWM Ramping Voltage Duty cycle Matching TEST CONDITION VOUT Ramping Down VOUT Ramping Up VOUT Ramping Up VOUT Ramping Down RL=3mA RL=5K Pull-Up to 5V Supply Ramping Up Supply Ramping Down Supply Ramping Up Supply Ramping Down Fault Pin CS1, CS2, CS3 Fb to VSET MIN TYP MAX UNITS 0.88Vs 0.89Vs 0.001Vs 1.10Vs 1.09Vs 0.001Vs 0 4.8 4.2 0.22 10.2 0.5 0.90Vs 0.91Vs 0.01Vs 1.11Vs 1.10Vs 0.01Vs 0.04 4.9 4.34 0.32 10.5 0.7 0.92Vs 0.93Vs 0.02Vs 1.12Vs 1.11Vs 0.02Vs 0.4 5 4.5 0.42 10.8 0.9 V V V V V V V V V V V V 1.1Vs 1.15Vs 1.2Vs V 0.5 720 2.5 3 5 6 mmho mA mV 0.9 2 2 4 4 mA mV mV CS1, CS2, CS3 CS1 to CS2, CS1 to CS3 Difference between any CS 120 -8 1 160 -3 2.4 200 +2 mA mV % Soft-Start @ 0V 7 10 13 mA CL High Side=3000pF, CL Low Side=6000pF CL High Side=3000pF, CL Low Side=6000pF CL High Side=3000pF, CL Low Side=6000pF, (Both Measured @ 10%) 25 50 75 ns 25 50 75 ns OCSet @ 0V OCSet @ OC Threshold Css=0.1uF fOSC Rt = 50KV VOSC Peak to Peak OSCMATCH LDrv or HDrv 130 100 1.98 150 2.02 0.03 ns 200 2.06 KHz V % Note 1: Vs refers to the set point voltage given in Table 1 Rev. 1.4 08/13/02 www.irf.com 3 IRU3055 D4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Vs 1.075 1.100 1.125 1.150 1.175 1.200 1.225 1.250 1.275 1.300 1.325 1.350 1.375 1.400 1.425 1.450 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Vs 1.475 1.500 1.525 1.550 1.575 1.600 1.625 1.650 1.675 1.700 1.725 1.750 1.475 1.800 1.825 1.850 Table 1 - Set point voltage (Vs) vs. VID codes. PIN DESCRIPTIONS PIN# 1 PIN SYMBOL Rt 2 3 Comp Fb 4 SS 5 6 7 8 9 10 CS1 CS2 CS3 Vcc VSET D0 11 D1 12 D2 13 D3 14 D4 4 PIN DESCRIPTION This pin programs the oscillator frequency in the range of 50KHz to 500KHz with an external resistor connected from this pin to the ground. Compensation for error amplifier. This pin is connected directly to the output of the Core supply to provide feedback to the Error amplifier. This pin provides the soft-start for the switching regulator. An internal current source charges an external capacitor that is connected from this pin to the ground which ramps up the outputs of the switching regulator, preventing the outputs from overshooting as well as limiting the input current. The second function of the Soft-Start cap is to provide long off time (HICCUP) for the synchronous MOSFET during current limiting. Current sense feedback for channel 1, 2, 3. 5V supply voltage. Output of the DAC. LSB input to the DAC that programs the output voltage. This pin is internally connected to 3.3V by a 16K resistor. This pin can be pulled up externally by a 10K resistor to 5V supply. This pin programs the output voltage in 25mV steps based on the VID table. Input to the DAC that programs the output voltage. This pin is internally connected to 3.3V by a 16K resistor. This pin can be pulled up externally by a 10K resistor to 5V supply. Input to the DAC that programs the output voltage. This pin is internally connected to 3.3V by a 16K resistor. This pin can be pulled up externally by a 10K resistor to 5V supply. Input to the DAC that programs the output voltage. This pin is internally connected to 3.3V by a 16K resistor. This pin can be pulled up externally by a 10K resistor to 5V supply. MSB input to the DAC that programs the output voltage. This pin is internally connected to 3.3V by a 16K resistor. This pin can be pulled up externally by a 10K resistor to 5V supply. www.irf.com Rev. 1.4 08/13/02 IRU3055 PIN# 15 PIN SYMBOL Fault 16 OCSet 17 28 18 19 Gnd SD PGood 20 21 31 22 30 32 23 27 34 24 26 35 25 36 Ref VCH3 VCH12 HDrv3 HDrv2 HDrv1 PGnd3 PGnd2 PGnd1 LDrv3 LDrv2 LDrv1 VCL23 VCL1 29 33 NC OCGnd Rev. 1.4 08/13/02 PIN DESCRIPTION Fault detector. When the output exceeds the OVP trip point, the fault pin switches to 2.8V and pulls down the soft-start. This pin is connected to the drain of the synchronous MOSFET in channel 1 of the Core supply and it provides the positive sensing for the internal current sensing circuitry. An external resistor programs the over current threshold depending on the RDS(ON) of the power MOSFET. Analog ground for internal reference and control circuitry. Connect to PGnd with a short trace. Shut down pin. Pulling-up this pin disables the outputs. Power good pin. This pin is a collector output that switches Low when the output of the converter is not within 610%(typ) of the nominal output voltage. 2V reference output. These pins power the high side MOSFET driver. A minmum 1mF ceramic cap must be connected from these pins to ground to provide peak drive current capability. Output drivers for the high side power MOSFET. These pins serve as the ground pins and must be connected directly to the ground plane. A high frequency capacitor (0.1 to 1mF) must be connected from pins VCL1, VCL23 and VCH3, VCH12 to PGnd1, 2 and 3 for noise free operation. Output driver for the synchronous power MOSFET. These pins are connected to the 12V supply and serves as the power Vcc pin for the low side output drivers. A high frequency capacitor (0.1 to 1mF) must be connected directly from these pins to PGnd1, PGnd2 and PGnd3 pins in order to supply the peak current to the power MOSFET during the transitions. No connection. This pin is connected from the source of the synchronous MOSFET in channal 1 of the Core supply and it provides the reference point for the internal current sensing circuitry. www.irf.com 5 IRU3055 BLOCK DIAGRAM 160uA 16 OCSet 10uA 33 OCGnd SS 4 31 V CH12 Comp 2 Master Error Amp Fb 32 HDrv1 3 S P1 PWM Comp VSET 9 Q P1 Ramp SD 36 V CL1 R SD D0 10 P1 PWM Latch Reset Dom VSET D1 11 D2 12 35 LDrv1 P1 Set 5-Bit DAC 3-Phase Oscillator P1 Ramp P2 Set 34 PGnd1 P2 Ramp P3 Set P3 Ramp D3 13 D4 14 Rt 30 HDrv2 S 1 P2 PWM Comp P2 Duty Cycle Adj 5 CS2 6 CS3 7 Vcc 8 SD 26 LDrv2 27 PGnd2 Chip Power 21 PGood / OVP S PGood 19 P3 PWM Comp P3 Duty Cycle Adj Q P3 Ramp SD R 2V Reference P3 PWM Latch Reset Dom Gnd 17 Gnd 28 NC V CH3 22 HDrv3 Fault 15 Ref 20 25 V CL23 R P2 PWM Latch Reset Dom OVP Out CS1 Q P2 Ramp 24 LDrv3 23 PGnd3 29 SD 18 Shut Down SD Figure 2 - Simplified block diagram of the IRU3055. 6 www.irf.com Rev. 1.4 08/13/02 IRU3055 TYPICAL APPLICATION (1) VCH3 Vcc C5 1uF VCH12 5V C3 1uF D1 C1 1uF C2 0.1uF V CL1 V CL23 HDrv1 12V L1 1uH Q1 IRF3704S R1 C4 1000uF C6 6x 1500uF OCSet L2 2.2K Ref Q2 IRF3711S LDrv1 Rt PGnd1/ OCGnd 1uH R2 1.5K C8 CS1 SS C9 1uF R3 47K C10 0.1uF 1uF Q3 IRF3704S HDrv2 IRU3055 Q4 IRF3711S LDrv2 D4 PGnd2 L3 1uH R4 1.5K D3 C11 CS2 1uF D2 Q5 IRF3704S HDrv3 D1 D0 C12 R6 22nF 27K Q6 IRF3711S LDrv3 PGnd3 L4 1uH R5 1.5K Comp C7 100pF (Optional) 1.5V / 60A C13 CS3 1uF Fb C14 8x 2700uF Figure 3 - Typical application of IRU3055. Parts List Ref Desig Q1,Q3,Q5 Q2,Q4,Q6 U1 D1 L1 L2,L3,L4 Description MOSFET MOSFET Controller Schottky Diode Inductor Inductor C1 Cap, Ceramic C2,C10 Cap, Ceramic C3,C5,C9, Cap, Ceramic C8,C11,C13 C4 Cap,Electrolytic C6 Cap,Electrolytic C7 Cap (Optional) C12 Cap, Ceramic C14 Cap,Electrolytic R1 Resistor R2,R4,R5 Resistor R3 Resistor R6 Resistor Rev. 1.4 08/13/02 Value Qty Part# 20V, 9mV 3 IRF3704S 20V, 6mV 3 IRF3711S Synchronous PWM 1 IRU3055 In Series 1 BAT54S 1mH 1 Z9479-A 1mH 3 T60-18 Core, 6-turns #14 AWG wire 1mF, X7R, 25V 1 ECJ-3YB1E105K 0.1mF, Y5V, 25V 2 ECJ-2VF1E104Z 1mF, Y5V, 16V 6 ECJ-3VF1C105Z 1000mF, 16V 1500mF, 16V 100pF, X7R, 50V 22nF, X7R, 50V 2700mF,6.3V,13mV 2.2K, 1% 1.5K, 1% 47K, 1% 27K, 1% 1 6 1 1 8 1 3 1 1 EEU-FJ1C152U ECU-V1H101KBN ECU-V1H223KBG EEU-FJ0J272U www.irf.com Manuf IR IR IR IR Coilcraft Web site (www.) irf.com coilcraft.com Panosonic maco.panasonic.co.jp Panosonic Panosonic Any Panosonic maco.panasonic.co.jp Panosonic Panosonic Panosonic Any Any Any Any 7 IRU3055 APPLICATION INFORMATION Constant Switching Frequency 3-Phase Controller IRU3055 is a 3-phase buck converter controller. For high current applications, multiple converters are usually connected in parallel to reduce the power capability for each individual converter as well as alleviate the thermal stress on each of the power devices. These individual converters share a common output, but may have different input sources. Each individual converter operates at the same switching frequency but at a different phase. As a result, the effective input current and output current ripple are much smaller compared with a single-phase converter. Another benefit will be faster dynamic load responses. Output Current Ripple Reduction The block diagram of IRU3055 is shown in Figure 2. The 3-phase oscillator provides a constant frequency and the three PWMs ramp signals with 120 degree phase shift. The three comparators and three PWM latches will generate three PWM outputs to the drivers which are built inside the IC. A typical 3-phase PWM signal is shown in Figure 4. Figure 5 - Output inductor currents and output capacitor ripple current. 1 0.9 Single phase 0.8 0.7 0.6 0.5 Two phase 0.4 0.3 Three phase 0.2 0.1 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 D Figure 6 - Normalized output current across output capacitor. (Peak to peak current normalized to the Vo/(L3Fs)). Figure 4 - The 3-phase PWM signal. Voltage and Current Loop IRU3055 has three transconductance error amplifiers. The master Error amplifier is used to regulate the output voltage. The output voltage can connect directly, or through a resistor divider, to the Fb pin of the error amplifier. The compensation network at the output of the amplifier (Comp Pin) helps to stabilize the voltage loop. The non-inverting pin of the master amplifier is connected to the output of the DAC which interfaces with the micro processor core and determines the desired output voltage. Two additional transconductance amplifiers are used to balance the output inductor current among 3-phases. 8 One of advantages of the multi-phase converter is that the output current ripple is significantly reduced. The current from multiple converters tend to cancel each other so that the total output current flowing into the output capacitor is reduced. In this case, the output inductor in each individual buck converter can be selected smaller to improve the load transient response without sacrificing the output current ripple. Figure 5 shows a 3phase inductor current and current ripple in the capacitor for 12V input 1.5V, 50A, 3-phase buck converter. The effective output ripple has three times frequency and a smaller amplitude compared with each individual converter. Figure 6 indicates the total ripple current, as a function of duty cycle, normalized to the parameter Vo/ (L3Fs) at zero duty cycle. www.irf.com Rev. 1.4 08/13/02 IRU3055 It is shown that the output current ripple is greatly reduced by multi-phase operation. At the certain duty cycle D=1/m, where m is the phase number, the output ripple will be near zero due to complete cancelation of inductor current ripple. The optimum number of phases exists for different applications. Output Inductor Current Sensing Through an internal resistor, there will be an additional voltage drop above the node Comp and then the voltage sent to the PWM comparator will be higher and the generated duty cycle for phase-2 will be larger. As a result, the inductor (L2) current will go up until the current balance is achieved. For accurate current sharing, the current sense from each inductor should be as symmetrical as possible. The layout is critical and the layout of the RC network should be as follows: IRU3055 P1 Ramp Comp Master Error Amp P2 Ramp V SET L1 Fb R1 RL1 VOUT C1 CS1 CS2 L2 RL2 P2 Duty Cycle Adj R2 C2 Figure 7 - Loss-less inductive current sensing and current sharing. The loss-less sensing current is achieved by sensing the voltage across the inductor. In Figure 7, L1 and L2 are inductors. RL1 and RL2 are inherent inductor resistance. The resistor R1 and capacitor C1 are used to sense the average inductor current. The voltage across the capacitors C1 and C2 represent the average current flowing into resistance RL1 and RL2. The time constant of the RC network should be equal or at most three times larger than the time constant L/RL. R13C1=(1~3)3 L RL ---(1) In order to minimize the effect of the bias current in IRU3055, the sensing resistor should be as small as possible. However, a small resistor will result in high power dissipation and a high value capacitor, a trade off has to be chosen. Typically, a 1mF ceramic capacitor is a good start. In the Application Circuit (1), L=1mH and RL=1.6mV. The sensing resistor and capacitor is chosen as: Connect the node from Resistor R1 (or R2) directly to the pad of inductor. Connect the other node of capacitor C1 and C2 together and connect to the output voltage terminal. In this case, the voltage at node C1 and C2 will have a common reference voltage that is output voltage. If the inductor inherent resistance as well as PCB trace are almost identical or symmetrical, almost perfect current sharing can be obtained. The PCB connection from three inductors to the output capacitor should have the same length and width. The feedback point from the output should be located such that the effect impedances from the three inductors to the output feedback sensing point are almost symmetrical or identical so that the noise will cancel each other. The current sharing accuracy is dependent upon the mismatch among the values of current sensing components and the current amplifier offset. It is recommended that all the inductors be from the same manufacturer and also be the same model so that mismatch will be minimized and the cost reduced. In most cases, with a good layout, the difference between 3-channel currents can be limited to be below 2A. Operation of IRU3055 Over Current Protection The IRU3055 senses the MOSFET switching current to achieve the over current protection. The diagram is shown in Figure 8. A resistor (RSET) is connected between pin OCSet and the drain of the low side MOSFET for phase1. Inside the IC, there is an internal 160mA current source connected to OCSet pin. When the upper switch is turned off, the inductor current flows through the low side switch. The voltage at OCSet pin is given as: VOCSet = 160mA3RSET - RDS(ON)3iL1 R1= 1.5K and C1= 1mF 10uA The voltage across the sensing capacitors are sent to the pins CS1 and CS2. Suppose the inductor current in the inductor L2 is smaller than in inductor L1 and the voltage across capacitor C1 will be greater than that across C2. The transconductance amplifier in IRU3055 will generate a positive current flowing into node Comp. Rev. 1.4 08/13/02 SS 160uA IRU3055 RSET Hiccup Logic ---(2) L1 VOUT OCSet OCGnd Phase 1 Figure 8 - Diagram of the over current sensing. www.irf.com 9 IRU3055 When the inductor current is large enough, the voltage across the low side switch is low enough so that the voltage at OCSet node is below zero and the comparator will flip and trigger a switch to discharge the soft-start capacitor at a certain slope rate. The system enters into a hiccup mode. The over current threshold can be set by resistor RSET. Suppose the current sharing is perfect, then the current flowing into phase 1 will be one third of the total output current. The maximum allowed output current can be represented as: IMAX = 160mA 3 RSET / (RDS(ON)/3) RSET = IMAX3RDS(ON)/3/160mA ---(3) Where RDS(ON) is the ON resistance of low side MOSFET. In practice, the RDS(ON) of MOSFET is temperature dependent. The overhead has to be considered. For practice, over current threshold has to be at least 50% higher than the nominal current plus ripple. In the demo-board, the maximum output current is set to be: IMAX = (1+50%)3IOUT = 1.5360A = 90A Consider ripple current, select IMAX=100A For each phase, the maximum current is one third (33A), assuming good current sharing. The low side of MOSFET is IRF3711S. The On resistor at 150 degrees is given from the data sheet: RDS(ON) = 1.536mV = 9mV Over Voltage Protection The Fb pin is connected to the output voltage. An overvoltage condition is detected when the voltage at Fb pin is 15% higher than the programmed voltage by DAC. When the overvoltage occurs, the soft-start capacitor is discharged. The high side MOSFETs are turned off and the low side MOSFETs are turned on. As a result, the low side MOSFET of synchronous rectifier conduct and shunt the output voltage to ground and protect the load. In the meantime, the PGood pin is held to low. Soft-Start The IRU3055 has a soft-start function to limit the current surge at the start-up. An external capacitor which is charged by a 10mA internal current source is used to program the soft-start timing. The voltage of the external capacitor linearly increases, which forces the output voltage to go up linearly until the voltage at soft-start reaches the desired voltage. The following equation can be used to calculate the start up time. 10mA3tSTART/Css = VSET+0.7V tSTART = (V SET+0.7V)3Css/10mA ---(4) Where: Css is the soft-start capacitor (mF). VSET is the voltage from DAC and equal to the desired output voltage. For a 7.5ms start-up time and 1.5V output, the required capacitor will be 33nF. The over current setting resistor can be set as RSET = 33A 3 0.009/160mA = 1.86K Operation Frequency Selection The operation switching frequency is determined by an external resistor (Rt). The switching frequency is approximately inversely proportioned to resistance (see Fig.10). The switching frequency can also be estimated by: Select RSET = 2.2K Fs ≅ 7500/Rt ---(5) Where Rt is in KV and Fs is in KHz. For example, if the 150KHz switching frequency is selected, the required Rt is calculated as: Rt ≅ 7500/150 = 50KV Frequency versus Rt Figure 9 - Operation waveforms at short circuit. (Hiccup mode) Ch1: Input current, 5A/div. Ch2: Phase 1 inductor current, 10A/div. Ch3: Soft-start capacitor voltage, 5V/div. Ch4: Output voltage, 2V/div. 10 www.irf.com Frequency(KHz) 500 400 300 200 100 0 0 10 Rt(KV ) 20 30 40 50 60 70 frequency Figure 10 - The operation frequency vs. Rt. Rev. 1.4 08/13/02 IRU3055 Synchronous-Rectifier Driver Component Selection Guide Output Inductor Selection The inductor is selected based on the inductor current ripple, operation frequency and efficiency consideration. In general, a large inductor results in small output ripple and higher efficiency but big size. A small value inductor causes large current ripple and poor efficiency but small size. Generally, the inductor is selected based on the output current ripple. The optimum point is usually found between 20% and 50% ripple of output inductor current. For each phase synchronous buck converter, the output peak-to-peak current ripple is given by: VC1 C1 VCH12 C2 C3 VIN VCH3 IRU3055 L1 Phase 1 Di(PEAK - PEAK) = (V IN-V OUT)3VOUT/(L3Fs3VIN) ---(6) Figure 11 - Supply VCH12, VCH3 with charge bump configuration. Synchronous rectification reduces conduction losses in the rectifier by shunting the normal Schottky diode or MOSFET body diode with a low on-resistance MOSFET switch. The synchronous rectification also ensures good transient dynamic. For IRU3055, the 3-phase synchronous rectifier MOSFET drivers are built inside. To drive the high-side MOSFET, it is necessary to supply a gate voltage at least 4V greater than the bus voltage. In IRU3055, the driver supply voltage for high side MOSFET driver is supplied through the VCH12 and VCH3 pins. If the input voltage for DC-DC converter is 5V, the VCH12 and VCH3 pins can be connected to 12V or supplied by using charge pump configuration as shown in Figure 11. If the voltage Vc1 and VIN in Figure 11 is connected to input voltage 12V, the voltage at V CH12 and VCH3 pins are charged up to almost twice the input voltage. The high side driver can be enabled. A capacitor in the range of 0.1mF to 1mF is generally adequate for capacitor C2. For high current applications, a large ceramic capacitor such as 2.2mF is recommended. The diode can be a Schottky diode such as BAT54S. With the charge bump configuration, shown in Figure 11, the voltage at pins VCH12 and VCH3 can be boosted up. When the low side MOSFET is on, the capacitor C2 is charged to voltage Vc1. When the high side MOSFET is ON, the energy in the capacitor C2 is discharged to the bypass capacitor C1 next to pins VCH12 and VCH3. The voltage at VCH12 and VCH3 pins is approximately the sum of the voltage Vc1 and VIN. The high side driver signal should be at least 4V higher than the input voltage (V IN). The voltage Vc1 has to be 5V or higher. For the demo-board, Vc1 is equal to input voltage (V IN=12V). If the low power dissipation of IC is preferred, especially at higher frequency, Vc1 can be connected to 5V instead. Rev. 1.4 08/13/02 Assuming the output current is evenly distributed in each phase, we can define the ratio of the ripple current and nominal output current as: LIR = Di(PEAK - PEAK) / IOUT / m Where LIR is typically between 20% to 50% and m is the phase number. In this case m=3. Then the inductor can be selected by: L>VOUT3(V IN-V OUT)/(Fs3VIN3LIR3IOUT/m) ---(7) For example, in the application circuit, the ripple is selected as LIR=40%, the inductor is selected as: L>1.53(12-1.5)/(150K312340%360A/3)=1.1mH Select L=1mH The RMS current of the inductor will be approximately equal to average current: IOUT/m = 60/3 = 20A. The peak inductor current is about: IL(PEAK) = (1+LIR/2)3IOUT/m = 1.2320 = 24A Output capacitor selection The voltage rating of the output capacitor is the same as output voltage. Typical available capacitors on the market are electrolytic, tantalum and ceramic. If electrolytic or tantalum capacitors are employed, the criteria is normally based on the value of Effective Series Resistance (ESR) of total output capacitor. In most cases, the ESR of the output capacitor is calculated based on the following relationship: ESR < DV/Di ---(8) Where DV is the maximum allowed output voltage drop during the transient and Di is the maximum output current variation. In the worst case, Di is the maximum output current minus zero. www.irf.com 11 IRU3055 Power MOSFET Selection The IRU3055 is a controller for 3-phase synchronous buck converter. For each phase, the average inductor current will be one third of the total output current in an ideal case, which will greatly alleviate the thermal management for power switch. In general, the MOSFET selection criteria depends on the maximum drain-source voltage, RMS current and ON resistance (RDS(ON)). For both high side and low side MOSFET, a drain-source voltage rating higher than maximum input voltage is necessary. In the demo-board, 20V rating should be satisfied. The gate drive requirement for each MOSFET is almost the same. If logic-level MOSFET is used, some caution should be taken with devices at very low VGS to prevent undesired turn-on of the complementary MOSFET, which results a shoot-through circuit. Where q is the temperature coefficient of ON resistor of MOSFET RDS(ON) and can be found in MOSFET data sheet (typically between 1 and 2). If output inductor current ripple is neglected, the RMS current of high side switch is given by: The switching loss for MOSFET is more difficult to calculate due to effect of the parasitic components, etc. The switching loss can be estimated by the following equation: IRMS(HI) = D3IOUT/m IRMS(HI) = (V OUT/VIN)3IOUT/m ---(9) (1 - D)3IOUT/m IRMS(LO) = (1 - VOUT/VIN)3IOUT/m In the demo board, RMS current of high side switch is: IRMS(HI) = (1.5/12)360/3 = 7.1A RMS current of low side switch is: IRMS(LO) = RDS(ON) = 9mV q = 1.5 @ 1508C The conduction loss for high side MOSFET is given as: PCON(HI) =9mV31.53(60/3)3(60/3)31.5/12=0.68W Low side switch is configured with one IRF3711 with 6mV RDS(ON). The conduction loss is calculated as: PCON(LO) = 6mV31.53(60/3)3(60/3)3(1-1.5/12) PCON(LO) = 3.15W PSW = VDS(OFF)3(tr+tf)3FS3ISW/2 The RMS current of low side switch is given as: IRMS(LO) = In this example, the MOSFET IRF3704S is chosen to be the high side switch with: (1 - 1.5/12)360/3 = 18.7A For RDS(ON) of MOSFET, it should be as small as possible in order to get highest efficiency. The MOSFET from International rectifier IRF3704S with a RDS(ON)=9mV, 20V drain source voltage rating and 77A ID is selected for high side MOSFET. For a high input and low output case, the low side switch conducts most of output current and handles most of the thermal management. Two MOSFETs can be put in parallel to further reduce the effect RDS(ON) and conduction losses. In the demo-board, MOSFET from International Rectifier IRF3711S with RDS(ON)=6mV, 20V V DS and 110A ID is selected as synchronous MOSFET. The power dissipation includes conduction loss and switching loss. The conduction loss for high side switch in each phase can be estimated by the following equation: PCON(HI) = RDS(ON)3q3(IOUT/m)3(IOUT/m)3(V OUT/VIN) The low side switch power dissipation is: Where: VDS(OFF) is the Drain to Source voltage when switch is turned off. tr is the rising time. tf is the fall time. FS is the switching frequency. ISW is the current in MOSFET when MOSFET is turned off. It can be estimated by: ISW = ILOAD /m + half of the ripple current In this example, for low side MOSFET, the body diode is turned on before MOSFET is on. Therefore, the switching losses for low side MOSFET is almost zero due to zero voltage switching. For high side MOSFET, from data sheet, we have: tr = 50ns tf = 50ns Select FS = 150KHz VDS(OFF) = 12V ISW = Peak Inductor Current = 24A PSW(HI) = 12V3(50ns+50ns)3150KHz324A/2 PSW(HI) = 2.1W The total power dissipation is: PD(HI) = PCON(HI) +PSW(HI) PD(HI) = 0.68W+2.16W = 2.84W PD(LO) ≅ PCON(LO) = 3.15W PCON(LO) =RDS(ON)3q3(IOUT/m)3(IOUT/m)3(1-V OUT/VIN) 12 www.irf.com Rev. 1.4 08/13/02 IRU3055 Heat Sink Selection The criteria of selecting heat sink is based on the maximum allowable junction temperature of the MOSFETs. That is: TA + PD3(RuJC+RuCS+RuSA) < TJ(MAX) Where: TA = The Ambient Temperature PD = Power Dissipation of each MOSFET RuJC = The Thermal Resistance from junction to case RuCS = the thermal resistance from case to heat sink RuSA = the heat-sink-to-air thermal resistance TJ(MAX) = maximum allowable junction temperature of MOSFET, for example 1508C. Input Filter Selection 0.5 IRMS(IN) IOUT 0.1 0 For MOSFET IRF3704S with D2 package, RuJA = 408C/ W. Assume ambient temperature is TA=358C. For high side MOSFET, the junction temperature is given as: 358C + 2.84W3408C/W = 1498C For low side MOSFET, IRF3711s, the maximum junction temperature can be calculated as: 358C + 3.15W3408C/W = 1618C This is the worst case. For conservative consideration, two IRF3711 can be put in parallel. ThreePhase 0 0.1 0.2 0.3 0.4 0.5 D Figure 12 - Normalized input RMS current vs. duty cycle. RuSA < (TJ(MAX) -TA)/PD-RuJC+RuCS Where RuJA is the junction-to-ambient thermal resistance with MOSFET on 1" square PCB board and it is available from MOSFET data sheet. TwoPhase 0.3 0.2 The maximum heat-sink-to-air thermal resistance is calculated as: In this example, the MOSFET is mounted in the PCB board with more than 1" square PCB board. Therefore, the junction temperature for MOSFET can be calculated as: TJ = TA + P D3RuJA SinglePhase 0.4 The selection criteria of input capacitor are voltage rating and the RMS current rating. For conservative consideration, the capacitor voltage rating should be 1.5 times higher than the maximum input voltage. The RMS current rating of the input capacitor for multi-phase converter can be estimated from the above Figure 12. First, determine the duty cycle of the converter (V O/VIN). The ratio of input RMS current over output current can be obtained. Then the total input RMS current can be calculated. From this figure, it is obvious that a multiphase converter can have a much smaller input RMS current, which results in a lower amount of input capacitors that are required. For high current applications, multiple bulk input capacitors in parallel may be necessary. Some electrolytic capacitors, such as Panasonic HFQ series, Sanyo MVWX or equivalent may be put in parallel to provide a large current. In addition, ceramic bypass capacitors for high frequency de-coupling are recommended. Furthermore, some small ceramic capacitors should be put very close to the drain of the high side MOSFET and source of the low side switch to suppress the voltage spike caused by parasitic circuit parameters. For high current applications, a 1mH input inductor is recommended to slow down the input current transient. Rev. 1.4 08/13/02 www.irf.com 13 IRU3055 Design Example In the demo-board, the condition is as follows: (5) MOSFET Selection By equation (9), the RMS current of high side MOSFET is given as: VIN=12V, VOUT=1.5V and IOUT=60A IRMS(HI) = D3IOUT/m IRMS(HI) = (V OUT/VIN)3IOUT/m D = 1.5/12 = 0.125 IRMS = 0.125360A/3 = 7.1A Output voltage regulation is within 100mV during transient. (1) Select Switching Frequency Select MOSFET from International Rectifier IRF3704S with D-2 pak, which will result to: Fs = 150KHz for each phase According to Figure 10 and equation (5), the oscillator selection resistor is given by: RRDS(ON) = 9mV and 110A IDS current For low side MOSFET: Rt ≅ 7500/150 = 50K From Figure 10, select Rt=47K (2) Soft-Start Capacitor For 1.5V output, VSET=1.5V. The soft-start time of the converter can be estimated from equation (4): tSTART = (V SET+0.7V)3Css/10mA IRMS(LO) = (1-D)3IOUT/m D = VOUT/VIN = 1.5/12 = 0.125 IRMS(LO) = (1-0.125)360/3 = 19A Select MOSFET from International Rectifier IRF3711S with D-2 package, which will result to: RDS(ON)(LO) = 6mV and 110A current If tSTART=20ms, then: Css = 20ms310mA/(1.5V+0.7V) = 95nF Choose Css=0.1mF (3) Output Inductor and Capacitor Select the current ripple LIR=40%, by equation (7): L>VOUT3(V IN-V OUT)/(Fs3VIN3LIR3IOUT/m) L>1.53(12-1.5)/(150K312340%360A/3)=1.1mH Select core from Micrometal, T60-18 with 6 turns #14 AWG wire, which gives 1mH inductor, 15A RMS and 25A saturation current. The DC resistor of inductor is 1.6mV. L = 1mH and RL = 1.6mV (6) Over Current Setting By equation (3), over current limit is set by RSET. The current limit should be at least 150% of the nominal output current. Set IMAX=90A and 30A for each phase. For low side MOSFET, RDS(ON)=6mV and 9mV at 1508C. The over current setting resistor is given by: RSET = IMAX3RDS(ON)/3/160mA RSET = 90A39mV/3/160mA = 1.7KV Select RSET = 2.2KV (7) Compensation Design For detailed explanation, please see IRU3037 data sheet. Select bandwidth of the system to be 1/10 of switching frequency that is 15KHz: The output capacitor is based on ESR. Suppose the maximum allowed voltage droop for 60A load is: The compensation resistor can be calculated as: DV = 100mV ESR < DV/Di = 100mV/60A = 1.66mV Rc = Vosc3Fo3L/(V IN3ESR3gm) Select 8 Panasonic capacitors. EEUFJ0J272U with 2700mF and 13mV ESR each. The total: COUT = 832700mF = 21600mF ESR = 13mV/8 = 1.6mV (4) Senseless Inductor Current Sensing With equation (1), we select the inductor sensing network which has a time constant: R23C8 = 23L/RL Select: C8 = 1mF R2 = 231mH/(1.6mV31uF) = 1.25K Fo = 233.14315KHz = 94KHz Where Vosc is the ramp peak voltage and gm is the transconductance of the error amplifier. From the data sheet: Vosc = 2V gm = 720mmho Rc = 2394KHz31mH/(1231.6mV3720mmho) Rc = 12KV. Select R6=Rc=12.7KV The compensator capacitor is given as: Select R2, R4 and R5 = 1.5K 14 Cc = (L3COUT) /0.75/Rc Cc = (1mH321600mF) /0.75/12KV = 16.3nF Select C12=Cc=22nF www.irf.com Rev. 1.4 08/13/02 IRU3055 In practice, the resistor Rc (R6 in Fig.3) can be tuned for a better dynamic load response. Higher Rc will result in a fast transient response. Cc (C12 in Fig.3) can be kept unchanged. In Fig.3. R6=27KΩ. (8) Input Capacitor Selection From the Figure 12, according to the duty ratio, pick up the normalized input RMS current. For this example: IRMS(IN)/IOUT = 0.15 IRMS(IN) = 0.15360A = 9A Select Panosonic capacitor. Four EEUFJ1C152U with1500mF give results to: 432.5 = 10A RMS current. Layout Considerations For any switching converter, the current transition from one power device to another usually causes voltage spikes across the power component due to parasitic inductance and capacitance. These voltage spikes will result in reduction of efficiency, increased voltage stress of power components and radiated noise to circuit. A good layout can minimize these effects. There are several critical loops for IRU3055 controlled multi-phase converter. The loop by synchronous MOSFETs and input capacitor is the most critical loop and it should be minimized as small as possible. Put a small ceramic capacitor next to the drain of high side switch and source of low side switch. Put the input capacitors to the high and low side switch as close as possible. The second loop is the gate of MOSFETs and the drivers from IRU3055. Because the IRU3055 includes the MOSFETs drivers inside, the signal path between driver to the gate of MOSFETs should be minimized. The trace should handle 1A transient current ability. The following is a guideline of how to place the critical components and the connections between components in order to minimize the switching noises. Start the layout by first placing the power components: (1) Place the high side MOSFET Q1 and low side MOSFET Q2 as close to each other as possible so that the source of Q1 and drain of Q2 has the most possible shortest length. (2) Place a capacitor (Electrolytic or ceramic or both) close to the drain of Q1 and source of Q2. (3). If needed, place a snubber RC circuit next to Q2. Rev. 1.4 08/13/02 (4). Place the other 2-phase Q3, Q4 and Q5, Q6 following the same rule. (5) Place output inductor Lo1, Lo2, Lo3 and output capacitor COUT. Make sure the output capacitors are evenly distributed among 3-phases and close to the output slot. (6) Place IC IRU3055 such that the driver pins, HDrv1, HDrv2, Hdrv3 and LDrv1, LDrv2, LDrv3, have a relatively short distance from the corresponding MOSFET gate. In addition, make the 3-phase driving signal path as symmetrical as possible. If the length of the gate signal path is more than 1cm long, a 2 to 10V gate resistor is recommended to be in series in the gate signal path. (7) Place bypass capacitor close to Vcc pin, VREF pin and VCH12,VCH3 pins and also soft-start capacitor to SS pin. (8) Place a frequency selection resistor (Rt) close to Rt pin. (9) Connect output inductor current sensing network such as R2, C8 close to IRU3055. One example of the layout is shown as follows: Output copper plane CS1 Output Cap V OUT IRU3055 CS2 Fb CS3 Close to IRU3055 Figure 13 - An example of layout connection for inductor current sensing. Connect current sensing resistors Rs1,Rs2,Rs3 right to the pads of output inductor Lo1,Lo2,Lo3. Connect the other node of current sensing capacitors Cs1,Cs2,Cs3 together and directly connect to the output voltage terminal, which is also the sensing point for output voltage feedback sensing. (10) Place feedback resistors (RFB1 and RFB2) close to IC and place compensator network close to Comp pin. Note that the resistor RFB1 and RFB2, can be used to set the outputs slightly higher to account for the output drop at the load due to the trace resistance. www.irf.com 15 IRU3055 Component Connection • No data bus should be passing through the switching regulator especially close to the fast transition nodes such as PWM drivers or the inductor voltage. • If possible, using four layer board, dedicate one layer to ground, another layer as power layer for the constant power input and output such as 5V, 12V, and 1.5V output. Connect all grounds to the ground plane using direct vias to the ground plane. • Use large and low impedance/low inductance PCB plane to connect the high current path connections either using component side or the solder side. These connections include: (a) Input capacitor to the drain of high side MOSFET Q1, Q3 and Q5. (b) The interconnection between source of high side MOSFET such as Q1 and low side MOSFET such as Q2. (c) From drain of low side MOSFET to output Inductor . (d) From output inductor to output capacitor. Make sure the impedance from output inductor to output voltage slot (also the voltage feedback sensing point) are as identical or symmetrical as possible. (e) From each output capacitor to output slot. (f) From input inductor to input capacitor. Connect the rest of the components using the shortest trace possible. 16 www.irf.com Rev. 1.4 08/13/02 IRU3055 TEST WAVEFORMS FOR TYPICAL APPLICATION (1) Figure 14 - 3-Phase inductor current at 60A load, Ch1, Ch2 and Ch3: 10A/div. Ch4: gate signal. Figure 17 - Zoomed 60A Load dynamic (rising). Ch3: Output voltage, 100mV/div, AC. Ch4: Load current, 20A/us, sensed by 2mV resistor, 25A/div. Vss V CORE PGood Figure 15 - Soft-start, Vcore and PGood. Figure 18 - 60A load dynamic waveforms with three-phase inductor current. Ch1, Ch2 and Ch3: Inductor current, 10A/div. Ch4: Load current, 20A/us, sensed by 2mV resistor, 25A/div. Figure 16 - 60A Dynamic load response with 20A/ms slew rate. Ch3: Output voltage, 100mV/div, AC. Ch4: Load current, 20A/us, sensed by 2mV resistor, 25A/div. Figure 19 - 60A load dynamic waveforms with three-phase inductor current. (Zoomed) Ch1, Ch2 and Ch3: Inductor current, 10A/div. Ch4: Load current, 20A/us, sensed by 2mV resistor, 25A/div. Rev. 1.4 08/13/02 www.irf.com 17 IRU3055 TYPICAL APPLICATION (2) For Intel Pentium 4 processor with Vcc VID generation and active voltage droop 12V VCH3 Vcc C5 1uF VCH12 5V C3 1uF D1 C1 1uF L1 1uH C2 0.1uF VCL1 VCL23 HDrv1 C6 6x 1500uF Q1 IRF3704S R1 C4 1000uF OCSet1 L2 2.2K Ref Q2 IRF3711S LDrv1 PGnd1/ OCGnd Rt 1uH R2 1.5K C8 CS1 SS C9 1uF C10 0.1uF R3 47K 1uF HDrv2 Q3 IRF3704S LDrv2 Q4 IRF3711S IRU3055 D4 PGnd2 1uH R4 1.5K D3 C11 CS2 1uF D2 Q5 IRF3704S HDrv3 D1 D0 C12 R6 22nF 27K Q6 IRF3711S LDrv3 PGnd3 L4 1uH R5 1.5K Comp C13 CS3 1uF C7 Fb 100pF C14 8x 2700uF (Optional) R22 R7 2.2K 80K R10 1K R12 40K U2B 1/4 LM324 R15 U2C 1/4 LM324 4.7K Q9 2N3904 R19 40K 3.3V C18 47nF U2D 1/4 LM324 1uF R16 3.24K R17 5V R18 4.7K U2A 1/4 LM324 C15 R11 1.07K 40K C16 0.47uF R20 60K R13 R9 2.2K R8 2.2K 5V R14 10K 1.5V / 60A L3 Q7 2N3904 C17 0.1u VID Good Q8 2N3904 5V Ref 2V 1M V VID 1.2V C19 15uF R21 1K Figure 20 - Application circuit of IRU3055 to implement active voltage droop as well as the 1.2V VID voltage with VccVID Power Good. 18 www.irf.com Rev. 1.4 08/13/02 IRU3055 PARTS LIST FOR TYPICAL APPLICATION (2) Ref Desig Q1,Q3,Q5 Q2,Q4,Q6 U1 D1 L1 L2,L3,L4 Description MOSFET MOSFET Controller Schottky Diode Inductor Inductor C1 Cap, Ceramic C2,C10 Cap, Ceramic C3,C5,C9, Cap, Ceramic C8,C11,C13 C4 Cap,Electrolytic C6 Cap,Electrolytic C7 Cap (Optional) C12 Cap, Ceramic C14 Cap,Electrolytic R1 Resistor R2,R4,R5 Resistor R3 Resistor R6 Resistor Q7,Q8,Q9 U2A,B,C,D C15 C16 C17 C18 C19 R7,R8,R9 R13,R18 R10,R21 R11 R12,R15, R19 R14 R16 R17 R20 R22 Rev. 1.4 08/13/02 Value Qty Part# 20V, 9mV 3 IRF3704S 20V, 6mV 3 IRF3711S Synchronous PWM 1 IRU3055 In Series 1 BAT54S 1mH 1 Z9479-A 1mH 3 T60-18 Core, 6-turns #14 AWG wire 1mF, X7R, 25V 1 ECJ-3YB1E105K 0.1mF, Y5V, 25V 2 ECJ-2VF1E104Z 1mF, Y5V, 16V 6 ECJ-3VF1C105Z 1000mF, 16V 1500mF, 16V 100pF, X7R, 50V 22nF, 50V 2700mF,6.3V,13mΩ 2.2K, 1% 1.5K, 1% 47K, 1% 27K, 5% 1 6 1 1 8 1 3 1 1 NPN Transistor OPAMP Cap, Ceramic Cap, Ceramic Cap, Ceramic Cap, Ceramic Cap, POSCAP Resistor Resistor Resistor Resistor Resistor 1mF, X7R, 16V 0.47mF, X7R, 16V 0.1mF, Y5V, 25V 47nF, X7R, 16V 15mF, 6.3V 2.2K, 1% 4.7K, 5% 1K, 1% 1.07K, (tuned), 1% 40K, 1% 3 1 1 1 1 1 1 3 2 2 1 3 Resistor Resistor Resistor Resistor Resistor 10K, 1% 3.24K, (tuned), 1% 1MV, 1% 60K, 1% 80K, 1% 1 1 1 1 1 EEU-FJ1C152U ECU-V1H101KBN EEU-FJ0J272U 2N3904 LM324 ECJ-2YB1C105K ECJ-2YB1C474K ECJ-2VF1E104Z ECJ-2VF1E473K www.irf.com Manuf IR IR IR IR Coilcraft Web site (www.) irf.com coilcraft.com Panosonic maco.panasonic.co.jp Panosonic Panosonic Any Panosonic maco.panasonic.co.jp Panosonic Panosonic Panosonic Any Any Any Any Any Any Panosonic maco.panasonic.co.jp Panosonic Panosonic Panosonic sanyo.com Sanyo Any Any Any Any Any Any Any Any Any Any 19 IRU3055 Introduction to Intel Specification With this simple circuit, the output voltage will linearly decrease as load current increases. The output voltage will fall in Intel spec. The resistor ratio “c” will determine the slope of the voltage-current load line. The resistor ratios “d” and “e” determine the offset voltage. Vo VS E T VO(MAX) VOFFSET VO(TYP) VO(MIN) Io Figure 21 - The Intel specification for the load line. In an ideal case, these parameters can be calculated by: Rs c= KLOAD - Rs KLOAD Vc d= 3 Rs VOFFSET Vc e= VOFFSET Where Rs is equivalent current sensing resistors. According to the Intel spec, the output voltage is dependent on the load current. When the current goes up, the voltage goes down. The characteristic can be modeled by the following: Vo = VSET - VOFFSET - KLOAD 3Io ---(10) Where VOFFSET is the offset voltage and KLOAD is the slope of load line. For a 3-phase converter with inductor current sensing: RL Rs = 3 Where RL is the DC resistance of the inductor. In practice, the resistor ratios “c” and “d” have to be tuned in order to take some parasitic parameters such as PCB layout trace into account. Rearrangement results in: VSET = Vo + VOFFSET + KLOAD 3Io ---(11) For Intel spec: VOFFSET = 25mV KLOAD = 98mV/45A = 2.18mV Implementation of Voltage Droop with IRU3055 With a single single-ended OPAMP, the IRU3055 can achieve voltage droop function as shown in Figure 22. The voltage Vc is a constant voltage such as 2V or 5V. The signal Vo+Rs3Io can be from inductor current sensing. The real application circuit is shown in Figure 20. e x R1 Component selection guide The implementation circuit is shown in Fig.20, Resistor R7, R8, R9 and capacitor C15 configures a inductor current losses sensing network to sense the load current. (Attn: The C15 and R11 must connect directly to the output terminal.) The RC networks that sense the inductor current have to satisfy the following: (R/3)3C = L/RL For example, in the application circuit in Figure 20, the inductor is 1mH and the DC resistance is 1.6mV. If the filter capacitor C15 is chosen to be 1mF, then the current sensing resistors R7, R8 and R9 are: R = 33L/RL/C R = 331mH/1.6mV/1mF = 1.87K IRU3055 R1 Because the given inductor is larger at zero current (it is 1.3mH at 0 current). A large resistor has to be taken. c x R1 Vo VFB R2/d Vo+(Rs x Io) VS E T R2 Vc (constant voltage) Figure 22 - Implement voltage droop with a single OPAMP. In the application circuit in Figure 20, R7,R8 and R9=2.2K. Select R17 (referring to R2 in Figure 22) to be 1MV if we consider the input bias of OPAMP LM324. Select R10 (referring to R1 in Figure 22) to be 1KV. R10=1K and R17=1MV Connect the voltage Vc to 2V reference voltage shown in Figure 20. Vc=2V 20 www.irf.com Rev. 1.4 08/13/02 IRU3055 Calculating R22 (referring to e3R1 in Figure 22) by the provided equation, we get R22 = R173Vc/VOFFSET = 1K32V/25mV = 80K The resistor R11 and R16 (referring to c3R1 and d3R2 in Figure 22) have to be tuned. From the suggested equation, they are in a few KV range. Because resistor R11 and R16 function independent, they can be tuned separately. First, connect the board and make the board work first. Put no load in the output. Then replace R16 with a 5K~20K potentiometer and adjust the potentiometer so as the output voltage is about 25mV lower than the DAC output setting. Because the output current is zero, the resistor R11 will not affect the output voltage. The DC offset is only dependent on R16. Select R16 with the tuned potentiometer value. After R16 is tuned, replace R11 with a potentiometer. Connect the output voltage to certain current load (for example, half of the nominal load, 30A). Adjust the potentiometer so that the output voltage has the same voltage drops as Intel spec requests (for example, 95mV drop comparing with zero current condition). Then select R11 with tuned potentiometer value. Comparison of Test Data with Intel Spec 1.55 1.5 Vo (V) 1.45 The test data is displayed in Figure 23. The DAC input is 01110, which refers to output voltage 1.5V. The measured DAC output VSET is 1.490V. The measured output voltage versus load current falls into the Intel specification as shown in Figure 23. In this figure, at light load, the output voltage almost follows the Intel typical specification. At 40A, 50A and 60A loads, the output voltage is a slight deviation from the typical Intel spec. The reason is because the inductors get hot at high current loads. The resistance increases comparing with low load condition. As a result, there is more voltage droop than the theoretical prediction, because the specification at high current has larger tolerance. The Intel specification can be satisfied easily with the proposed circuit. Implement the 1.2V VID Regulator If a Quadra-OPAMP such as LM324 is used, the additional 1.2V VID regulator as well as the power sequence can be implemented. In application circuit Figure 20, one OPAMP and a NPN transistor 2N3904 implement a 1.2V, 30mA VID voltage regulator. The VID voltage is also sent to the minus input of one OPAMP. When the VID voltage reaches 1V, the OPAMP changes to high state and starts to charge up the RC network. The Resistor R15 and the capacitor C16 function as a delay network. 40K and 0.1mF will give about 1ms delay. In the application circuit, C16=0.47mF, which gives about 5ms delay for a better illustration. When the voltage across capacitor C16 reaches 1V, the OPAMP will turn off the two NPN transistors. The soft-start capacitor of IRU3055, C10, starts to be charged up and output voltage, Vo, will smoothly go into steady state. 1.4 1.35 1.3 1.25 0 10 20 30 40 50 60 IO U T (A) Vomax(Intel spec) Vo(typical Intel spec) Vomin (Intel spec) Experiment Vo (steady state) Vset (experiment) Figure 23 - Test steady state output voltage for the circuit of IRU3055 with active droop. Rev. 1.4 08/13/02 www.irf.com 21 IRU3055 EXPERIMENT WAVEFORMS FOR TYPICAL APPLICATION (2) Figure 24 - Soft-start. Ch1: 1.2V VID. Ch2: VID Good. Ch3: 1.5V Output. Ch4: PGood. Figure 25 - 60A Load dynamic with 20A/ms slew rate. Ch4: Output current, sensed through 2mV resistor, 25A/div. Ch3: Ouput voltage, DC offset 1.3V, 100mV/div. Figure 26 - 3-Phase inductor current at 60A load, Ch1, Ch2 and Ch3: 10A/div and gate signal. 22 www.irf.com Rev. 1.4 08/13/02 IRU3055 TYPICAL APPLICATION (3) Q7 R7 C1 1uF C15 1uF VCH3 Vcc C5 1uF VCH12 C3 5V R8 1K D1 10V C2 1uF D3 12V L1 Battery 19V 1uF V CL1 V CL23 HDrv1 Q1 IRF3704S 1uH C6 6x 1500uF C4 1000uF D2 1N4148 Ref 2.2K LDrv1 Rt L2 R1 OCSet Q2 IRF3711S PGnd1/ OCGnd 2uH R2 3.3K C8 CS1 SS C9 1uF R3 47K C10 0.1uF 1uF HDrv2 Q3 IRF3704S LDrv2 Q4 IRF3711S IRU3055 D4 PGnd2 L3 2uH R4 3.3K D3 C11 CS2 1uF D2 HDrv3 Q5 IRF3704S LDrv3 Q6 IRF3711S D1 D0 PGnd3 C12 R6 22nF 20K Comp 1.5V / 60A L4 2uH R5 3.3K C13 CS3 1uF Fb C14 8x 2700uF Figure 26 - Typical application of IRU3055 in notebook application. Rev. 1.4 08/13/02 www.irf.com 23 IRU3055 PARTS LIST FOR TYPICAL APPLICATION (3) Ref Desig Q1, Q3, Q5 Q2, Q4, Q6 Q7 U1 D1 D2 D3 L1 L2,L3,L4 Description MOSFET MOSFET NPN Transistor Controller Schottky Diode Diode Zener Diode Inductor Inductor Value 20V, 9mV 20V, 6mV Qty 3 3 1 Synchronous PWM 1 In Series 1 1 1 1.3mH 1 2mH, 15A 3 C1 C2, C10 C3,5,8,9, 11,13,15 C4 C6 C12 C14 R1 R2,R4,R5 R3 R6 R7 Cap, Ceramic Cap, Ceramic Cap, Ceramic 1mF, X7R, 25V 0.1mF, Y5V, 25V 1mF, Y5V, 16V 1 2 7 Cap,Electrolytic Cap,Electrolytic Cap, Ceramic Cap,Electrolytic Resistor Resistor Resistor Resistor Resistor 1000mF, 16V 1500mF, 16V 22nF, X7R, 50V 2700mF,6.3V,13mV 2.2K, 1% 3.3K, 1% 47K, 1% 20K, 1% 10V, 5% 1 6 1 8 1 3 1 1 1 Part# IRF3704S IRF3711S 2N3904 IRU3055 BAT54S 1N4148 1N5242A Z9479-A T60-18 Core, 6-turns #14 AWG wire ECJ-3YB1E105K ECJ-2VF1E104Z ECJ-3VF1C105Z EEU-FJ1C152U ECU-V1H223KBG EEU-FJ0J272U Manuf IR IR Any IR IR Any Any Coilcraft Web site (www.) irf.com irf.com coilcraft.com Panosonic maco.panasonic.co.jp Panosonic Panosonic Any Panosonic maco.panasonic.co.jp Panosonic Panosonic Any Any Any Any Any IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 24 www.irf.com Rev. 1.4 08/13/02 IRU3055 (Q) QSOP Package, Wide Body 36-Pin H A B P B1 R1 D E R DETAIL-A L C PIN NO. 1 0.5060.05 F K DETAIL-A J G SYMBOL A B B1 C D E F G H J K L R R1 P 36-PIN MIN MAX 15.20 15.40 0.85 0.80 REF 0.28 0.51 7.40 7.60 10.11 10.51 2.44 2.64 0.10 0.30 78 TYP 0.23 0.32 08 88 0.40 1.27 0.63 0.89 0.2060.05 78638 NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. Rev. 1.4 08/13/02 www.irf.com 25 IRU3055 PACKAGE SHIPMENT METHOD PKG DESIG Q PACKAGE DESCRIPTION PIN COUNT PARTS PER TUBE PARTS PER REEL T&R Orientation 36 --- 1500 Fig A QSOP Plastic, Wide Body 1 1 1 Feed Direction Figure A IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 26 www.irf.com Rev. 1.4 08/13/02