INTEGRATED CIRCUITS DATA SHEET TEA0678 Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute Preliminary specification Supersedes data of August 1993 File under Integrated Circuits, IC01 1996 Jun 06 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute FEATURES TEA0678 GENERAL DESCRIPTION • Dual noise reduction (NR) channels The TEA0678 is a bipolar integrated circuit that provides two channels of Dolby B noise reduction for playback applications in car radios. It includes head and equalization amplifiers with electronically switchable time constants. Furthermore it includes electronically switchable inputs for tape drivers with reverse heads. This device also detects pauses of music in Automatic Music Search (AMS) mode, with a delay time fixed externally by a resistor. The short-circuit proof output stage of the TEA0678 is differential and provides muting. The device will operate with power supplies in the range of 7.6 to 12 V, output overload level increasing with increase in supply voltage. Current drain varies with supply voltage, noise reduction on/off and AMS on/off so it is advisable to use a regulated power supply or a supply with a long time constant. .Current drain varies with these variables: • Head pre-amplifiers • Reverse head switching • Automatic Music Search (AMS) • Mute position • Equalization with electronically switched time constants • Dolby reference level = 387.5 mV • 32 pins • Switch inputs TTL compatible • Differential output stage has: – Capability to drive 1.2 nF capacitive load – Capability to drive 1 kΩ load – Short-circuit proof – Short-circuit proof to 16 V via coupling capacitor. Supply voltage • Improved EMC behaviour. Noise reduction on/off AMS on/off. Because of this current drain variation it is advisable to use a regulated power supply or a supply with a long time constant. QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC supply voltage 7.6 10 12 V ICC supply current − 25 28 mA S+N -------------N signal plus noise-to-noise ratio 78 84 − dB ORDERING INFORMATION TYPE NUMBER TEA0678 TEA0678T PACKAGE NAME SDIP32 SO32 DESCRIPTION VERSION plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1 plastic small outline package; 32 leads; body width 7.5 mm SOT287-1 Remark Dolby*: Available only to licensees of Dolby Laboratories Licensing Corporation, San Francisco, CA94111, USA, from whom licensing and application information must be obtained. Dolby is a registered trade-mark of Dolby Laboratories Licensing Corporation. 1996 Jun 06 2 1996 Jun 06 3 RL RL output A+ output A− CL 4.7 µF 2 31 30 3 15 kΩ 15 kΩ 1 µF 4 29 1 µF 10 µF 5 28 100 nF AMS 27 270 kΩ 330 nF 100 nF 270 kΩ 6 HEADSWITCH MUTE NR EQ LOGIC 330 nF 7 26 25 15 nF Vref 24 kΩ 4.7 nF LEVEL DETECTOR AMS PROCESSOR 9 24 Rt 10 23 AMSout AMS delay time 18 kΩ EQ switch from microprocessor LOW: 120 µs OPEN: 70 µs 330 kΩ 10 nF 8.2 kΩ EQ AMP. EQ AMP. 22 10 nF 8.2 kΩ 330 kΩ 11 Fig.1 Block and application diagram. 180 kΩ 15 nF 8 DOLBY B NR CIRCUIT DELAY TIME DOLBY B NR CIRCUIT 180 kΩ 4.7 nF 24 kΩ 13 VCC GND 20 180 Ω VCC 1 kΩ 12 21 1 kΩ 180 Ω 10 µF PRE AMP. 19 Vref 470 pF 470 pF PRE AMP. POWER SUPPLY 10 µF 14 15 100 µF TEA0678 18 LOW: INPUT 1 HIGH: INPUT 2 from microprocessor head switch input 470 pF 16 17 470 pF MED769 Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute LOW: NR ON OPEN: OFF HIGH: AMS ON from microprocessor 4.7 µF output B+ 4.7 µF 1 32 CL 27 kΩ Vref handbook, full pagewidth 4.7 µF output B− RL RL LOW: MUTE ON HIGH: MUTE OFF from microprocessor Philips Semiconductors Preliminary specification TEA0678 BLOCK DIAGRAM Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 PINNING SYMBOL PIN DESCRIPTION OUTA− 1 negative output channel A OUTA+ 2 positive output channel A NR/AMS 3 noise reduction/music search switch INCA 4 input mute/output stage channel A OUTCA 5 output Dolby B processor channel A INTA 6 integrating filter channel A CONTRA 7 control voltage channel A HPA 8 high-pass filter channel A SCA 9 side chain channel A TD 10 delay time constant EQA 11 equalizing output channel A EQFA 12 equalizing feedback channel A VCC 13 supply voltage INA1 14 input channel A1 (forward or reverse) Vref 15 reference voltage handbook, halfpage OUTA− 1 32 OUTB− OUTA+ 2 31 OUTB+ NR/AMS 3 30 MUTE INCA 4 29 INCB OUTCA 5 28 OUTCB INTA 6 27 INTB CONTRA 7 26 CONTRB HPA 8 25 HPB TEA0678 INA2 16 input channel A2 (reverse or forward) INB2 17 input channel B2 (reverse or forward) HS 18 head switch input INB1 19 input channel B1 (forward or reverse) GND 20 ground EQFB 21 equalizing feedback channel B VCC 13 20 GND EQB 22 equalizing output channel B INA1 14 19 INB1 AMSEQ 23 AMS output and EQ switch input SCB 24 side chain channel B HPB 25 high-pass filter channel B CONTRB 26 control voltage channel B INTB 27 integrating filter channel B OUTCB 28 output Dolby B processor channel B INCB 29 input mute/output stage channel B MUTE 30 mute switch OUTB+ 31 positive output channel B OUTB− 32 negative output channel B 1996 Jun 06 SCA 24 SCB 9 TD 10 23 AMSEQ EQA 11 22 EQB EQFA 12 21 EQFB Vref 15 18 HS INA2 16 17 INB2 MED770 Fig.2 Pin configuration. 4 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 Head switching is achieved when pin HS is connected to GND (input IN1 active) or connected to HIGH (5 V) level (input IN2 active). If left open-circuit IN1 is active. FUNCTIONAL DESCRIPTION Noise Reduction (NR) is enabled when pin NR/AMS is connected to ground and disabled when open-circuit (left floating from a 3-state output). Mute is enabled when pin MUTE is connected to ground and off when connected to HIGH (5 V) level. For smooth switching a time constant is recommended. If left open-circuit MUTE is active. Dolby noise reduction only operates correctly if 0 dB Dolby level is adjusted at 387.5 mV. Automatic Music Search (AMS) is enabled when pin NR/AMS is connected to HIGH (5 V) and disabled when open-circuit (left floating from a 3-state output). In AMS mode the signal of both channels are rectified and then added. This means, even if one channel signal appears inverted to the other channel, with the TEA0678 the normal AMS function is ensured (see Figs 4, 5 and 6). The differential output stage of each channel is connected via a provision to the Dolby and pre-amplifier part. This provision may be used for any processing of the tape signal or to add another signal. Each output drives a resistive load of nominal 10 kΩ and is capable of driving 1 kΩ, also a capacitive load of 1.2 nF to ground and between differential outputs. Each output can be short-circuited to a battery (16 V) via a coupling capacitor (4.7 µF). Equalization time constant switching (70 µs or 120 µs) is achieved when pin AMSEQ is connected to GND via an 18 kΩ resistor (120 µs), or left open-circuit (70 µs). This does not affect the AMS output signal during AMS mode (see Fig.1). LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); note1. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 0 16 V Vi input voltage (pins 1 to 32) except pin 15 (Vref); pin 3 (NR/AMS), pin 18 (HS) and pin 30 (MUTE) to VCC −0.3 +VCC V −0.3 +6.5 V input voltage at pin 3 (NR/AMS), pin 18 (HS) and pin 30 (MUTE) note 2 tshort pin 15 (Vref) to VCC short-circuiting duration − 5 s Tstg storage temperature −55 +150 °C Tamb operating ambient temperature −40 +85 °C Ves electrostatic handling voltage for all pins note 3 −2 +2 kV note 4 −500 +500 V Notes 1. The device may not operate correctly when subjected to these ratings when the ratings exceed the electrical characteristics of the device as specified in Chapter “Characteristics”. The device will recover automatically when the environment is reduced to the requirements of the characteristics. 2. The TEA0678 allows a HIGH-level at switching pins without supply voltage (VCC = 0; stand-by mode). This means a maximum input voltage of 6.5 V for the switching input pins. 3. Human body model (1.5 kΩ, 100 pF). 4. Machine model (0 Ω, 200 pF). 1996 Jun 06 5 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 CHARACTERISTICS VCC = 10 V; f = 20 Hz to 20 kHz; Tamb = 25 °C; nominal load 10 kΩ; all levels are referenced to 775 mV (RMS) (0 dB) at differential outputs (Vo = Vo+ − Vo−), this corresponds to Dolby level 387.5 mV (RMS) (0 dB) at test point (OUTC); see Fig.1; NR on/AMS off; EQ switch in the 70 µs position; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. VCC supply voltage ICC supply current αm channel matching Gv voltage gain (output stage) between OUT and OUTC; f = 1 kHz; 5.5 NR off Gmm voltage gain mismatch (output stage) mismatch between OUT+ and OUT−; f = 1 kHz; NR off THD total harmonic distortion (2nd and 3rd harmonic) 10 12 V pins 14, 16, 17 and 19 connected to Vref − 25 28 mA f = 1 kHz; Vo = 0 dB at each output − 26 37 mA f = 1 kHz; Vo = 0 dB; NR off; OUTA/OUTB −0.5 − +0.5 dB 6 6.5 dB −0.5 − +0.5 dB f = 1 kHz; Vo = 0 dB − 0.08 0.15 % f = 10 kHz; Vo = 6 dB − 0.15 0.3 % 13 − − dB 84 − dB − − 1.4 µV Vi(rms) = 0.25 V; f = 1 kHz; see Fig.7 for unsymmetrical signal at OUTC 52 57 − dB at differential OUT; note 1 49 52 − dB headroom at output VCC = 9 V; THD = 1%; f = 1 kHz S+N -------------N signal plus noise-to-noise ratio internal gain 40 dB; linear; 78 CCIR/ARM weighted; decode mode; see Fig.10 Vno(rms) equivalent input noise voltage NR off; unweighted; in decode mode (RMS value) f = 20 Hz to 20 kHz; Rsource = 0 Ω PSRR power supply ripple rejection frequency response measured in encode mode; referenced to TP MAX. UNIT 7.6 HR fo TYP. see Fig.10 Vo = −25 dB; f = 0.2 kHz −22.9 −24.4 −25.9 dB Vo = 0 dB; f = 1 kHz −1.5 0 +1.5 Vo = −25 dB; f = 1 kHz −17.8 −19.3 −20.8 dB Vo = −25 dB; f = 5 kHz −18.1 −19.6 −21.1 dB Vo = −35 dB; f = 10 kHz −24.4 −25.9 −27.4 dB dB αcs channel separation Vo = +10 dB; f = 1 kHz; see Fig.8 61 67 − dB αcc crosstalk between active and inactive input NR off; f = 1 kHz; Vo = +10 dB; see Fig.8 70 77 − dB RL load resistance at each output AC-coupled f = 1 kHz; Vo = 12 dB; OUTA+, OUTA−, OUTB+ and THD = 1% OUTB− (corresponds to 2 kΩ THD = 1%; note 2 at differential output) 10 − − kΩ 1 − − kΩ CL capacitive load at each output CLmin at each output to ground (between OUT+ and OUT−) (pins 1, 2, 31 and 32) and ground 0.3 − 1.3 nF Gv voltage gain of pre-amplifier 29 30 31 dB 1996 Jun 06 from pin INA1 or INA2 to pin EQFA and from pin INB1 or INB2 to pin EQFB; f = 1 kHz 6 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute SYMBOL PARAMETER CONDITIONS TEA0678 MIN. TYP. MAX. UNIT VI(offset)(DC) DC input offset voltage − 2 − mV Ii(bias) input bias current − − 0.4 µA REQ equalization resistor 4.7 5.8 6.9 kΩ RI input resistance head inputs 60 100 − kΩ Av open-loop amplification f = 10 kHz 80 86 − dB f = 400 Hz 104 110 − dB pin INA1 or INA2 to pin EQA and pin INB1 or INB2 to pin EQB VO(offset)(DC) DC offset voltage at pins OUT+ to OUT− pins INA1, INA2, INB1 and INB2 connected to Vref −10 − +10 mV Vmute(offset) MUTE offset voltage at pins OUT+ to OUT− pins INA1, INA2, INB1 and INB2 connected to Vref −10 − +10 mV NR off; pins INA1, INA2, INB1 and INB2 connected to Vref −0.15 − +0.15 V pin OUTC to ground −2 − − mA pin OUTC to VCC 0.3 − − mA pin OUT± to ground −2.5 − − mA pin OUT± to VCC 2.5 − − mA Vref − VOUTC DC output offset voltage at pins OUTCA and OUTCB IO DC output current pins INA1, INA2, INB1 and INB2 connected to Vref Ri input resistance output stage at pins INCA and INCB 10 16 − kΩ Zo output impedance at each output OUTA+, OUTA−, OUTB+ and OUTB− − 90 110 Ω dmute mute depth at differential output NR off f = 1 kHz −80 − − dB f = 10 kHz −80 − − dB AMSL AMS threshold level at music to pause NR off; f = 10 kHz; see Fig.9 −25 −22 −19 dB AMSH AMS threshold level at pause to music note 3 −24 −21 −18 dB td AMS delay time range f = 10 kHz; 0 dB burst; see Table 1 − 23 to 160 − ms tr AMS rise/delay time f = 10 kHz; 0 dB burst 2 − 10 ms EMC DC offset voltage at pins OUTA−, OUTA+, OUTB+ and OUTB− f = 900 MHz; Vi = 3 V(RMS); see Figs 11, 12 and13 − 100 − mV 1996 Jun 06 7 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute SYMBOL PARAMETER CONDITIONS TEA0678 MIN. TYP. MAX. UNIT Switching thresholds NR/AMS SWITCH (PIN 3) VIL LOW level input voltage NR on −0.3 − +0.8 V IIL LOW level input current NR on −10 −20 −40 µA Ii(float) allowed floating input current pin left open-circuit; NR/AMS off −10 0 +10 µA Vfloat floating voltage pin left open-circuit; NR/AMS off − 2.4 5 V VIH HIGH level input voltage AMS on 4 − 5.5 V IIH HIGH level input current AMS on 10 20 40 µA EQUALIZATION (PIN 23) IEQ70 floating leakage current time constant 70 µs active +0.002 − −0.15 mA VEQ70 floating voltage time constant 70 µs active − 4.6 5 V IEQ120 input current time constant 120 µs active −0.25 − −1 mA AMS OUTPUT (PIN 23) VOH HIGH level output voltage music present 4 4.6 5 V IOH HIGH level output current current capability +0.01 − −1 mA IOH HIGH level output current current capability; note 4 +0.01 − −0.15 mA VOL LOW level output voltage music not present − − 0.8 V IOL LOW level output current current capability −0.01 − +1 mA MUTE SWITCH (PIN 30) VIL LOW level input voltage MUTE on −0.3 − +0.8 V IIL LOW level input current MUTE on − −4 −100 µA VIH HIGH level input voltage MUTE off 4 − 5.5 V IIH HIGH level input current MUTE off; smooth switching with a time constant is recommended − 10 100 µA HEAD SWITCH (PIN 18) VIL LOW level input voltage INPUT 1 on −0.3 − +0.8 V IIL LOW level input current INPUT 1 on − − −100 µA VIH HIGH level input voltage INPUT 2 on 4 − 5.5 V IIH HIGH level input current INPUT 2 on − 30 100 µA 1996 Jun 06 8 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 Notes to the characteristics 1. For the signal to be doubled (+6 dB) at differential output as a function of OUTC, the signal-to-ripple ratio is improved at differential output for approximately 3 dB. 2. By using the small load, the output voltage may be divided by −0.8 dB. 3. The high speed of the tape (FF, REW) at the tape head during AMS mode causes a transformation of level and frequency of the originally recorded signal. It means a boost of signal level of approximately 10 dB and more for recorded frequencies from 500 Hz up to 4 kHz. So the threshold level of −22 dB corresponds to signal levels in PB mode of approximately −32 dB. The AMS inputs for each channel are pin SCA and pin SCB. As the frequency spectrum is transformed by a factor of approximately 10 to 30 due to the higher tape speed in FF, REW, the high-pass filter (4.7 nF/24 kΩ) removes the effect of offset voltages but does not affect the music search function. In the application circuit (Fig.1) the frequency response of the system between tape heads input, e.g. pins INA2/INB2, to the AMS input pins SCA and SCB is constant over the whole frequency range (see Fig.3). The frequency dependence of threshold level is shown in Fig.3. 4. In AMS OFF mode, pin AMSEQ is HIGH level, the equalization time constant will be switched by pulling approximately 200 µA out of pin AMSEQ. This means for the device connected to pin AMSEQ, a restriction of input current at HIGH level less than 200 µA during AMS off; otherwise the switching of the time constants is disabled but fixed at 120 µs. If the following devices, input consumes more than 200 µA, this input has to be disconnected in AMS off mode. (To ensure switching the currents for the different switched modes are specified with a tolerance of ±50 µA in Chapter “Characteristics”.) For an application with a fixed EQ time constant of 120 µs the equalizing network may be applied completely external. Change 8.2 kΩ resistor to 14 kΩ the internal resistor REQ = 5.8 kΩ is short-circuited by fixing the EQ switch input at the 70 µs position (IEQ70). Table 1 Blank delay time set by resistor Rt at pin TD RESISTOR VALUE Rt (kΩ) DELAY TIME td TYP. (ms) TOLERANCE (%) 68 23 20 150 42 15 180 48 15 220 56 15 270 65 10 330 76 10 470 98 10 560 112 10 680 126 10 820 142 10 1000 160 10 1996 Jun 06 9 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 General note It is recommended to switch off VCC with a gradient of 400 V/s at maximum to avoid plops on tape in the event of contact between tape and tape head while switching off. MED623 −20 handbook, full pagewidth (1) (dB) −30 −40 (2) −50 −60 102 103 104 (Hz) 105 (1) AMS threshold level for application circuit (Fig.1). (2) AMS threshold level for test circuit (Fig.9). Fig.3 AMS threshold level. Thus a pause T is uniquely defined outside the interval 1.3 s < T < 3 s. Inside this interval T will be recognized as a pause or not dependent on the local point of tape, respectively the speed of tape. Times of pauses described investigated for this document are valid for tape devices 1 with a speed of its spindle (FF, REW): ω r = 51 --s respectively 12 to 27 times of the playback speed. General note on AMS The speed of tape at the tape head during FF, REW depends on the diameter of the tape on the spindle. Depending on this speed, the recorded signal occurs transformed in frequency and magnitude as a function of the original signal in playback mode speed. For example: A recorded pause of 3 s passes the tape head at its highest speed in 111 ms, e.g. during FF mode near tape end. This time constant of 111 ms corresponds to a pause of 1.3 s at the beginning of the tape in playback mode. 1996 Jun 06 10 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute capacitor of the second time constant (E) will be charged, respectively discharged. If the pause level of the input signal remains for a certain time, the voltage at the capacitor reaches a certain value, which corresponds to an equivalent time value due to the charging. The voltage at the capacitor will be compared to a predefined time-equivalent voltage by the second comparator (F), the time detector. If the pause level of the input signal remains for this predefined time, the time detector (F) changes its output level for ‘pause found’ status. Short description ‘music search’ A system for ‘music search’ mainly consists of a level and a time detection (see Fig.4). For adapting and decoupling the input signal will be amplified (A), then rectified (B) and smoothed with a time constant (C). So the voltage at (C) corresponds to the signal level and will be compared to the predefined pause level at the first comparator (D), the level detector. If the signal level becomes smaller than the pause level, the level detector(D) changes its output signal. Due to the output level of the level detector the handbook, full pagewidth (A) TEA0678 (B) (C) INA (D) (E) (F) COMPARATOR 1 AMPLIFIER RECTIFIER t1 VI COMPARATOR 2 t2 Vt OUT INB LEVEL DETECTOR TIME DETECTOR MED772 Fig.4 Integrated ‘music search’ function. In this IC the signals of both channels are first rectified and then added. The signal behind the adder is described by Vadd = VchanA + VchanB, where: VchanA: absolute value channel A VchanB: absolute value channel B This means, even if one channel signal appears phase shifted to the other channel (at worst cases inverted), the TEA0678 will ensure the normal AMS function. 1996 Jun 06 11 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 Description of the principle timing diagram for AMS-scan mode without initial input signal (see Fig.5) tr: rise handbook, full time pagewidth td: delay time tb: burst time tp: pause time tf: fall time AMS on tr tb<tr td tp<td tf Vin t Vl Vl: voltage at level detector input pin 7 (CONTRA) level threshold VREF t Vt upper threshold (hysteresis) Vt: voltage at time detector input pin 26 (CONTRB) time threshold t VAMSEQ 4.5 V output signal to microprocessor t t0 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 MED773 Fig.5 AMS-scan mode without initial input signal. By activating AMS-scan mode, the AMS output level directly indicates whether the input level corresponds to a pause level (VAMSEQ = LOW) or not (VAMSEQ = HIGH). At t0 the AMS-scan mode is activated. Without a signal at Vin, the following initial procedure runs until the AMS output changes to LOW level: due to no signal at Vin the voltage at the level detector input VI (pin 7, CONTRA) remains below the level threshold and the second time constant will be discharged (time detector input Vt). When Vt passes the time threshold level, the time detector output changes to LOW level. Now the initial procedure is completed. threshold level after the rise time tr (at t4), the AMS output changes to HIGH. If the signal burst ends at t5 the level detector input VI falls to its LOW level. When passing the level threshold at t6, the discharging of the second time constant begins. Now the circuit measures the delay time td, which is externally fixed by a resistor and defines the length of a pause to be detected. If no signal appears at Vin within the time interval td, the time detector output switches the AMS output to LOW level at t7. If a plop noise pulse appears at Vin (t8) with a pulse width less than the rise time tr > tb, the plop noise will not be detected as music. The AMS output remains LOW. If a signal burst appears at t3, the level detector input voltage rises immediately and causes its output to charge the second time constant, which supplies the input voltage Vt for the time detector. When Vt passes the upper 1996 Jun 06 Similarly the system handles ‘no music pulses’ tp: when music appears at t11 with a small interruption at t13, this interruption will not affect the AMS output for tp < td. 12 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 Description of the principle timing diagram for AMS-scan mode with initial input signal (see Fig.6) tr: rise handbook, fulltime pagewidth AMS on td td: delay time tb: burst time tp: pause time Vin tf: fall time tf tb<tr tp<tr t Vl Vl: voltage at level detector input pin 7 (CONTRA) level threshold VREF t Vt: voltage at time detector input pin 26 (CONTRB) Vt upper threshold (hysteresis) time threshold t VAMSEQ 4.5 V output signal to microprocessor t t0 t1 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 MED774 Fig.6 AMS-scan mode with initial input signal. At t0 the AMS-scan mode is activated. With an input signal at Vin, the following initial procedure runs until the circuit gets a steady state status. The following behaviour does not differ from the description in Section “Description of the principle timing diagram for AMS-scan mode without initial input signal (see Fig.5)”. Due to the signal at Vin the voltage at the level detector input VI (pin 7, CONTRA) slides to a value which is defined by a limiter. This voltage causes the level detector output charging the second time constant (time detector input Vt) to its maximum voltage level at t1. Now the initial procedure is completed. 1996 Jun 06 13 1996 Jun 06 14 CL RL RL output A+ output A− 2 31 4.7 µF 1 32 4.7 µF output B+ 27 kΩ 4.7 µF 4.7 µF CL RL NR 30 1 µF 4 5 28 LOW: NR ON ON 3 15 kΩ 15 kΩ 29 1 µF 10 µF 100 nF 330 nF 100 nF 270 kΩ 6 HEADSWITCH MUTE NR EQ AMS 27 270 kΩ LOGIC 330 nF 7 180 kΩ 15 nF 8 4.7 nF LEVEL DETECTOR AMS PROCESSOR Vref DOLBY B NR CIRCUIT DELAY TIME DOLBY B NR CIRCUIT 25 15 nF 4.7 nF 24 kΩ 24 kΩ 9 24 18 kΩ EQ 70 µs Rt 10 AMS delay time 23 AMSout EQ AMP. EQ AMP. 10 µF 10 kΩ 20 kΩ 11 22 20 kΩ 12 21 10 kΩ 10 µF 1000 µF 10 kΩ PRE AMP. 0.25 V RMS 1 kHz 100 nF PRE AMP. POWER SUPPLY VCC = 10 V 13 VCC GND 20 Vref 19 14 15 100 µF TEA0678 18 LOW: INPUT 1 HIGH: INPUT 2 from microprocessor 16 17 MED775 Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute Fig.7 Test circuit for power supply ripple rejection. 26 180 kΩ Vref handbook, full pagewidth output B− RL HIGH: MUTE OFF from microprocessor Philips Semiconductors Preliminary specification TEA0678 TEST AND APPLICATION INFORMATION 1996 Jun 06 15 CL RL RL 4.7 µF output A+ 2 31 output A− 1 32 4.7 µF output B+ 27 kΩ 4.7 µF 4.7 µF CL RL NR 30 1 µF 4 100 nF 100 nF 270 kΩ 6 HEADSWITCH MUTE NR EQ AMS 27 270 kΩ LOGIC 330 nF 330 nF 28 5 LOW: NR ON ON 3 15 kΩ 15 kΩ 29 1 µF 10 µF 7 26 25 15 nF Vref 4.7 nF LEVEL DETECTOR AMS PROCESSOR 4.7 nF 24 kΩ 24 kΩ 9 24 18 kΩ EQ 70 µs Rt 10 AMS delay time 23 AMSout EQ AMP. EQ AMP. 10 µF 10 kΩ 20 kΩ 11 22 20 kΩ 12 21 10 kΩ 10 µF PRE AMP. 10 V 10 µF 470 pF PRE AMP. POWER SUPPLY VCC = 10 V 100 nF 13 VCC GND 20 Vref 19 200 Ω 14 15 100 µF TEA0678 18 LOW: INPUT 1 HIGH: INPUT 2 from microprocessor 16 17 MED776 Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute Fig.8 Test circuit for channel separation. 180 kΩ 15 nF 8 DOLBY B NR CIRCUIT DELAY TIME DOLBY B NR CIRCUIT 180 kΩ Vref andbook, full pagewidth output B− RL from microprocessor HIGH: MUTE OFF Philips Semiconductors Preliminary specification TEA0678 1996 Jun 06 16 CL RL RL 4.7 µF output A+ 2 31 output A− 1 32 4.7 µF output B+ 27 kΩ 4.7 µF 4.7 µF CL RL 3 1 µF 4 29 5 28 HIGH: AMS ON 15 kΩ 15 kΩ 5V 30 1 µF 10 µF 100 nF 330 nF 100 nF 270 kΩ 6 HEADSWITCH MUTE NR EQ AMS 27 270 kΩ LOGIC 330 nF 7 26 25 15 nF Vref 4.7 nF LEVEL DETECTOR AMS PROCESSOR 4.7 nF 24 kΩ 24 kΩ 9 24 18 kΩ EQ 70 µs Rt 10 AMS delay time 23 AMSout EQ AMP. EQ AMP. 10 µF 10 kΩ 20 kΩ 11 22 20 kΩ 12 21 10 kΩ 10 µF 100 nF 13 VCC GND 20 VCC = 10 V PRE AMP. POWER SUPPLY PRE AMP. Vref 19 14 15 100 µF TEA0678 18 LOW: INPUT 1 HIGH: INPUT 2 from microprocessor 16 17 MED777 voltage input Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute Fig.9 Test circuit for AMS threshold level. 180 kΩ 15 nF 8 DOLBY B NR CIRCUIT DELAY TIME DOLBY B NR CIRCUIT 180 kΩ Vref handbook, full pagewidth output B− RL HIGH: MUTE OFF from microprocessor Philips Semiconductors Preliminary specification TEA0678 1996 Jun 06 17 RL RL output A+ output A− 2 31 4.7 µF 4.7 µF CL 27 kΩ output B+ 4.7 µF 1 32 CL RL NR 30 1 µF 4 LOW: NR ON ON 3 15 kΩ 15 kΩ 29 1 µF 10 µF 5 28 100 nF 100 nF 7 26 25 15 nF 180 kΩ 15 nF 8 4.7 nF LEVEL DETECTOR AMS PROCESSOR Vref DOLBY B NR CIRCUIT DELAY TIME DOLBY B NR CIRCUIT 180 kΩ TP 24 kΩ 24 kΩ 9 24 TP 4.7 nF Rt 10 AMS delay time 23 AMSout EQ AMP. EQ AMP. 10 µF 10 kΩ 20 kΩ 11 22 20 kΩ 10 µF 18 kΩ EQ 70 µs 10 V 12 21 10 kΩ PRE AMP. Vi 100 nF Vi 10 µF PRE AMP. POWER SUPPLY VCC = 10 V 13 VCC GND 20 25 kΩ 10 µF 25 kΩ VCC 470 pF Vref 19 200 Ω 14 15 100 µF TEA0678 18 LOW: INPUT 1 HIGH: INPUT 2 from microprocessor 16 17 MED778 Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute Fig.10 Test circuit for frequency response (channel B, encode mode). 330 nF 270 kΩ 6 HEADSWITCH HEAD MUTE NR EQ AMS 27 270 kΩ LOGIC 330 nF Vref handbook, full pagewidth 4.7 µF output B− RL HIGH: MUTE OFF from microprocessor Philips Semiconductors Preliminary specification TEA0678 1996 Jun 06 1 32 18 4.7 µF 2 31 4.7 µF 27 kΩ 30 3 15 kΩ 15 kΩ 4 29 10 µF 5 28 100 nF 330 nF 100 nF 270 kΩ 6 HEADSWITCH MUTE NR EQ AMS 27 270 kΩ LOGIC 330 nF 7 26 25 15 nF 180 kΩ 4.7 nF LEVEL DETECTOR AMS PROCESSOR 4.7 nF 24 kΩ 24 kΩ 9 24 AMS delay time 23 68 kΩ 10 EQ AMP. EQ AMP. 10 kΩ 20 kΩ 11 22 20 kΩ 12 21 10 kΩ PRE AMP. MBH478 PRE AMP. POWER SUPPLY VCC = 10 V 100 nF 13 VCC GND 20 470 pF 18 470 pF 15 TEA0678 14 19 Vref 200 Ω 200 Ω 16 17 40 Ω 10 Ω 200 Ω 100 µF 200 Ω 470 pF 470 pF Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute Fig.11 EMC test circuit. 15 nF 8 DOLBY B NR CIRCUIT DELAY TIME DOLBY B NR CIRCUIT 180 kΩ Vref andbook, full pagewidth 4.7 µF 4.7 µF 5 kΩ 5 kΩ VCC Philips Semiconductors Preliminary specification TEA0678 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 LAYOUT OF PRINTED-CIRCUIT BOARD FOR EMC TEST CIRCUIT (FOR TEA0678T) l pagewidth 72 68 40 Ω 10 Ω 0Ω 0Ω 0Ω 0Ω 470 pF 200 Ω 470 pF 200 Ω 10 kΩ 20 20 68 kΩ kΩ TEA0678T kΩ 15 nF 15 nF 4.7 nF 4.7 nF 100 nF 100 nF 270 270 kΩ kΩ 470 pF 200 Ω 470 pF 200 Ω 10 kΩ 27 kΩ 5 kΩ 5 kΩ 100 nF MBH462 Dimensions in mm. Fig.12 Top side with components. 1996 Jun 06 19 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 l pagewidth 68 72 X5 X3 4.7 µF 4.7 µF 24 kΩ MP MP 330 nF X1 MP 330 nF MP 100 µF S1 100 µF 180 kΩ MP X5 180 kΩ MP MP 24 kΩ 4.7 µF 4.7 µF X2 X4 MBH461 Dimensions in mm. Fig.13 Bottom side with components. 1996 Jun 06 20 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 PACKAGE OUTLINES SDIP32: plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1 ME seating plane D A2 A A1 L c e Z (e 1) w M b1 MH b 17 32 pin 1 index E 1 16 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.7 0.51 3.8 1.3 0.8 0.53 0.40 0.32 0.23 29.4 28.5 9.1 8.7 1.778 10.16 3.2 2.8 10.7 10.2 12.2 10.5 0.18 1.6 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-02-04 SOT232-1 1996 Jun 06 EUROPEAN PROJECTION 21 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 SO32: plastic small outline package; 32 leads; body width 7.5 mm SOT287-1 D E A X c y HE v M A Z 17 32 Q A2 A (A 3) A1 pin 1 index θ Lp L 16 1 0 detail X w M bp e 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.27 0.18 20.7 20.3 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.2 1.0 0.25 0.25 0.1 0.95 0.55 inches 0.10 0.012 0.096 0.004 0.086 0.01 0.02 0.01 0.011 0.007 0.81 0.80 0.30 0.29 0.050 0.42 0.39 0.055 0.043 0.016 0.047 0.039 0.01 0.01 0.004 0.037 0.022 θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-01-25 SOT287-1 1996 Jun 06 EUROPEAN PROJECTION 22 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. WAVE SOLDERING This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. SDIP SOLDERING BY DIPPING OR BY WAVE • The longitudinal axis of the package footprint must be parallel to the solder flow. The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. • The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. REPAIRING SOLDERED JOINTS A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 1996 Jun 06 TEA0678 23 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential outputs and mute TEA0678 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1996 Jun 06 24 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential NOTES 1996 Jun 06 25 TEA0678 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential NOTES 1996 Jun 06 26 TEA0678 Philips Semiconductors Preliminary specification Dual Dolby* B-type noise reduction circuit, automatic music search, with differential NOTES 1996 Jun 06 27 TEA0678 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 805 4455, Fax. +61 2 805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 2A Akademika Koroleva str., Office 165, 252148 KIEV, Tel. +380 44 476 0297/1642, Fax. +380 44 476 6991 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 708 296 8556 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 825 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com/ps/ (1) ADDRESS CONTENT SOURCE July 29, 1996 © Philips Electronics N.V. 1996 SCA49 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 517021/1200/02/pp28 Date of release: 1996 Jun 06 Document order number: 9397 750 00896