PMDPB56XNEA 30 V, dual N-channel Trench MOSFET 19 April 2016 Product data sheet 1. General description Dual N-channel enhancement mode Field-Effect Transistor (FET) in a small and leadless DFN2020D-6 (SOT1118D) Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology. 2. Features and benefits • • • • • • Trench MOSFET technology Low threshold voltage Leadless medium power SMD plastic package: 2 × 2 × 0.65 mm Tin-plated 100 % solderable side pads for optical solder inspection ElectroStatic Discharge (ESD) protection > 2 kV HBM AEC-Q101 qualified 3. Applications • • • • LED driver Power management Low-side loadswitch Switching circuits 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj = 25 °C - - 30 V VGS gate-source voltage -12 - 12 V ID drain current - - 3.1 A - 55 72 mΩ Per transistor VGS = 4.5 V; Tamb = 25 °C [1] Static characteristics (per transistor) RDSon drain-source on-state resistance [1] VGS = 4.5 V; ID = 3.1 A; Tj = 25 °C Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for 2 drain 6 cm . Scan or click this QR code to view the latest information for this product PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 S1 source TR1 2 G1 gate TR1 3 D2 drain TR2 4 S2 source TR2 5 G2 gate TR2 6 D1 drain TR1 7 D1 drain TR1 8 D2 drain TR2 Simplified outline 6 Graphic symbol 5 7 1 8 2 D1 4 D2 G1 G2 3 Transparent top view S1 S2 DFN2020D-6 (SOT1118D) 017aaa256 6. Ordering information Table 3. Ordering information Type number PMDPB56XNEA Package Name Description Version DFN2020D-6 DFN2020D-6: plastic, thermally enhanced ultra thin and small outline package; no leads; 6 terminals; body 2 x 2 x 0.65 mm SOT1118D 7. Marking Table 4. Marking codes Type number Marking code PMDPB56XNEA 3A PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 2 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj = 25 °C - 30 V VGS gate-source voltage -12 12 V ID drain current Per transistor VGS = 4.5 V; Tamb = 25 °C [1] - 3.1 A VGS = 4.5 V; Tamb = 100 °C [1] - 2 A IDM peak drain current Tamb = 25 °C; single pulse; tp ≤ 10 µs - 12 A EDS(AL)S non-repetitive drain-source avalanche energy ID = 0.3 A; Tj(init) = 25 °C; DUT in - 6.2 mJ total power dissipation Tamb = 25 °C [2] - 485 mW [1] - 1.15 W - 8.33 W Ptot avalanche (unclamped) Tsp = 25 °C Per device Tj junction temperature -55 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C Source-drain diode IS source current Tamb = 25 °C [1] - 1.1 A HBM [3] - 2000 V ESD Maximum rating VESD electrostatic discharge voltage PMDPB56XNEA Product data sheet [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for [2] [3] drain 6 cm . Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Measured between all pins. 2 All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 3 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 017aaa123 120 Pder (%) 017aaa124 120 Ider (%) 80 80 40 40 0 - 75 Fig. 1. - 25 25 75 125 Tj (°C) 0 - 75 175 Normalized total power dissipation as a function of junction temperature Fig. 2. - 25 25 75 Tj (°C) 175 Normalized continuous drain current as a function of junction temperature aaa-022614 102 ID (A) 10 125 tp = 10 µs Limit RDSon = VDS/ID 100 µs 1 1 ms DC; Tsp = 25 °C 10-1 10-2 10-1 Fig. 3. 10 ms 100 ms DC; Tamb = 25 °C; drain mounting pad 6 cm2 1 10 VDS (V) 102 Safe operating area; junction to ambient; continuous and peak drain currents as a function of drainsource voltage PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 4 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions thermal resistance from junction to ambient in free air Min Typ Max Unit [1] - 224 257 K/W [2] - 96 109 K/W - 12 15 K/W Per transistor Rth(j-a) Rth(j-sp) thermal resistance from junction to solder point [1] [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. aaa-022451 103 Zth(j-a) (K/W) 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm . duty cycle = 1 0.75 102 0.33 0.20 0.50 0.25 0.10 0.05 0.02 10 0 1 10-3 0.01 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 5 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET aaa-022452 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.33 0.20 10 0.50 0.25 0.10 0.05 0 1 10-3 0.02 0.01 10-2 10-1 FR4 PCB, mounting pad for drain 6 cm Fig. 5. 1 10 102 tp (s) 103 2 Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 6 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics (per transistor) V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 30 - - V VGSth gate-source threshold voltage ID = 250 µA; VDS=VGS; Tj = 25 °C 0.75 1 1.25 V IDSS drain leakage current VDS = 30 V; VGS = 0 V; Tj = 25 °C - - 1 µA IGSS gate leakage current VGS = 12 V; VDS = 0 V; Tj = 25 °C - - 10 µA VGS = -12 V; VDS = 0 V; Tj = 25 °C - - -10 µA VGS = 4.5 V; VDS = 0 V; Tj = 25 °C - - 2 µA VGS = -4.5 V; VDS = 0 V; Tj = 25 °C - - -2 µA VGS = 4.5 V; ID = 3.1 A; Tj = 25 °C - 55 72 mΩ VGS = 4.5 V; ID = 3.1 A; Tj = 150 °C - 92 121 mΩ VGS = 2.5 V; ID = 2.6 A; Tj = 25 °C - 72 102 mΩ RDSon drain-source on-state resistance gfs forward transconductance VDS = 10 V; ID = 3.1 A; Tj = 25 °C - 12 - S RG gate resistance f = 1 MHz; Tj = 25 °C - 9.2 - Ω Dynamic characteristics (per transistor) QG(tot) total gate charge VDS = 15 V; ID = 3.1 A; VGS = 4.5 V; - 2.9 5 nC QGS gate-source charge Tj = 25 °C - 0.4 - nC QGD gate-drain charge - 0.8 - nC Ciss input capacitance VDS = 15 V; f = 1 MHz; VGS = 0 V; - 256 - pF Coss output capacitance Tj = 25 °C - 31 - pF Crss reverse transfer capacitance - 23 - pF td(on) turn-on delay time VDS = 15 V; ID = 8 A; VGS = 4.5 V; - 9 - ns tr rise time RG(ext) = 6 Ω; Tj = 25 °C - 20 - ns td(off) turn-off delay time - 19 - ns tf fall time - 7 - ns - 0.7 1.2 V Source-drain diode (per transistor) VSD source-drain voltage PMDPB56XNEA Product data sheet IS = 1.1 A; VGS = 0 V; Tj = 25 °C All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 7 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET aaa-022615 12 4.5 V ID (A) aaa-022454 10-3 3.0 V 2.5 V ID (A) 9 10-4 2.2 V min 6 typ max 2.0 V 10-5 3 0 Fig. 6. VGS = 1.8 V 0 1 2 3 4 VDS (V) 10-6 5 0 0.5 1.0 VGS (V) 1.5 Tj = 25 °C Tj = 25 °C; VDS = 5 V Output characteristics: drain current as a Fig. 7. function of drain-source voltage; typical values Subthreshold drain current as a function of gate-source voltage aaa-022616 0.5 RDSon (Ω) 1.8 V 2.0 V 2.2 V aaa-022617 0.3 2.5 V RDSon (Ω) 0.4 0.2 0.3 0.2 Tj = 150 °C 0.1 0.1 3V Tj = 25 °C VGS = 4.5 V 0 0 4 8 ID (A) 0.0 12 Tj = 25 °C Fig. 8. Product data sheet 4 8 VGS (V) 12 ID = 3.1 A Drain-source on-state resistance as a function of drain current; typical values PMDPB56XNEA 0 Fig. 9. Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 8 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET aaa-022618 12 aaa-022619 2 a ID (A) 1.5 8 1.0 4 Tj = 150 °C 0 0 1 Tj = 25 °C 2 0.5 VGS (V) 0 -60 3 VDS > ID × RDSon Fig. 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values 60 120 Tj (°C) 180 Fig. 11. Normalized drain-source on-state resistance as a function of junction temperature; typical values aaa-022620 2 0 aaa-022460 103 VGS(th) (V) C (pF) 1.5 Ciss max 1.0 102 typ min 0.5 Coss Crss 0 -60 0 60 120 Tj (°C) 10 10-1 180 ID = 0.25 mA; VDS = VGS Product data sheet 10 VDS (V) 102 f = 1 MHz; VGS = 0 V Fig. 12. Gate-source threshold voltage as a function of junction temperature PMDPB56XNEA 1 Fig. 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 9 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET aaa-022621 5 VDS VGS (V) ID 4 VGS(pl) 3 VGS(th) VGS 2 QGS1 QGS2 QGS 1 QGD QG(tot) 017aaa137 0 0 1 2 QG (nC) Fig. 15. Gate charge waveform definitions 3 ID = 3.1 A; VDS = 15 V; Tamb = 25 °C Fig. 14. Gate-source voltage as a function of gate charge; typical values aaa-022622 5 IS (A) 4 3 2 Tj = 150 °C Tj = 25 °C 1 0 0.0 0.4 0.8 VSD (V) 1.2 VGS = 0 V Fig. 16. Source current as a function of source-drain voltage; typical values PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 10 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 11. Test information P t2 duty cycle δ = t1 t2 t1 t 006aaa812 Fig. 17. Duty cycle definition 11.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 11 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 12. Package outline DFN2020D-6: plastic, thermally enhanced ultra thin and small outline package; no leads; 6 terminals; body 2 x 2 x 0.65 mm bp (6x) v SOT1118D A B D A B A E A1 pin 1 index area detail X solderable lead end protrusion maximum 0.035 mm (6x) D1 (2x) pin 1 index area 1 C e1 e1 y1 C 3 Lp (6x) cut-off end of non-fuctional bonding wire (8x) E1 (2x) 6 e 4 e X 0 1 A A1 bp max 0.65 0.04 0.35 nom 0.62 0.30 min 0.59 0.25 mm 2 mm scale Dimensions (mm are the original dimensions) Unit y D D1 E E1 2.1 2.0 1.9 0.77 0.67 0.57 2.1 2.0 1.9 1.0 0.9 0.8 e e1 Lp 0.54 0.30 0.65 0.49 0.25 0.44 0.20 v 0.1 y y1 0.05 0.05 Note 1. Dimension A is including plating thickness. Outline version SOT1118D sot1118d_po References IEC JEDEC JEITA European projection Issue date 14-07-16 14-10-16 --- Fig. 18. Package outline DFN2020D-6 (SOT1118D) PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 12 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 13. Soldering SOT1118D 2.2 1.65 0.2 0.3 0.45 0.35 0.25 0.65 0.53 0.43 0.33 solder lands 0.12 0.22 2.5 2.3 0.9 1 1.1 solder paste solder resist 0.935 occupied area 0.49 0.31 0.21 0.57 0.67 Dimensions in mm 0.77 1.65 sot1118d_fr Fig. 19. Reflow soldering footprint for DFN2020D-6 (SOT1118D) PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 13 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 14. Revision history Table 8. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes PMDPB56XNEA v.1 20160419 Product data sheet - - PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 14 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 15. Legal information 15.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Definition Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. PMDPB56XNEA Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 15 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Bitsound, CoolFlux, CoReUse, DESFire, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, MIFARE, MIFARE Plus, MIFARE Ultralight, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP Semiconductors N.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 16 / 17 PMDPB56XNEA NXP Semiconductors 30 V, dual N-channel Trench MOSFET 16. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................3 9 Thermal characteristics .........................................5 10 Characteristics ....................................................... 7 11 11.1 Test information ................................................... 11 Quality information ............................................. 11 12 Package outline ................................................... 12 13 Soldering .............................................................. 13 14 Revision history ................................................... 14 15 15.1 15.2 15.3 15.4 Legal information .................................................15 Data sheet status ............................................... 15 Definitions ...........................................................15 Disclaimers .........................................................15 Trademarks ........................................................ 16 © NXP Semiconductors N.V. 2016. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 19 April 2016 PMDPB56XNEA Product data sheet All information provided in this document is subject to legal disclaimers. 19 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved 17 / 17