MB9B160R Series Datasheet
September 24, 2015
Datasheet Errata for the MB9B160R Series 32-bit ARM® Cortex®-M4F based Microcontroller
This document describes the errata for the MB9B160R Series 32-bit ARM® Cortex®-M4F based Microcontroller
Data Sheet. Compare this document to the device’s data sheet for a complete functional description.
Contact your local Cypress Sales Representative if you have questions.
Part Numbers Affected
Part Number
MB9B160R Series
Page
Item
Description
Original document code: DS709-00004-1v0-E
Rev. 1.0 January 9, 2014
72
ELECTRICAL It should be corrected as indicated by the shading below.
CHARACTERIS
TICS
Parameter
2.Recommend
ed Operating
Conditions
Symbol
Conditions
Value
Min Max
Unit
Remarks
Power supply voltage
VCC
2.7
5.5
V
Analog reference
AVRH
*4
AVCC
V
voltage
*4 :The minimum value of Analog reference voltage depends on the value of compare
clock cycle (Tcck). See "5. 12-bit A/D Converter" for the details.
See the description of the same item on Rev. 2.0 (P.4).
Cypress Semiconductor Corporation
March 8, 2016
198 Champion Court
San Jose, CA 95134
Document No. 002-04919 Rev. *A
408.943.2600
1
MB9B160R Series
Errata Document
Page
144
Item
Description
ELECTRICAL “Electrical Characteristics for the A/D Converter” should be corrected as indicated by
CHARACTERIS the shading below.
TICS
(Error)
5. 12-bit A/D
Converter
Value
Parameter Symbol
Reference
voltage
-
Pin name
AVRH
Min
Typ
Max
2.7
-
AVCC
Unit
Remarks
V
(Correct)
Parameter Symbol
Reference
voltage
-
Pin name
AVRH
Min
Value
Typ
Max
4.5
-
AVCC
2.7
-
AVCC
Unit
V
Remarks
Tcck < 50ns
Tcck ≥ 50ns
Rev. 2.0 April 25, 2014
2
FEATURES
“●32-bit ARM Cortex-M4F Core “should be corrected as indicated by the shading below.
(Error)
・ Processor version: r2p1
(Correct)
・ Processor version: r0p1
48
I/O CIRCUIT
TYPE
It should be added as indicated by the shading below.
Type
Circuit
Remarks
H
P-ch
N-ch
Digital output
・ CMOS level output
・ CMOS level hysteresis
input
・ With standby mode
control
・ IOH = -20.5 mA, IOL =
18.5 mA
Digital output
R
Digital input
Standby
mode
Control
March 8, 2016
Document No. 002-04919 Rev. *A
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MB9B160R Series
Errata Document
Page
Item
49
I/O CIRCUIT
TYPE
Description
It should be added as indicated by the shading below.
Type
Circuit
I
P-ch
P-ch
N-ch
R
70
Pin Status
Remarks
・ CMOS level output
・ CMOS level hysteresis
input
・ 5V tolerant
Digital output
・ With standby mode
control
・ Pull-up resistor
: Approximately 50kΩ
Digital output
・ IOH = -4mA, IOL = 4mA
・ Available to control of
Pull-up resistor
PZR registers.
control
Digital input
Standby mode
control
“List of VBAT Domain Pin Status” should be corrected as indicated by the shading below.
VBAT pin status type
(Error)
S
T
Function
group
INITX
input
state
Device
internal
reset
state
Power supply stable
INITX=0
‐
INITX=1
‐
TIMER mode,
RTC mode,
or
STOP mode state
Deep standby
RTC mode
or
Deep standby
STOP mode state
Return from
Deep
standby
mode state
Power supply stable
Power supply stable
Power supply
stable
INITX=1
SPL=0
SPL=1
INITX=1
SPL=0
SPL=1
INITX=1
-
GPIO
selected
Setting
disabled
Setting
disabled
Maintain
previous
state
GPIO
selected
Setting
disabled
Setting
disabled
Maintain
previous
state
External
sub clock
input
selected
Setting
disabled
Setting
disabled
Hi-Z /
Hi-Z / Internal
Internal
Sub crystal
input
input
oscillator
fixed
fixed
output pin
at "0"
at "0"
Hi-Z /
Internal
input fixed
at "0"
Hi-Z /
Internal
input fixed
at "0"
Hi-Z /
Internal
input fixed
at "0"
Maintain
Maintain
previous
previous
state/When state/When
oscillation oscillation
stops*,
stops*,
Hi-Z /
Hi-Z /
Internal
Internal
input fixed input fixed
at "0"
at "0"
Maintain
previous
state
GPIO
selected
Internal
input fixed
at "0"
GPIO
selected
Internal
input fixed
at "0"
Maintain
previous
state
Maintain
previous
state/When
oscillation
stops*,
Hi-Z/
Internal
input fixed
at "0"
Hi-Z /
Internal
input fixed
at "0"
GPIO
selected
Hi-Z /
Internal
input fixed
at "0"
GPIO
selected
Hi-Z /
Internal Maintain previous
input fixed
state
at "0"
Maintain
Maintain previous
previous
state/When
state/When
oscillation stops*,
oscillation
Hi-Z/
stops*,
Internal
Hi-Z/ Internal
input fixed
input fixed
at "0"
at "0"
*Oscillation is stopped at STOP mode and Deep standby STOP mode.
March 8, 2016
Document No. 002-04919 Rev. *A
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Errata Document
Item
70
Pin Status
Description
(Correct)
VBAT pin status type
Page
S
Function
group
Device
internal
reset
state
Power supply stable
GPIO
selected
GPIO
selected
T
INITX
input
state
External
sub clock
input
selected
TIMER mode,
RTC mode, or
STOP mode state
Deep standby
RTC mode
or
Deep standby
STOP mode state
Return from
Deep standby
mode state
Power supply stable
Power supply stable
Power supply
stable
INITX=1
SPL=0
SPL=1
INITX=1
SPL=0
SPL=1
INITX=1
-
INITX=0
‐
INITX=1
‐
Maintain
previous
state
Maintain
previous
state
Maintain
previous
state
Maintain
previous
state
Maintain
Maintain previous
Maintain previous
previous
state
state
state
Maintain
Maintain
Maintain
previous
state
Maintain
previous
state
Maintain
previous
state
previous
state
previous
state
Maintain
Maintain
previous
state
state
Maintain
previous
state
Maintain
previous
Maintain
Maintain previous
previous Maintain previous
state
state
state
Maintain
Maintain
Sub crystal Maintain
oscillator
previous
output pin
state
previous
state
Maintain
Maintain previous
previous
state/When
state/When Maintain previous
state/When
previous
state/When
oscillation
oscillation
stops,
state
oscillation
state
oscillation stops,
stops,
Hi-Z*
stops,
Hi-Z*
Hi-Z*
Hi-Z*
Maintain
previous
previous
Maintain previous
Maintain previous
state
state
*When The SOSCNTL bit in the WTOSCCNT Register is “0”, Sub crystal oscillator
output pin is maintain previous state.
When The SOSCNTL bit in the WTOSCCNT Register is “1”, Oscillation is stopped at STOP mode and Deep
standby STOP mode.
72
ELECTRICAL It should be corrected as indicated by the shading below.
CHARACTERIS
TICS
Parameter
2.Recommend
ed Operating
Conditions
March 8, 2016
Symbol
Conditions
Value
Min Max
Unit
Remarks
Power supply voltage
VCC
2.7*5
5.5
V
Analog reference
AVRH
*4
AVCC
V
voltage
*4 :The minimum value of Analog reference voltage depends on the value of compare
clock cycle (Tcck). See "5. 12-bit A/D Converter" for the details.
*5：In between less than the minimum power supply voltage and low voltage
reset/interrupt detection voltage or more, instruction execution and low voltage
detection function by built-in High-speed CR(including Main PLL is used) or built-in
Low-speed CR is possible to operate only.
Document No. 002-04919 Rev. *A
4
MB9B160R Series
Errata Document
Page
85
Item
Description
ELECTRICAL “(3) Built-in CR Oscillation Characteristics” should be corrected as indicated by the shading below.
CHARACTERIS
・ Built-in High-speed CR
TICS
(VCC = 2.7V to 5.5V, VSS = 0V)
4. AC
Value
Parameter Symbol
Conditions
Unit Remarks
Characteristics
Min Typ Max
Tj = -20°C to + 105°C 3.92
4
4.08
Clock
When
FCRH
frequency
trimming*1
Tj = - 40°C to + 125°C 3.88
4
4.12
MHz
Clock
When not
FCRH
Tj = - 40°C to + 125°C
3
4
5
frequency
trimming
Frequency
stabilization tCRWT
30
μS
*2
time
*1: In the case of using the values in CR trimming area of Flash memory at shipment
for frequency/temperature trimming.
*2: This is the time to stabilize the frequency of high-speed CR clock after setting
trimming value. This period is able to use high-speed CR clock as source clock.
147
ELECTRICAL “Electrical Characteristics for the A/D Converter” should be added as indicated by the shading below.
CHARACTERIS
(VCC = AVCC = 2.7Vto5.5V, VSS = AVSS = 0V)
TICS
6. 12-bit D/A
Converter
Parameter
Symbol Pin name
Resolution
Conversion time
Integral
Nonlinearity*
Differential
Nonlinearity*
tc20
tc100
INL
- 16
-
+ 16
LSB
- 0.98
-
+ 1.5
LSB
-
-
10.0
mV
- 20.0
-
+ 1.4
mV
3.10
2.0
3.80
-
4.50
-
kΩ
MΩ
260
330
410
μA
400
510
620
μA
-
-
14
μA
DNL
VOFF
Analog output
impedance
RO
IDDA
IDSA
DAx
AVCC
Max
12
0.81
4.06
Unit
Min
0.56
2.79
Output voltage
offset
Power supply
current*
Value
Typ
0.69
3.42
Remarks
bit
μs Load 20pF
μs Load 100pF
When setting
0x000
When setting
0xFFF
D/A operation
When D/A stop
D/A operation
AVCC=3.3V
D/A operation
AVCC=5.0V
When D/A stop
*: During no load
March 8, 2016
Document No. 002-04919 Rev. *A
5
MB9B160R Series
Errata Document
Page
150
Item
Description
ELECTRICAL “Recovery count time” of “(1) Recovery cause: Interrupt/WKUP” should be corrected as
CHARACTERIS indicated by the shading below.
TICS
(Error)
10. Standby
Value
Recovery Time
Parameter
Symbol
Unit Remarks
Sub timer mode
RTC mode
Stop mode
(High-speed CR /Main/PLL
run mode return)
RTC mode
Stop mode
(Low-speed CR/sub run mode
return)
Ticnt
Deep standby RTC mode
with RAM retention
Deep standby stop mode
with RAM retention
Min
Max
881
1136
μs
270
581
μs
240
480
μs
308
667
μs
without
RAM
retention
308
667
μs
with RAM
retention
(Correct)
Parameter
Sub timer mode
RTC mode
Stop mode
(High-speed CR /Main/PLL
run mode return)
RTC mode
Stop mode
(Low-speed CR/sub run mode
return)
Symbol
Ticnt
Deep standby RTC mode
with RAM retention
Deep standby stop mode
with RAM retention
March 8, 2016
Document No. 002-04919 Rev. *A
Value
Min Max
Unit Remarks
896
1136
μs
316
581
μs
270
540
μs
365
667
μs
without
RAM
retention
365
667
μs
with RAM
retention
6
MB9B160R Series
Errata Document
Page
152
Item
Description
ELECTRICAL “Recovery count time” of “(2) Recovery cause: Reset” should be corrected as indicated
CHARACTERIS by the shading below.
TICS
(Error)
10. Standby
Value
Recovery Time
Parameter
Symbol
Unit Remarks
Sleep mode
High-speed CR Timer
mode
Main Timer mode
PLL Timer mode
Low-speed CR timer mode
Sub timer mode
RTC mode
Stop mode
Trcnt
Deep standby RTC mode
with RAM retention
Deep standby stop mode
with RAM retention
Min
111
Max
267
μs
111
267
μs
258
258
569
569
μs
μs
258
569
μs
308
μs
without
RAM
retention
μs
with RAM
retention
Unit
Remarks
669
(Correct)
Parameter
Sleep mode
High-speed CR Timer
mode
Main Timer mode
PLL Timer mode
Low-speed CR timer mode
Sub timer mode
RTC mode
Stop mode
Symbol
Trcnt
Deep standby RTC mode
with RAM retention
Deep standby stop mode
with RAM retention
March 8, 2016
Document No. 002-04919 Rev. *A
Value
Min
Max
266
155
μs
155
266
μs
315
315
567
567
μs
μs
315
567
μs
336
μs
without
RAM
retention
μs
with RAM
retention
667
7
MB9B160R Series
Errata Document
Page
Item
Description
Rev. 3.0 September 24, 2015
157
14.5 12-bit A/D Table (Sampling time, State transition time to operation permission) should be
Converter
corrected as indicated by shading below.
(Error)
Parameter
Sampling time
Symbol
Value
Pin
Name
tS
-
Compare clock
cycle*3
tCCK
-
State transition
time to
operation
permission
tSTT
-
Min
Typ
*2
-
Max
10
*2
-
25
-
1000
50
-
1000
1.0
-
-
Unit
μs
Remarks
AVCC ≥ 4.5V
AVCC < 4.5V
ns
AVCC ≥ 4.5V
AVCC < 4.5V
μs
(Correct)
Parameter
Sampling time
March 8, 2016
Symbol
tS
Value
Pin
Name
Min
Typ
0.15
-
-
Compare clock
cycle*3
tCCK
-
State transition
time to
operation
permission
tSTT
-
Max
10
0.3
-
25
-
Unit
μs
AVCC ≥ 4.5V
AVCC < 4.5V
1000
ns
50
-
1000
-
-
1.0
Document No. 002-04919 Rev. *A
Remarks
AVCC ≥ 4.5V
AVCC < 4.5V
μs
8
Errata Document
MB9B160R Series
Document History Page
Document Title: Datasheet Errata for the MB9B160R Series 32-bit ARM® Cortex®-M4F based Microcontroller
Document Number: 002-04919
Rev.
ECN No.
Orig. of
Change
**
-
AKIH
Initial release
*A
5157738
AKIH
Migrated to Cypress format
Description of Change
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March 8, 2016
Document No. 002-04919 Rev. *A
9