19-2692; Rev 0; 12/02 MAX1994 Evaluation Kit Features The MAX1994 evaluation kit (EV kit) is a complete tripleoutput regulator for notebook computer applications. This fully assembled and tested circuit board provides a digitally adjustable 0.925V to 2.000V output voltage (5-bit on-board DAC) for CPU rail, fixed 2.5V output voltage for I/O and memory supplies, and a 1.2V linear regulator for a CPU VID supply. The battery input voltage range is 7V to 24V. The EV kit operates at 300kHz switching frequency and has superior line- and loadtransient response. The DC-to-DC converter steps down high-voltage batteries and/or AC adapters, generating a precision, dynamically adjustable, low-voltage CPU core rail (BUCK1), and a fixed 2.5V output for I/O and memory supplies (BUCK2). The MAX1994 EV kit consists of the MAX1994 dual Quick-PWM™ master step-down controller and the MAX1980 slave controller. The MAX1994 EV kit includes active voltage positioning with adjustable gain and offset, reducing power dissipation and bulk output capacitance requirements for BUCK1. The MAX1994 includes a specialized digital interface, making it suitable for mobile CPU and video processor applications. The MAX1980 provides additional gatedrive circuitry, phase synchronization, current limit, and current balancing. Precision slew-rate control provides “just-in-time” arrival at the new DAC setting, minimizing surge currents to and from the battery. ♦ High Speed, Accurate, and Efficient This EV kit can also be used to evaluate the MAX1816, which has an adjustable output from 0.600V to 1.750V using an alternate VID code set. MAX1994EVKIT DESIGNATION QTY C1, C20, C22, C43, C44 0 C2, C3, C4, C21, C41, C42, C45 C5, C6, C10, C18, C31, C32, C33 C7, C13, C16, C19, C26, C34, C35 C8, C12, C38 7 7 DESCRIPTION Not installed (1812) 10µF, 25V X5R ceramic capacitors (1812) Taiyo Yuden TMK432BJ106KM or TDK C4532X5R1E106M 330µF, 2.5V, 10mΩ low-ESR specialty polymer capacitors (E case) Panasonic EEFUE0E331XR 0 Not installed (E case) 3 0.22µF, 16V X5R ceramic capacitors (0805) Taiyo Yuden EMK212BJ224KG Quick-PWM is a trademark of Maxim Integrated Products, Inc. ♦ Active Voltage Positioning with Adjustable Gain and Offset ♦ Low-Bulk Output Capacitor Count (BUCK1) ♦ Multiphase Dual Quick-PWM Architecture BUCK1: 0.925V to 2.000V Output-Voltage Range (5-Bit DAC) 40A Load-Current Capability (20A Each Phase) BUCK2: 2.5V Preset Output Voltage (Adjustable with External Resistors) 7A Load-Current Capability ♦ 1.2V, 500mA Linear Output Voltage ♦ 7V to 24V Input Voltage Range ♦ 300kHz Switching Frequency ♦ 48-Pin QFN Package (MAX1994) ♦ 20-Pin QFN Package (MAX1980) ♦ Low-Profile Components ♦ Fully Assembled and Tested Ordering Information PART TEMP RANGE 0°C to +70°C IC PACKAGE 48 QFN (MAX1994), 20 QFN (MAX1980) Component List DESIGNATION QTY DESCRIPTION C9, C14, C39 3 C11 1 47pF ceramic capacitor (0603) C15, C40 2 2.2µF, 10V X5R ceramic capacitors (0612) TDK C1632X5R1A225KTB09N 0.1µF ceramic capacitors (0805) C49 0 Not installed (0805) C23, C36 2 100pF ceramic capacitors (0603) C24 1 1000pF ceramic capacitor (0603) C25, C27, C47, C48, C54 0 Not installed (0603) C28, C30 2 4700pF ceramic capacitors (0603) C29 0 Not installed (1210) C37 1 270pF ceramic capacitor (0805) C53 1 3.3µF, 10V X5R ceramic capacitor (0805) TDK C2012X5R1A335K ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 Evaluates: MAX1816/MAX1980/MAX1994 General Description Evaluates: MAX1816/MAX1980/MAX1994 MAX1994 Evaluation Kit Component List (continued) DESIGNATION QTY DESCRIPTION 10µF, 6.3V X5R ceramic capacitor (0805) TDK C2012X5R0J106M or Taiyo Yuden AMK212BJ106MG 4.7µF, 6.3V X5R ceramic capacitor (0805) Taiyo Yuden JMK212BJ475MG C46 1 C50 1 C54, C55 2 0.022µF ceramic capacitors (0603) 2 5A Schottky diodes Central Semiconductor CMSH5-40 D2, D5, D7 3 100mA Schottky diodes Central Semiconductor CMPSH-3 D3 1 200mA switching diode Central Semiconductor CMPD2838 D1, D4 D6 1 2A Schottky diode Nihon EC31QS03L J1 1 Scope probe connector Berg Electronics 33JR135-1 R1–R5, R11, R17, R18, R20, R21, R28, R30, R60, R61, R62 R55 QTY DESCRIPTION 0 Not installed (0603) 1 10Ω ±5% resistor (0603) R6, R8, R9, R56, R59 5 0Ω resistors (0603) R7, R15, R37, R50, R58 0 Not installed (short PC trace) (0805) R10, R42 2 280kΩ ±1% resistors (0603) R12, R45 2 0.001Ω ±1%, 1W resistors (2512) Panasonic ERJM1WTF1M0U R13, R29 2 49.9kΩ ±1% resistors (0603) R14, R16, R41, R44, R63 0 Not installed (0805) R19, R27, R31 3 4.99kΩ ±1% resistors (0603) R22–R26 5 100kΩ ±5% resistors (0805) R32 1 10Ω ±5% resistor (0805) JU1, JU2 2 4-pin headers JUA0–JUA4 5 2-pin headers R33, R34, R35, R46 4 200Ω ±5% resistors (0603) JU10, JU12, JU13 3 3-pin headers R36, R54, R57 3 100kΩ ±5% resistors (0805) R38 1 R39 1 143kΩ ±1% resistor (0805) 0.005Ω ±5%, 1W resistor (2512) Panasonic ERJM1WSF5M0U 100Ω ±5% resistor (0603) L1, L2 L3 N1, N4, N9, N10 2 0.6µH, 26A, 0.9mΩ power inductors (13mm x 13mm x 6mm) Panasonic ETQP1H0R6BFA 1 1.2µH, 9A, 6.2mΩ power inductor (10mm x 10mm x 5.6mm) Sumida CDEP105-1R2MC-32 4 N-channel MOSFETs (8-pin SO) International Rectifier IRF7811W or Fairchild FDS6694 N2, N5, N6, N8, N11 5 N-channel MOSFETs (8-pin SO) International Rectifier IRF7822 or Fairchild FDS6688 N13 1 P1 Q1 2 DESIGNATION R40 1 R43 1 20kΩ ±5% resistor (0805) R47 1 20Ω ±5% resistor (0805) R48, R49 2 4.7Ω ±5% resistors (0603) R51 1 220Ω ±5% resistor (0805) R52 1 20kΩ ±1% resistor (0805) R53 1 100kΩ ±1% resistor (0805) U1 1 MAX1994ETM (48-pin QFN) N-channel MOSFET (8-pin SO) International Rectifier IRF7811AV U2 0 U3 1 0 Not installed, P-channel MOSFET (SOT23) Fairchild NDS0605 or Fairchild FDV304P None 10 None 4 1 PNP power transistor (SOT23) Zetex FZT749 None 1 Not installed, single-logic inverter (5-pin SOT23) Fairchild NC7SZ04 MAX1980EGP (20-pin QFN) Shunts Rubber bumpers 3M SJ-5007 Mouser 517-SJ-5007BK or equivalent MAX1994 PC board None 1 MAX1994 EV kit data sheet None 1 MAX1816/MAX1994 data sheet None 1 MAX1980 data sheet _______________________________________________________________________________________ MAX1994 Evaluation Kit SUPPLIER PHONE FAX WEBSITE Central Semiconductor 516-435-1110 516-435-1824 www.centralsemi.com Fairchild 408-721-2181 408-721-1635 www.fairchildsemi.com International Rectifier 310-322-3331 310-322-3332 www.irf.com Panasonic 714-373-7939 714-373-7183 www.panasonic.com Sumida 708-956-0666 708-956-0702 www.sumida.com Taiyo Yuden 408-573-4150 408-573-4159 www.t-yuden.com TDK 847-390-4373 847-390-4428 www.component.tdk.com Toko 408-432-8281 408-943-9790 www.tokoam.com Note: Please indicate that you are using the MAX1994 and MAX1980 when contacting these component suppliers. Recommended Equipment • 7V to 24V, >50W power supply, battery, or notebook AC adapter • DC bias power supply, 5V at 100mA • DC bias power supply, 3.3V at 500mA • One or more dummy loads capable of sinking 40A total • Dummy load capable of sinking 7A • Dummy load capable of sinking 0.5A • Digital multimeters (DMMs) • 100MHz dual-trace oscilloscope Quick Start 1) Ensure that the circuit is connected correctly to the supplies and dummy load prior to applying any power. 2) Verify that the shunts are across JU10 pins 1 and 2 (DPSLP), JU12 pins 2 and 3 (SUS), and JU13 pins 1 and 2 (PERF). The DAC code settings (D4–D0) are set for 1.250V output through installed jumpers JUA3, JUA2, and JUA1. 3) Turn on the battery power before turning on the 3.3V and 5V bias power supplies. Turn on the 3.3V bias power supply and then turn on +5V bias power. 4) Observe the 1.250V (VOUT1) output voltage with the DMM and/or oscilloscope. Look at the LX switching nodes and MOSFET gate-drive signals while varying the load current. 5) Observe the 2.5V (VOUT2) and 1.2V (V_VID) output voltages with the DMMs and/or oscilloscope. Detailed Description Setting the Output Voltage The MAX1994 has a unique internal VID input multiplexer that can select one of two different VID DAC code settings for different processor states. Depending on the logic level at SUS (JU12), the suspend mode multiplexer selects the VID DAC code settings from either the voltage at the D0–D4 inputs, or the S0/S1 (JU1, JU2) input decoder. The output voltage can be digitally set from 0.925V to 2.000V (Table 1) from the D0–D4 pins and from 0.700V to 1.075V (Table 2) from S0/S1 pins. There are four different ways to set the output voltage: 1) Drive the external VID0–VID4 inputs (no jumpers installed). The output voltage can be set by driving the VID0–VID4 with open-drain drivers (pullup resistors are included on the board) or 3V/5V CMOS output logic levels (SUS = low, shunt is across JU12 pins 2 and 3). 2) Install jumpers JUA0–JUA4. SUS = low (shunt is across JU12 pins 2 and 3). When JUA0–JUA4 are not installed, the MAX1994’s D0–D4 inputs are at logic 1 (connected to VDD). When JUA0–JUA4 are installed, D0–D4 inputs are at logic 0 (connected to GND). The output voltage can be changed during operation by installing and removing jumpers JUA0–JUA4. As shipped, the EV kit is configured with jumpers JUA0–JUA4 set for 1.250V output (Table 1). Refer to the MAX1994 data sheet for more information. 3) Suspend mode configuration. SUS = high (shunt is across JU12 pins 1 and 2). As shipped, the EV kit is configured for operation in the suspend mode S0/S1 set for 0.850V output (Table 2). 4) Drive DPSLP. DPSLP can be driven by an external driver or through JU10 to introduce offsets to the output voltage (Table 3). _______________________________________________________________________________________ 3 Evaluates: MAX1816/MAX1980/MAX1994 Component Suppliers Evaluates: MAX1816/MAX1980/MAX1994 MAX1994 Evaluation Kit Table 1. MAX1994 Output-Voltage Adjustment Settings (SUS = Low) D4 JAU4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 JUA3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 D1 JUA2 JUA1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 D0 JUA0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 VOUT (V) MAX1816 1.750 1.700 1.650 1.600 1.550 1.500 1.450 1.400 1.350 1.300 1.250 1.200 1.150 1.100 1.050 1.000 0.975 0.950 0.925 0.900 0.875 0.850 0.825 0.800 0.775 0.750 0.725 0.700 0.675 0.650 0.625 0.600 VOUT (V) MAX1994 2.000 1.950 1.900 1.850 1.800 1.750 1.700 1.650 1.600 1.550 1.500 1.450 1.400 1.350 1.300 No CPU 1.275 1.250 1.225 1.200 1.175 1.150 1.125 1.100 1.075 1.050 1.025 1.000 0.975 0.950 0.925 No CPU BUCK1 Output Voltage Offset Control (DPSLP and OFS_) The MAX1994 supports three independent offsets to the voltage-positioned output. The offsets are adjusted using resistive voltage-dividers at the OFS0, OFS1, and OFS2 inputs. The offset control inputs are selected using a combination of the three logic inputs (SUS, PERF, and DPSLP), which also define the operating mode for the MAX1994. Table 3 details which OFS input is selected based on these control inputs. The default for this EV kit is for zero offsets. Refer to the MAX1994 data sheet for more information. 4 Table 2. MAX1994 Output-Voltage Adjustment Settings, Suspend Mode (SUS = High) SHUNT SHUNT LOCATION LOCATION JU2 JU1 1, 2 1, 2 1, 2 1, 3 Not 1, 2 installed 1, 2 1, 4 1, 3 1, 2 1, 3 1, 3 Not 1, 3 installed 1, 3 1, 4 Not 1, 2 installed Not 1, 3 installed Not Not installed installed Not 1, 4 installed 1, 4 1, 2 1, 4 1, 3 Not 1, 4 installed 1, 4 1, 4 S1 PIN S0 PIN GND GND GND REF OUTPUT VOLTAGE (V) 1.075 1.050 GND OPEN 1.025 GND REF REF VCC GND REF 1.000 0.975 0.950 REF OPEN 0.925 REF VCC 0.900 OPEN GND 0.875 OPEN REF 0.850 OPEN OPEN 0.825 OPEN VCC 0.800 VCC VCC GND REF 0.775 0.750 VCC OPEN 0.725 VCC VCC 0.700 Reduced Power Dissipation Voltage Positioning The MAX1994 EV kit can use voltage positioning to decrease the size of the output capacitor and to reduce power dissipation at heavy loads. A current-sense resistor (R12, 1mΩ) is used to sense the inductor current and adjust the output voltage. The current-sense resistor dissipates some power, but the net power savings are substantial. The default setting for this EV kit has voltage positioning disabled. However, with the op-amp gain configured for 4 (per phase), the voltage-positioning slope can bet set at -2mV/A at the output. Dynamic Output-Voltage Transition Experiment Observe the output-voltage transition between 0.850V and 1.250V by setting jumpers JUA0–JUA4 to 1.250V and toggling the SUS input between GND and VCC, respectively. This is the worst-case transition, and should complete within 100µs. _______________________________________________________________________________________ MAX1994 Evaluation Kit ACTIVE OFS INPUTS INPUT MODE Battery sleep (offset = 0%) SUS JU12 0 PERF DPSLP OFS2 OFS1 OFS0 JU13 JU10 0 0 1 0 0 Battery (offset = 0%) 0 0 1 0 1 0 Performance sleep (offset = 0%) 0 1 0 0 0 1 Performance 0 1 1 0 0 0 Suspend 1 0 0 0 0 0 Suspend 1 0 1 0 0 0 Suspend 1 1 0 0 0 0 Suspend 1 1 1 0 0 0 0 = Logic low or input not selected 1 = Logic high or input selected This EV kit is set to transition the output voltage at 9mV/µs. The speed of the transition can be altered by changing resistor R38 (143kΩ). During the voltage transition, watch the inductor current by looking across R12 with a differential scope probe, or by inserting a current probe in series with the inductor. Observe the low, wellcontrolled inductor current that accompanies the voltage transition. The same slew-rate and controlled inductor current are used during shutdown and startup, resulting in well-controlled currents into and out of the battery (input source). There are two other methods to create an output-voltage transition. Select D0–D4 (JUA0–JUA4). Then either manually change the JUA0–JUA4 jumpers to a new VID code setting (Table 1), or remove all jumpers and drive the VID0–VID4 PC board test points externally to the desired code settings. For lower output current CPU applications, the MAX1980 slave controller can be disabled by cutting the trace shorting pins 1 and 2 of JU11. The slope of the voltage-positioned load line is decreased by onehalf. Changing the setting of the gain pin can compensate for the reduced slope. With the slave disabled, the MAX1994 can be operated in skip mode. Load-Transient Experiment One interesting experiment is to subject the output to large, fast-load transients and observe the output with an oscilloscope. This necessitates careful instrumentation of the output, using the supplied scope-probe jack. Accurate measurement of output ripple and load-transient response invariably requires that ground clip leads be completely avoided and that the probe hat be removed to expose the GND shield, so the probe can be plugged directly into the jack. Otherwise, EMI and noise pickup may corrupt the waveforms. Most benchtop electronic loads intended for powersupply testing lack the ability to subject the DC-to-DC converter to ultra-fast load transients. Emulating the supply current dI/dt at the CPU VCORE pins requires at least 10A/µs load transients. One easy method for generating such an abusive load transient is to solder a power MOSFET directly across the scope-probe jack. Then drive its gate with a strong pulse generator at a low duty cycle (<5%) to minimize heat stress in the MOSFET. Vary the high-level output voltage of the pulse generator to vary the load current. To determine the load current, you might expect to insert a meter in the load path, but this method is prohibited here by the need for low resistance and inductance in the path of the dummy load MOSFET. There are two easy alternative methods of determining how much load current a particular pulse-generator amplitude is causing. The easiest method is to observe the currents through inductors L1 and L2 with a calibrated AC current probe or by looking across R12 and R45 with a differential probe. In the buck topology, the load current is approximately equal to the average value of the inductor currents. _______________________________________________________________________________________ 5 Evaluates: MAX1816/MAX1980/MAX1994 Disabling the MAX1980 Table 3. MAX1994 Offset Selection Truth Table OVPSET REF OFS0 REF OFS1 REF OFS2 REF ILIM2 REF LIMIT ILIM1 REF R3 OPEN R28 OPEN R20 OPEN R17 OPEN R14 OPEN R10 280kΩ 1% R2 OPEN VCC VCC VCC VOUT1 AGND1 AGND1 R6 SHORT AGND1 R5 OPEN R31 4.99kΩ AGND1 1% R30 OPEN VOUT1 R27 4.99kΩ AGND1 1% R21 OPEN VOUT1 R19 4.99kΩ AGND1 1% R18 OPEN R16 OPEN R15 SHORT C23 100pF R13 49.9kΩ AGND1 R11 OPEN VOUT2 R8 0Ω 1 VCC VDD R62 OPEN LINGOOD LINBSE VCC REF 2V REF AGND1 R32 10Ω AGND1 AGND1 C11 47pF OVPSET AGND1 C12 0.22µF AGND1 C8 0.22µF JU10 36 2 1 25 26 27 28 29 30 31 32 LINFB 14 15 10 16 CM+ 17 SKP1/SDN Figure 1. MAX1994 EV Kit Schematic (Sheet 1 of 4) _______________________________________________________________________________________ 3 1 2 S1 19 20 3 2 AGND1 AGND1 JU4 VCC S0 18 JU7 21 48 1 47 JU8 22 3 2 AGND1 VCC BACKSIDE METAL IS CONNECTED TO GND MAX1994 U1 4 3 7 8 9 6 AGND1 C27 OPEN 5 1 VCC C53 3.3µF OFS2 OFS1 OFS0 GAIN CS1+ CS1- BST1 LX1 VID0 VID1 VID2 VID3 VID4 13 OVPSET TIME 12 11 JU12 AGND1 3 1 2 LINGOOD LINBSE AGND VCC REF FB2 ILIM2 CC ILIM1 AGND1 3 1 2 VCC CUT HERE (PC TRACE) 33 ILIM2 ILIM1 DPSLP# SUS R54 100kΩ LINFB R38 143kΩ 1% 3 JU3 VCC R61 OPEN 1 2 AGND1 SLAVE_OFF D1 GAIN P1 OPEN 3 DPSLP# R4 OPEN SUS D2 R1 OPEN S1 VCC BST1 2 SKP1/SDN FBS VCC LX1 LIN/SDN VCC D0 OFS2 D3 OFS1 D4 GAIN OSF0 S0 CS1- CS1+ SKP2/SDN GDS 23 PGOOD 6 VDD DL1 PERF DH1 OUT2 CS2 V+ BST2 LX2 DH2 DL2 R57 100kΩ TON1 AGND1 PGOOD VCC C24 1000pF 34 R40 100Ω 3 1 2 VCC R59 0Ω BST2 LX2 DH2 DL2 VDD TRIG JU13 DH1 GDS VOUT1 AGND1 VBATT C48 OPEN 35 37 38 39 40 41 43 42 44 45 46 AGND1 PGND 24 R56 0Ω R55 10Ω C47 OPEN TON REF VOUT2 CS2 LINFB R51 220Ω LINBSE AGND1 CS1- CS1+ PERF R53 100kΩ 1% R52 20kΩ 1% 1 C49 OPEN AGND1 Q1 GDS VOUT1 V_VID 3V3 VOUT1 (CM-) CM+ GND_SENSE VOUT1_SENSE AGND1 C46 10µF 6.3V C50 4.7µF 6.3V AGND1 R49 4.7Ω R48 4.7Ω AGND1 2 3 3V3 AGND1 C55 0.022µF C25 OPEN C54 0.022µF Evaluates: MAX1816/MAX1980/MAX1994 MAX1994 Evaluation Kit _______________________________________________________________________________________ CS2 DL2 LX2 BST2 LX1 BST1 C2 10µF 25V TRIG C1 OPEN C4 10µF 25V 1 4 5 6 1 R58 SHORT (PC TRACE) 4 5 6 C9 0.1µF R7 SHORT (PC TRACE) C3 10µF 25V C14 0.1µF 3 2 R39 0.005Ω 1% N11 8 7 4 1 5 6 3 2 N2 8 7 VDD 1 4 DH2 VBATT 5 6 D7 CMPSH-3 VDD 3 2 N5 8 7 C15 2.2µF 10V D2 CMPSH-3 DH1 C20 OPEN D1 5 6 4 1 2 5 6 3 2 D6 N13 8 7 L1 0.6µH 3 1 N4 N1 3 2 8 7 8 7 C21 10µF 25V L3 1.2µH 4 R12 0.001Ω CM+ VOUT2 GDS R60 OPEN C18 C19 330µF OPEN GND 2.5V C22 OPEN R9 0Ω DH1 D3 +5V VBIAS C29 C26 OPEN C10 C13 330µF OPEN 2.5V C16 OPEN 1 J1 SCOPE JACK 2 VOUT1 C31 C32 C33 C35 C34 330µF 330µF 330µF OPEN OPEN GND 2.5V 2.5V 2.5V C7 C5 C6 330µF 330µF OPEN 2.5V 2.5V (CM-) VDD Evaluates: MAX1816/MAX1980/MAX1994 VBATT MAX1994 Evaluation Kit Figure 1. MAX1994 EV Kit Schematic (Sheet 2 of 4) 7 JU5 VDD 8 VID0 VID1 VID2 VID3 VID4 VID_VCC R22 100kΩ R23 100kΩ R24 100kΩ R25 100kΩ R26 100kΩ VID0 VID1 VID2 VID3 VID4 JUA0 JUA1 JUA2 JUA3 JUA4 AGND1 AGND1 AGND1 AGND1 AGND1 S1 S0 2 2 AGND1 JU2 1 4 VCC AGND1 JU1 1 4 VCC 3 3 REF REF Evaluates: MAX1816/MAX1980/MAX1994 MAX1994 Evaluation Kit Figure 1. MAX1994 EV Kit Schematic (Sheet 3 of 4) _______________________________________________________________________________________ _______________________________________________________________________________________ REF AGND1 R29 49.9kΩ 1% 7 9 POL PGND GND 550kHz AGND2 3 R46 200Ω MAX1980 U3 VDD 11 VDD CM+ 1 CM+ C28 4700pF R33 200Ω COMP VOUT1 2 CM- CS- CS+ DL LX DH BST V+ Y VCC 17 BACKSIDE METAL IS CONNECTED TO GND VCC 12 R47 20Ω U2 NC7SZ04 VCCS LIMIT TRIG ILIM DD 1 200kΩ JU9 3 2 TON VCC AGND2 8 18 20 19 R36 100kΩ 13 AGND2 AGND2 JU6 AGND2 3 2 1 VCC LIMIT TRIG 3 JU11 FLOAT = 300kHz DISABLE R42 280kΩ 1% AGND2 R50 SHORT (PC TRACE) AGND2 C36 100pF R41 OPEN VCCS 2 1 C38 0.22µF GND A N.C. 6 4 5 10 15 14 16 4 5 R63 OPEN VDD C37 270pF C30 4700pF R37 SHORT (PC TRACE) VCC R44 OPEN R43 20kΩ R34 200Ω R35 200Ω C39 0.1µF D5 CMPSH-3 4 4 6 5 C40 6 2.2µF 5 10V SLAVE_OFF 1 1 3 2 N6 7 8 3 2 N9 7 8 CM+ 4 6 5 1 4 3 2 6 5 N10 7 8 1 3 2 N8 7 8 D4 L2 0.6µH R45 0.001Ω C41 C42 C43 C44 C45 10µF 10µF OPEN OPEN 10µF 25V 25V 25V VBATT VOUT1 Evaluates: MAX1816/MAX1980/MAX1994 VCCS AGND2 3 2 1 OPEN MAX1994 Evaluation Kit Figure 1. MAX1994 EV Kit Schematic (Sheet 4 of 4) 9 Evaluates: MAX1816/MAX1980/MAX1994 MAX1994 Evaluation Kit Jumper and Switch Settings Table 4. Jumper JU3 Function (FB2) SHUNT POSITION FB2 PIN MAX1994 OUTPUT 1 and 2 Connected to VCC VOUT2 = 1.8V 2 and 3 Connected to GND VOUT2 = 2.5V Not installed Connected to resistor-divider R61/R62. (Cut PC trace shorting JU2 pins 2 and 3 on the solder side.) Adjustable mode 1.0V < VOUT < 5.5V. (Refer to the MAX1994 data sheet for selection of output capacitor and inductor.) Table 5. Jumper JU4 Function (SKP1/SDN) SHUNT POSITION 1 and 2 SKP1/SDN PIN Connected to VCC MAX1994 OUTPUT BUCK1 output enabled. Normal PFM/PWM operation. VOUT1 is selected by VID DAC code (D0–D4) settings. 2 and 3 Connected to GND Shutdown mode, VOUT1 = 0V Not installed Floating. Connected to SKIP1/SHDN pad. Low-noise forced-PWM operation. (MAX1994 must be driven by an external signal.) Table 6. Jumper JU6 Function (Polarity Selection, MAX1980) SHUNT POSITION 1 and 2 2 and 3 10 POL PIN TRIGGER POLARITY SELECT Connected to VCC Trigger on the rising edge (default). Connected to GND Trigger on the falling edge. Install additional input capacitors C1 and C20 for in-phase operation. Table 7. Jumper JU7 Function (SKP2/SDN) SHUNT POSITION SKP2/SDN PIN MAX1994 OUTPUT 1 and 2 Connected to VCC BUCK2 output enabled, normal PFM/PWM operation (default), VOUT2 = 2.5V 2 and 3 Connected to GND Shutdown mode Not installed Floating Low-noise forced-PWM operation, VOUT2 = 2.5V Table 8. Jumper JU8 Function (LIN/SDN) SHUNT POSITION LIN/SDN PIN MAX1994 OUTPUT 1 and 2 Connected to VCC Linear-regulator output enabled, V_VID = 1.20V 2 and 3 Connected to GND Shutdown mode, V_VID = 0V Table 9. Jumper JU12 Function (Suspend Mode) SHUNT POSITION SUS PIN EFFECT 1 and 2 Connected to VCC The suspend mode VID code, as programmed by S0 and S1, is delivered to the DAC. 2 and 3 Connected to GND The suspend mode multiplexer is not used. ______________________________________________________________________________________ MAX1994 Evaluation Kit Evaluates: MAX1816/MAX1980/MAX1994 Figure 2. MAX1994 EV Kit Component Placement Guide—Top Silkscreen ______________________________________________________________________________________ 11 Evaluates: MAX1816/MAX1980/MAX1994 MAX1994 Evaluation Kit Figure 3. MAX1994 EV Kit PC Board Layout—Component Side 12 ______________________________________________________________________________________ MAX1994 Evaluation Kit Evaluates: MAX1816/MAX1980/MAX1994 Figure 4. MAX1994 EV Kit PC Board Layout—GND Layer 2 ______________________________________________________________________________________ 13 Evaluates: MAX1816/MAX1980/MAX1994 MAX1994 Evaluation Kit Figure 5. MAX1994 EV Kit PC Board Layout—GND Layer 3 14 ______________________________________________________________________________________ MAX1994 Evaluation Kit Evaluates: MAX1816/MAX1980/MAX1994 Figure 6. MAX1994 EV Kit PC Board Layout—Solder Side ______________________________________________________________________________________ 15 Evaluates: MAX1816/MAX1980/MAX1994 MAX1994 Evaluation Kit Figure 7. MAX1994 EV Kit Component Placement Guide—Bottom Silkscreen Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.