IRFR/U4615PbF HEXFET® Power MOSFET Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits VDSS RDS(on) typ. max. ID D G S Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free 150V 34m: 42m: 33A D D S G G DPak IRFR4615PbF D S IPAK IRFU4615PbF G D S Gate Drain Source Absolute Maximum Ratings Symbol ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V c Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) e dv/dt TJ TSTG Avalanche Characteristics EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy c d Units 33 24 140 144 0.96 ± 20 38 -55 to + 175 A W W/°C V V/ns °C 300 109 See Fig. 14, 15, 22a, 22b, c mJ A mJ Thermal Resistance Symbol RθJC RθJA RθJA 1 / 11 Parameter j Junction-to-Case Junction-to-Ambient (PCB Mount) Junction-to-Ambient i Typ. Max. Units ––– ––– ––– 1.045 50 110 °C/W www.freescale.net.cn IRFR/U4615PbF Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) IDSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current IGSS RG(int) Min. Typ. Max. Units Conditions Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage 150 ––– ––– 3.0 ––– ––– ––– ––– ––– 0.19 34 ––– ––– ––– ––– ––– ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 5mA 42 mΩ VGS = 10V, ID = 21A 5.0 V VDS = VGS, ID = 100µA VDS = 150V, VGS = 0V 20 µA 250 VDS = 150V, VGS = 0V, TJ = 125°C VGS = 20V 100 nA VGS = -20V -100 Internal Gate Resistance ––– 2.7 ––– f c Ω Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Min. Typ. Max. Units Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related) g h 35 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 26 8.6 9.0 17 15 35 25 20 1750 155 40 179 382 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Conditions S VDS = 50V, ID = 21A ID = 21A VDS = 75V nC VGS = 10V ID = 21A, VDS =0V, VGS = 10V VDD = 98V ID = 21A ns RG = 7.3Ω VGS = 10V VGS = 0V VDS = 50V (See Fig.5) pF ƒ = 1.0MHz VGS = 0V, VDS = 0V to 120V (See Fig.11) VGS = 0V, VDS = 0V to 120V f f h g Diode Characteristics Symbol IS Parameter Continuous Source Current VSD trr (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time ISM c 2 / 11 Min. Typ. Max. Units ––– ––– 33 A ––– ––– 140 Conditions MOSFET symbol showing the integral reverse D G S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 21A, VGS = 0V VR = 100V, TJ = 25°C ––– 70 ––– ns T = 125°C I ––– 83 ––– J F = 21A di/dt = 100A/µs TJ = 25°C ––– 177 ––– nC TJ = 125°C ––– 247 ––– ––– 4.9 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) f f www.freescale.net.cn IRFR/U4615PbF 1000 1000 VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V 5.0V ID, Drain-to-Source Current (A) 100 BOTTOM 10 TOP ID, Drain-to-Source Current (A) TOP 1 5.0V 0.1 100 BOTTOM VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 10 5.0V 1 ≤60µs PULSE WIDTH ≤60µs PULSE WIDTH Tj = 25°C Tj = 175°C 0.1 0.01 0.1 1 10 0.1 100 100 3.0 100 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 1000 TJ = 175°C TJ = 25°C 10 1 VDS = 50V ≤60µs PULSE WIDTH 0.1 ID = 21A VGS = 10V 2.5 2.0 1.5 1.0 0.5 2 4 6 8 10 12 14 16 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) Fig 4. Normalized On-Resistance vs. Temperature Fig 3. Typical Transfer Characteristics 100000 14.0 VGS, Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd 10000 C, Capacitance (pF) 10 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics Ciss 1000 Coss Crss 100 10 ID= 21A 12.0 VDS= 120V VDS= 75V 10.0 VDS= 30V 8.0 6.0 4.0 2.0 0.0 1 10 100 1000 VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 3 / 11 1 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) 0 5 10 15 20 25 30 35 QG, Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage www.freescale.net.cn IRFR/U4615PbF 1000 ID, Drain-to-Source Current (A) 100 T J = 175°C T J = 25°C 10 OPERATION IN THIS AREA LIMITED BY R DS(on) 100 100µsec 1msec 10 10msec DC 1 Tc = 25°C Tj = 175°C Single Pulse VGS = 0V 0.1 1.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1 1.6 ID, Drain Current (A) 35 30 25 20 15 10 5 0 75 100 125 150 175 V(BR)DSS , Drain-to-Source Breakdown Voltage (V) 40 50 1000 190 Id = 5mA 185 180 175 170 165 160 155 150 145 140 -60 -40 -20 0 20 40 60 80 100120140160180 T C , Case Temperature (°C) T J , Temperature ( °C ) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage 3.0 EAS , Single Pulse Avalanche Energy (mJ) 500 2.5 2.0 1.5 1.0 0.5 0.0 -20 0 20 40 60 80 100 120 140 160 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 / 11 100 Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage 25 10 VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) Energy (µJ) ISD, Reverse Drain Current (A) 1000 ID TOP 2.8A 5.3A BOTTOM 21A 450 400 350 300 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 12. Maximum Avalanche Energy vs. DrainCurrent www.freescale.net.cn IRFR/U4615PbF Thermal Response ( Z thJC ) °C/W 10 1 D = 0.50 0.20 0.10 0.05 0.02 0.01 0.1 τJ R1 R1 τJ τ1 R2 R2 R3 R3 τC τ τ1 τ2 τ3 τ2 τ3 τ4 τ4 Ci= τi/Ri Ci i/Ri 0.01 1E-005 τi (sec) 0.02324 0.000008 0.26212 0.000106 0.50102 0.001115 0.25880 0.005407 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 Ri (°C/W) R4 R4 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 100 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Tj = 150°C and Tstart =25°C (Single Pulse) 0.01 10 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 120 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 21A 100 80 60 40 20 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature 5 / 11 www.freescale.net.cn IRFR/U4615PbF 30 25 IF = 14A V R = 100V 20 TJ = 25°C TJ = 125°C 5.5 5.0 4.5 4.0 3.5 IRRM (A) VGS(th) , Gate threshold Voltage (V) 6.0 ID = 100µA 3.0 ID = 250uA 10 ID = 1.0mA ID = 1.0A 2.5 2.0 15 5 1.5 1.0 0 -75 -50 -25 0 25 50 75 100 125 150 175 0 200 T J , Temperature ( °C ) 600 800 1000 Fig. 17 - Typical Recovery Current vs. dif/dt Fig 16. Threshold Voltage vs. Temperature 35 800 IF = 21A V R = 100V 30 IF = 14A V R = 100V 700 TJ = 25°C TJ = 125°C 25 TJ = 25°C TJ = 125°C 600 20 QRR (A) IRRM (A) 400 diF /dt (A/µs) 15 500 400 10 300 5 200 0 100 0 200 400 600 800 1000 0 200 diF /dt (A/µs) 400 600 800 1000 diF /dt (A/µs) Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt 1000 IF = 21A V R = 100V 900 800 TJ = 25°C TJ = 125°C QRR (A) 700 600 500 400 300 200 100 0 200 400 600 800 1000 diF /dt (A/µs) Fig. 20 - Typical Stored Charge vs. dif/dt 6 / 11 www.freescale.net.cn IRFR/U4615PbF Driver Gate Drive D.U.T - - - * D.U.T. ISD Waveform Reverse Recovery Current + RG • • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Current Inductor Curent ISD Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V DRIVER L VDS tp D.U.T RG VGS 20V + V - DD IAS A 0.01Ω tp I AS Fig 22a. Unclamped Inductive Test Circuit RD VDS Fig 22b. Unclamped Inductive Waveforms VDS 90% VGS D.U.T. RG + - VDD V10V GS 10% VGS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % td(on) Fig 23a. Switching Time Test Circuit tr t d(off) Fig 23b. Switching Time Waveforms Id Current Regulator Same Type as D.U.T. Vds Vgs 50KΩ 12V tf .2µF .3µF D.U.T. + V - DS Vgs(th) VGS 3mA IG ID Current Sampling Resistors Fig 24a. Gate Charge Test Circuit 7 / 11 Qgs1 Qgs2 Qgd Qgodr Fig 24b. Gate Charge Waveform www.freescale.net.cn IRFR/U4615PbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. 10 / 11 www.freescale.net.cn IRFR/U4615PbF Orderable part number Package Type IRFR4615PbF IRFR4615TRPbF D-PAK D-PAK IRFU4615PbF I-PAK Standard Pack Form Quantity Tube/Bulk 75 Tape and Reel 2000 Tube/Bulk Note 75 Qualification Information† Industrial Qualification level †† ††† (per JEDEC JESD47F guidelines) Comments: This family of products has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. Moisture Sensitivity Level MSL1 D-PAK (per JEDEC J-STD-020D†††) Not applicable I-PAK RoHS Compliant Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 0.51mH RG = 25Ω, IAS = 21A, VGS =10V. Part not recommended for use above this value . ISD ≤ 21A, di/dt ≤ 549A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. Pulse width ≤ 400µs; duty cycle ≤ 2%. 11 / 11 Yes Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recom mended footprint and soldering techniques refer to application note #AN-994 Rθ is measured at TJ approximately 90°C www.freescale.net.cn