Freescale Semiconductor, Inc. MOTOROLA Document order number: MC33886/D Rev 6.0, 03/2004 SEMICONDUCTOR TECHNICAL DATA 33886 5.0 A H-Bridge Freescale Semiconductor, Inc... The 33886 is a monolithic H-Bridge ideal for fractional horsepower DC-motor and bi-directional thrust solenoid control. The IC incorporates internal control logic, charge pump, gate drive, and low RDS(ON) MOSFET output circuitry. The 33886 is able to control continuous inductive DC load currents up to 5.0 A. Output loads can be pulse width modulated (PWM-ed) at frequencies up to 10 kHz. 5.0 A H-BRIDGE A Fault Status output reports undervoltage, short circuit, and overtemperature conditions. Two independent inputs control the two halfbridge totem-pole outputs. Two disable inputs force the H-Bridge outputs to tri-state (exhibit high impedance). The 33886 is parametrically specified over a temperature range of -40°C ≤ TA ≤ 125°C, 5.0 V ≤ V+ ≤ 28 V. The IC can also be operated up to 40 V with derating of the specifications. The IC is available in a surface mount power package with exposed pad for heatsinking. Features • Similar to the MC33186DH1 with Enhanced Features • 5.0 V to 40 V Continuous Operation • 120 mΩ RDS(ON) H-Bridge MOSFETs • TTL /CMOS Compatible Inputs • PWM Frequencies up to 10 kHz • Active Current Limiting via Internal Constant OFF-Time PWM (with Temperature-Dependent Threshold Reduction) • Output Short Circuit Protection • Undervoltage Shutdown • Fault Status Reporting • Pb-Free Packaging Designated by Suffix Code VW DH SUFFIX VW (Pb-FREE) SUFFIX CASE 979C-02 20-TERMINAL HSOP ORDERING INFORMATION Device MC33886DH/R2 MC33886VW/R2 Simplified Application Diagram 33886 Simplified Application Diagram V+ 33886 33886 5.0 V CCP IN OUT MCU OUT OUT OUT © Motorola, Inc. 2004 V+ OUT1 FS IN1 IN2 D1 D2 Motor OUT2 PGND AGND For More Information On This Product, Go to: www.freescale.com Temperature Range (TA) Package -40°C to 125°C 20 HSOP Freescale Semiconductor, Inc. C CCP CP VPWR V+ Charge Pump 80 µA 80 uA (each) OUT1 Freescale Semiconductor, Inc... IN1 IN2 D1 D2 Current Limit, Limit, Current Overcurrent Short Circuit Sense Sense Circuit Circuit 5.0 V Regulator Regulator Gate Drive OUT2 25 µA 25 uA Control Logic OverOvertemperature temperature Undervoltage FS AGND PGND Figure 1. 33886 Simplified Internal Block Diagram 33886 2 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. AGND 1 20 DNC FS 2 19 IN2 IN1 3 18 D1 V+ 4 17 CCP V+ 5 16 V+ OUT1 6 15 OUT2 OUT1 7 14 OUT2 DNC 8 13 D2 PGND 9 12 PGND PGND 10 11 PGND TERMINAL FUNCTION DESCRIPTION Terminal Terminal Name Formal Name 1 AGND Analog Ground 2 FS Fault Status for H-Bridge 3 IN1 Logic Input Control 1 4, 5, 16 V+ Positive Power Supply 6, 7 OUT1 H-Bridge Output 1 8, 20 DNC Do Not Connect 9–12 PGND Power Ground 13 D2 Disable 2 14, 15 OUT2 H-Bridge Output 2 17 CCP Charge Pump Capacitor 18 D1 Disable 1 19 IN2 Logic Input Control 2 Definition Low-current analog signal ground. Open drain active Low Fault Status output requiring a pull-up resistor to 5.0 V. True logic input control of OUT1 (i.e., IN1 logic High = OUT1 logic High). Positive supply connections. Output 1 of H-Bridge. Either do not connect (leave floating) or connect these terminals to ground in the application. They are test mode terminals used in manufacturing only. Device high-current power ground. Active Low input used to simultaneously tri-state disable both H-Bridge outputs. When D2 is logic Low, both outputs are tri-stated. Output 2 of H-Bridge. External reservoir capacitor connection for internal charge pump capacitor. Active High input used to simultaneously tri-state disable both H-Bridge outputs. When D1 is logic High, both outputs are tri-stated. True logic input control of OUT2 (i.e., IN2 logic High = OUT2 logic High). MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33886 3 Freescale Semiconductor, Inc. MAXIMUM RATINGS All voltages are with respect to ground unless otherwise noted. Rating Symbol Value Unit Supply Voltage V+ 40 V Input Voltage (Note 1) VIN -0.1 to 7.0 V FS Status Output (Note 2) V FS 7.0 V Continuous Current (Note 3) IOUT 5.0 A VESD1 ±2000 (Note 6) ±200 V ESD Voltage for DH Package Human Body Model (Note 4) Machine Model (Note 5) VESD2 V Freescale Semiconductor, Inc... ESD Voltage for VW Package VESD1 VESD2 ±2000 ±200 TSTG -65 to 150 °C Ambient Operating Temperature (Note 7) TA -40 to 125 °C Operating Junction Temperature TJ -40 to 150 °C Human Body Model (Note 4) Machine Model (Note 5) Storage Temperature °C TSOLDER Terminal Soldering Temperature (Note 8) DH Suffix 220 VW (Pb-Free Suffix) 260 Approximate Junction-to-Board Thermal Resistance (and Package Dissipation = 6.0 W) (Note 9) Notes 1. 2. 3. 4. RθJB ~5.0 °C/W Exceeding the input voltage on IN1, IN2, D1, or D2 may cause a malfunction or permanent damage to the device. Exceeding the pull-up resistor voltage on the open drain FS terminal may cause permanent damage to the device. Continuous current capability so long as junction temperature is ≤ 150°C. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω). 5. ESD2 testing is performed in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 Ω). 6. All terminals are capable of Human Body Model ESD voltages of ±2000 V with two exceptions pertaining only to the DH suffix package: (1) D2 to PGND is capable of ±1500 V and (2) OUT1 to AGND is capable of ±1000 V. The limiting factor is junction temperature, taking into account the power dissipation, thermal resistance, and heatsinking. Terminal soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. Exposed heatsink pad plus the power and ground terminals comprise the main heat conduction paths. The actual RθJB (junction-to-PC board) values will vary depending on solder thickness and composition and copper trace. 7. 8. 9. 33886 4 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions 5.0 V ≤ V+ ≤ 28 V and -40°C ≤ TA ≤ 125°C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max Unit V+ 5.0 – 40 V – – 20 4.15 4.5 150 4.4 4.75 – 4.65 5.0 – 3.35 – – – – 20 3.5 – 0.7 – – 1.0 – 1.4 – -200 -80 – – 25 100 POWER SUPPLY Operating Voltage Range (Note 10) IQ(standby) Standby Supply Current mA VEN = 5.0 V, IOUT = 0 A Freescale Semiconductor, Inc... Threshold Supply Voltage V+(thres-OFF) V+(thres-ON) V+(hys) Switch-OFF Switch-ON Hysteresis V V mV CHARGE PUMP VCP - V+ Charge Pump Voltage V+ = 5.0 V 8.0 V ≤ V+ ≤ 40 V V CONTROL INPUTS V Input Voltage (IN1, IN2, D1, D2) VIH VIL VHYS Threshold High Threshold Low Hysteresis µA IIN Input Current (IN1, IN2, D1) (Note 11) VIN = 0 V µA I D2 D2 Input Current (Note 12) V D2 = 5.0 V Notes 10. Specifications are characterized over the range of 5.0 V ≤ V+ ≤ 28 V. Operation >28 V will cause some parameters to exceed listed min/max values. Refer to typical operating curves to extrapolate values for operation >28 V but ≤ 40 V. 11. Inputs IN1, IN2, and D1 have independent internal pull-up current sources. 12. The D2 input incorporates an active internal pull-down current sink. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33886 5 Freescale Semiconductor, Inc. STATIC ELECTRICAL CHARACTERISTICS (continued) Characteristics noted under conditions 5.0 V ≤ V+ ≤ 28 V and -40°C ≤ TA ≤ 125°C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max 5.0 V ≤ V+ ≤ 28 V, TJ = 25°C – 120 – 8.0 V ≤ V+ ≤ 28 V, TJ = 150°C – – 225 5.0 V ≤ V+ ≤ 8.0 V, TJ = 150°C – – 300 5.2 6.5 7.8 Unit POWER OUTPUTS (OUT1, OUT2) Freescale Semiconductor, Inc... mΩ RDS(ON) Output-ON Resistance (Note 13) Active Current Limiting Threshold (via Internal Constant OFF-Time PWM) (Note 14) ILIM High-Side Short Circuit Detection Threshold ISCH 11 – – A Low-Side Short Circuit Detection Threshold ISCL 8.0 – – A VOUT = V+ – 100 200 VOUT = GND – 30 60 – – 2.0 175 – – 15 – – – – 10 Leakage Current (Note 15) A µA IOUT(leak) Output FET Body Diode Forward Voltage Drop (Note 16) V VF IOUT = 3.0 A °C Switch-OFF Thermal Shutdown Hysteresis TLIM THYS FAULT STATUS (Note 17) Fault Status Leakage Current (Note 18) Fault Status Set Voltage (Note 19) I FS = 300 µA µA I FS(leak) V FS = 5.0 V V V FS(LOW) – – 1.0 Notes 13. Output-ON resistance as measured from output to V+ and ground. 14. Product with date codes of December 2002, week 51, will exhibit the values indicated in this table. Product with earlier date codes may exhibit a minimum of 6.0 A and a maximum of 8.5 A. 15. Outputs switched OFF with D1 or D2. 16. Parameter is guaranteed by design but not production tested. 17. Fault Status output is an open drain output requiring a pull-up resistor to 5.0 V. 18. Fault Status Leakage Current is measured with Fault Status High and not set. 19. Fault Status Set Voltage is measured with Fault Status Low and set with I FS = 300 µA. 33886 6 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. DYNAMIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions 5.0 V ≤ V+ ≤ 28 V and -40°C ≤ TA ≤ 125°C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max Unit PWM Frequency (Note 20) f PWM – – 10 kHz Maximum Switching Frequency During Active Current Limiting (Note 21) f MAX – – 20 kHz Output ON Delay (Note 22) t d (ON) – – 18 – – 18 2.0 5.0 8.0 TIMING CHARACTERISTICS V+ = 14 V µs t d(OFF) Output OFF Delay (Note 22) Freescale Semiconductor, Inc... µs V+ = 14 V µs tf , t r Output Rise and Fall Time (Note 23) V+ = 14 V, IOUT = 3.0 A Output Latch-OFF Time ta 15 20.5 26 µs Output Blanking Time tb 12 16.5 21 µs Output FET Body Diode Reverse Recovery Time (Note 24) t rr 100 – – ns t d(disable) – – 8.0 µs t FAULT – 4.0 – µs t pod – 1.0 5.0 ms Disable Delay Time (Note 25) Short Circuit/Overtemperature Turn-OFF Time (Note 26) Power-OFF Delay Time Notes 20. The outputs can be PWM controlled from an external source. This is typically done by holding one input high while applying a PWM pulse train to the other input. The maximum PWM frequency obtainable is a compromise between switching losses and switching frequency. Refer to Typical Switching Waveforms, Figures 11 through 18, pp. 12–13. 21. The Maximum Switching Frequency during active current limiting is internally implemented. The internal control produces a constant OFFtime PWM of the output. The output load current effects the Maximum Switching Frequency. 22. Output Delay is the time duration from the midpoint of the IN1 or IN2 input signal to the 10% or 90% point (dependent on the transition direction) of the OUT1 or OUT2 signal. If the output is transitioning High-to-Low, the delay is from the midpoint of the input signal to the 90% point of the output response signal. If the output is transitioning Low-to-High, the delay is from the midpoint of the input signal to the 10% point of the output response signal. See Figure 2, page 8. 23. Rise Time is from the 10% to the 90% level and Fall Time is from the 90% to the 10% level of the output signal. See Figure 4, page 8. 24. Parameter is guaranteed by design but not production tested. 25. Disable Delay Time is the time duration from the midpoint of the D (disable) input signal to 10% of the output tri-state response. See Figure 3, page 8. 26. Increasing currents will become limited at ILIM. Hard shorts will breach the ISCH or ISCL limit, forcing the output into an immediate tri-state latch-OFF. See Figures 6 and 7, page 9. Active current limiting will cause junction temperatures to rise. A junction temperature above 160°C will cause the active current limiting to progressively "fold back" (or decrease) to 2.5 A typical at 175°C where thermal latch-OFF will occur. See Figure 5, page 8. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33886 7 Freescale Semiconductor, Inc. Timing Diagrams VIN1, IN2 (V) 5.0 0 VOUT1, 2 (V) 50% 50% td(OFF) td(ON) VPWR 90% 10% 0 TIME Freescale Semiconductor, Inc... Figure 2. Output Delay Time 5.0 V 0V ∞Ω 0Ω VOUT1, 2 (V) Figure 3. Disable Delay Time V PWR tf tr 90% 90% 10% 10% 0 IIMAX CURRENT (A) (A) LIM, IOUTPUT LIM, CURRENT Figure 4. Output Switching Time 6.5 6.6 2.5 Thermal Shutdown 160 175 T J, JUNCTION TEMPERATURE (o C) Figure 5. Active Current Limiting Versus Temperature (Typical) 33886 8 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Diode Reverse INn, LOGIC IN D1, LOGIC IN D2, LOGIC IN FS, SF LOGIC OUT 8.0 ISCL Short Circuit Detect Threshold Typ. Short Ckt. Detect Threshold 6.5 Typical Current Threshold Typ. Current Limit Limiting Threshold for Low-Side FETs PWM Active Current Current Limiting Limiting (See Figure 6) 7) (SeeFigure (See 7) Hard and Latch-OFF HardShort ShortDetect Detect and Latch-Off 0 [1] [0] IN1 IN1IN2 IN2 or IN2 IN2 IN1 OR IN2OR orIN2 IN1 IN1 IN2 IN2 or OR IN1 IN1OR orIN1 IN2 IN2 [1] [0] [1] [0] [1] Outputs Outputs Tristated Tri-stated OutputsOperational Operational Outputs (perInput InputControl Control Condition) Condition) (per Outputs Tristated Tri-stated [0] TIME Figure 6. Active Current Limiting Versus Time CURRENT ILOAD , OUTPUT IOUT , CURRENT (A) (A) Freescale Semiconductor, Inc... IOUT , CURRENT (A) (A) CURRENT IILOAD ,, OUTPUT OUT Spikes LoadRecovery Capacitance and/or Diode Reverse Recovery Spikes IShort Circuit Detect Threshold Circuit Detect Threshold Overcurrent Minimum Threshold SCL Short 8.0 ta tb 6.5 Output Latch-OFF taa == Tristate Output OFFTime Time Output Blanking Time ttbb ==Current Limit Blank Time Typical Current Typical Load LimitingPWM Waveform Current Limiting Waveform Hard Short OutputDetect Hard Short Latch-OFF Latch-Off Prevented During tb TIME Figure 7. Active Current Limiting Detail MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33886 9 Freescale Semiconductor, Inc. Electrical Performance Curves 0.40 0.35 0.30 Ohms 0.20 0.15 0.10 0.05 0.0 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 33 35 37 39 41 Volts Figure 8. Typical High-Side RDS(ON) Versus V+ 0.13 0.128 Ohms OHMS Freescale Semiconductor, Inc... 0.25 0.126 0.124 0.122 0.12 5 7 9 11 13 15 17 19 21 23 25 27 29 31 Volts VPWR Figure 9. Typical Low-Side RDS(ON) Versus V+ 33886 10 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. 9.0 8.0 7.0 OHMS milliamperes Freescale Semiconductor, Inc... 6.0 5.0 4.0 3.0 2.0 1.0 0.0 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 Volts VPWR Figure 10. Typical Quiescent Supply Current Versus V+ MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33886 11 Freescale Semiconductor, Inc. Typical Switching Waveforms Important For all plots, the following applies: • Ch2=2.0 A per division • LLOAD =533 µH @ 1.0 kHz • LLOAD =530 µH @ 10.0 kHz • RLOAD =4.0 Ω Output Voltage (OUT1) Freescale Semiconductor, Inc... Output Voltage (OUT1) IOUT IOUT Input Voltage (IN1) Input Voltage (IN1) V+=24 V fPWM =1.0 kHz Duty Cycle=10% Figure 11. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 10% V+=34 V fPWM =1.0 kHz Duty Cycle=90% Figure 13. Output Voltage and Current vs. Input Voltage at V+ = 34 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 90%, Showing Device in Current Limiting Mode Output Voltage (OUT1) Output Voltage (OUT1) IOUT IOUT Input Voltage (IN1) Input Voltage (IN1) V+=24 V fPWM =1.0 kHz Duty Cycle=50% Figure 12. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 50% 33886 12 V+=22 V fPWM =1.0 kHz Duty Cycle=90% Figure 14. Output Voltage and Current vs. Input Voltage at V+ = 22 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 90% MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Output Voltage (OUT1) Output Voltage (OUT1) IOUT Freescale Semiconductor, Inc... IOUT Input Voltage (IN1) Input Voltage (IN1) V+=24 V fPWM =10 kHz V+=12 V Duty Cycle=50% Figure 15. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 10 kHz, and Duty Cycle of 50% Output Voltage (OUT1) IOUT IOUT Input Voltage (IN1) Input Voltage (IN1) fPWM =10 kHz Duty Cycle=90% Figure 16. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 10 kHz, and Duty Cycle of 90% MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA Duty Cycle=50% Figure 17. Output Voltage and Current vs. Input Voltage at V+ = 12 V, PMW Frequency of 20 kHz, and Duty Cycle of 50% for a Purely Resistive Load Output Voltage (OUT1) V+=24 V fPWM =20 kHz V+=12 V fPWM =20 kHz Duty Cycle=90% Figure 18. Output Voltage and Current vs. Input Voltage at V+ = 12 V, PMW Frequency of 20 kHz, and Duty Cycle of 90% for a Purely Resistive Load For More Information On This Product, Go to: www.freescale.com 33886 13 Freescale Semiconductor, Inc. Table 1. Truth Table The tri-state conditions and the fault status are reset using D1 or D2. The truth table uses the following notations: L = Low, H = High, X = High or Low, and Z = High impedance (all output power transistors are switched off). Freescale Semiconductor, Inc... Fault Status Flag Input Conditions Device State Output States D1 D2 IN1 IN2 FS OUT1 OUT2 Forward L H H L H H L Reverse L H L H H L H Freewheeling Low L H L L H L L Freewheeling High L H H H H H H Disable 1 (D1) H X X X L Z Z Disable 2 (D2) X L X X L Z Z IN1 Disconnected L H Z X H H X IN2 Disconnected L H X Z H X H D1 Disconnected Z X X X L Z Z D2 Disconnected X Z X X L Z Z Undervoltage (Note 27) X X X X L Z Z Overtemperature (Note 28) X X X X L Z Z Short Circuit (Note 28) X X X X L Z Z Notes 27. In the case of an undervoltage condition, the outputs tri-state and the fault status is set logic Low. Upon undervoltage recovery, fault status is reset automatically or automatically cleared and the outputs are restored to their original operating condition. 28. When a short circuit or overtemperature condition is detected, the power outputs are tri-state latched-OFF independent of the input signals and the fault status flag is set logic Low. 33886 14 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. SYSTEM/APPLICATION INFORMATION INTRODUCTION Freescale Semiconductor, Inc... Numerous protection and operational features (speed, torque, direction, dynamic braking, and PWM control), in addition to the 5.0 A current capability, make the 33886 a very attractive, cost-effective solution for controlling a broad range of fractional horsepower DC motors. A pair of 33886 devices can be used to control bipolar stepper motors in both directions. In addition, the 33886 can be used to control permanent magnet solenoids in a push-pull variable force fashion using PWM control. The 33886 can also be used to excite transformer primary windings with a switched square wave to produce secondary winding AC currents. As shown in Figure 1, Simplified Internal Block Diagram, page 2, the 33886 is a fully protected monolithic H-Bridge with Fault Status reporting. For a DC motor to run the input conditions need be as follows: D1 input logic Low, D2 input logic High, FS flag cleared (logic High), with one IN logic Low and the other IN logic High to define output polarity. The 33886 can execute dynamic braking by simultaneously turning on either both high-side MOSFETs or both low-side MOSFETs in the output H-Bridge; e.g., IN1 and IN2 logic High or IN1 and IN2 logic Low. The 33886 outputs are capable of providing a continuous DC load current of 5.0 A from a 40 V V+ source. An internal charge pump supports PWM frequencies up to 10 kHz. An external pull-up resistor is required for the open drain FS terminal for fault status reporting. Two independent inputs (IN1 and IN2) provide control of the two totem-pole half-bridge outputs. Two disable inputs (D1 and D2) are for forcing the H-Bridge outputs to a high impedance state (all H-Bridge switches OFF). The 33886 has undervoltage shutdown with automatic recovery, active current limiting, output short-circuit latch-OFF, and overtemperature latch-OFF. An undervoltage shutdown, output short circuit latch-OFF, or overtemperature latch-OFF fault condition will cause the outputs to turn OFF (i.e., become high impedance or tri-stated) and the fault output flag to be set Low. Either of the Disable inputs or V+ must be “toggled” to clear the fault flag. The short circuit/overtemperature shutdown scheme is unique and best described as using a junction temperaturedependent active current “fold back” protection scheme. When a short circuit condition is experienced, the current limited output is “ramped down” as the junction temperature increases above 160°C, until at 175°C the current has decreased to about 2.5 A. Above 175°C, overtemperature shutdown (latch-OFF) occurs. This feature allows the device to remain in operation for a longer time with unexpected loads, while still retaining adequate protection for both the device and the load. FUNCTIONAL TERMINAL DESCRIPTION PGND and AGND Fault Status (FS) Power and analog ground terminals. The power and analog ground terminals should be connected together with a very low impedance connection. This terminal is the device fault status output. This output is an active Low open drain structure requiring a pull-up resistor to 5.0 V. Refer to Table 1, Truth Table, page 14. V+ IN1, IN2, D1, and D2 V+ terminals are the power supply inputs to the device. All V+ terminals must be connected together on the printed circuit board with as short as possible traces offering as low impedance as possible between terminals. These terminals are input control terminals used to control the outputs. These terminals are 5.0 V CMOS-compatible inputs with hysteresis. The IN1 and IN2 independently control OUT1 and OUT2, respectively. D1 and D2 are complimentary inputs used to tri-state disable the H-Bridge outputs. V+ terminals have an undervoltage threshold. If the supply voltage drops below a V+ undervoltage threshold, the output power stage switches to a tri-state condition and the fault status flag is set and the Fault Status terminal voltage switched to a logic Low. When the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input terminals and the fault status flag is automatically reset logic High. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA When either D1 or D2 is set (D1 = logic High or D2 = logic Low) in the disable state, outputs OUT1 and OUT2 are both tristate disabled; however, the rest of the device circuitry is fully operational and the supply IQ(standby) current is reduced to a few milliamperes. Refer to Table 1, Truth Table, and STATIC ELECTRICAL CHARACTERISTICS table, page 5. For More Information On This Product, Go to: www.freescale.com 33886 15 Freescale Semiconductor, Inc. OUT1 and OUT2 CCP These terminals are the outputs of the H-Bridge with integrated output FET body diodes. The bridge output is controlled using the IN1, IN2, D1, and D2 inputs. The outputs have active current limiting above 6.5 A. The outputs also have thermal shutdown (tri-state latch-OFF) with hysteresis as well as short circuit latch-OFF protection. Charge pump output terminal. A filter capacitor (up to 33 nF) can be connected from the CCP terminal and PGND. The device can operate without the external capacitor, although the CCP capacitor helps to reduce noise and allows the device to perform at maximum speed, timing, and PWM frequency. A disable timer (time t b) incorporated to detect currents that are higher than active current limit is activated at each output activation to facilitate detecting hard output short conditions (see Figure 7, page 9). Freescale Semiconductor, Inc... PERFORMANCE FEATURES Short Circuit Protection Overtemperature Shutdown and Hysteresis If an output short circuit condition is detected, the power outputs tri-state (latch-OFF) independent of the input (IN1 and IN2) states, and the fault status output flag is set logic Low. If the D1 input changes from logic High to logic Low, or if the D2 input changes from logic Low to logic High, the output bridge will become operational again and the fault status flag will be reset (cleared) to a logic High state. If an overtemperature condition occurs, the power outputs are tri-state (latched-OFF) independent of the input signals and the fault status flag is set logic Low. The output stage will always switch into the mode defined by the input terminals (IN1, IN2, D1, and D2), provided the device junction temperature is within the specified operating temperature. Note Resetting from the fault condition will clear the fault status flag. Main Differences Compared to MC33186DH1 Active Current Limiting The maximum current flow under normal operating conditions is internally limited to ILIM (5.2 A to 7.8 A). When the maximum current value is reached, the output stages are tristated for a fixed time (t a) of 20 µs typical. Depending on the time constant associated with the load characteristics, the current decreases during the tri-state duration until the next output ON cycle occurs (see Figures 7 and 13, page 9 and page 12, respectively). The current limiting threshold value is dependent upon the device junction temperature. When -40°C < TJ < 160°C, ILIM is between 5.2 A and 7.8 A. When TJ exceeds 160°C, the ILIM current decreases linearly down to 2.5 A typical at 175°C. Above 175°C the device overtemperature circuit detects TLIM and overtemperature shutdown occurs (see Figure 5, page 8). This feature allows the device to remain operational for a longer time but at a regressing output performance level at junction temperatures above 160°C. 33886 16 To reset from this condition, D1 must change from logic High to logic Low, or D2 must change from logic Low to logic High. When reset, the output stage switches ON again, provided that the junction temperature is now below the overtemperature threshold limit minus the hysteresis. • COD terminal has been removed. Terminal 8 is now a Do Not Connect (DNC) terminal. • Terminal 20 is no longer connected in the 20 HSOP package. It is now a DNC terminal. • RDS(ON) max at TJ = 150°C is now 225 mΩ per each output transistor. • Maximum temperature operation is now 160°C, as minimum thermal shutdown temperature has increased. • Current regulation limiting foldback is implemented above 160°C TJ. • Thermal resistance junction to case has been increased from ~2.0°C/W to ~5.0°C/W. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. PACKAGE INFORMATION The 33886 is designed for enhanced thermal performance. The significant feature of this device is the exposed copper pad on which the power die is soldered. This pad is soldered on a PCB to provide heat flow to ambient and also to provide thermal capacitance. The more copper area on the PCB, the better the power dissipation and transient behavior will be. Example Characterization on a double-sided PCB: bottom side area of copper is 7.8 cm2; top surface is 2.7 cm2 (see Figure 19); grid array of 24 vias 0.3 mm in diameter. Figure 20 shows the thermal response with the device soldered on to the test PCB described in Figure 19. 100 10 Rth (°C/W) Freescale Semiconductor, Inc... 1 0,1 0,001 0,01 0,1 1 10 t, Time (s) 100 1000 10000 Figure 20. 33886 Thermal Response Top Side Bottom Side Figure 19. PCB Test Layout MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33886 17 Freescale Semiconductor, Inc. APPLICATIONS A typical application schematic is shown in Figure 21. For precision high-current applications in harsh, noisy environments, the V+ by-pass capacitor may need to be substantially larger. DC MOTOR V+ 33886 AGND V+ Freescale Semiconductor, Inc... CCP OUT1 33 nF + 47 µF OUT2 D2 D1 FS PGND IN1 IN2 IN2 IN1 FS D1 D2 Figure 21. 33886 Typical Application Schematic 33886 18 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. PACKAGE DIMENSIONS DH SUFFIX VW (Pb-FREE) SUFFIX 20-TERMINAL HSOP PLASTIC PACKAGE CASE 979C-02 ISSUE A PIN ONE ID h X 45 ° E2 20 1 D1 D e/2 10 B 11 EXPOSED HEATSINK AREA E1 E bbb M E4 A 10X BOTTOM VIEW C B Y H DATUM PLANE b1 A A2 c1 c C SEATING PLANE b aaa C A L1 q W W L A3 bbb C M SECTION W-W GAUGE PLANE A1 Freescale Semiconductor, Inc... D2 e 18X E3 NOTES: 1. CONTROLLING DIMENSION: MILLIMETER. 2. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DATUM PLANE -H- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.150 PER SIDE. DIMENSIONS D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 5. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE b DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-. 7. DIMENSION D DOES NOT INCLUDE TIEBAR PROTRUSIONS. ALLOWABLE TIEBAR PROTRUSIONS ARE 0.150 PER SIDE. (1.600) MILLIMETERS DIM MIN MAX A 3.000 3.400 A1 0.100 0.300 A2 2.900 3.100 A3 0.00 0.100 D 15.800 16.000 D1 11.700 12.600 D2 0.900 1.100 E 13.950 14.450 E1 10.900 11.100 E2 2.500 2.700 E3 6.400 7.200 E4 2.700 2.900 L 0.840 1.100 L1 0.350 BSC b 0.400 0.520 b1 0.400 0.482 c 0.230 0.320 c1 0.230 0.280 e 1.270 BSC h --- 1.100 q 0° 8° aaa 0.200 bbb 0.100 DETAIL Y MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA For More Information On This Product, Go to: www.freescale.com 33886 19 Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. 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Minato-ku, Tokyo 106-8573, Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 HOME PAGE: http://motorola.com/semiconductors For More Information On This Product, Go to: www.freescale.com MC33886/D