VISHAY SI7949DP-T1-E3

Si7949DP
Vishay Siliconix
Dual P-Channel 60-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
- 60
RDS(on) (Ω)
ID (A)
0.064 at VGS = - 10 V
-5
0.080 at VGS = - 4.5 V
- 4.5
Qg (Typ.)
26
• Halogen-free According to IEC 61249-2-21
Available
• TrenchFET® Power MOSFET
• New Low Thermal Resistance PowerPAK®
Package with Low 1.07 mm Profile
PowerPAK SO-8
S1
6.15 mm
S1
5.15 mm
1
S2
G1
2
S2
3
G2
4
G1
D1
8
G2
D1
7
D2
6
D2
5
Bottom View
Ordering Information: Si7949DP-T1-E3 (Lead (Pb)-free)
Si7949DP-T1-GE3 (Lead (Pb)-free and Halogen-free)
D1
D2
P-Channel MOSFET
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Drain-Source Voltage
Gate-Source Voltage
Symbol
VDS
VGS
TA = 25 °C
TA = 70 °C
Continuous Drain Current (TJ = 150 °C)a
Pulsed Drain Current
a
Continuous Source Current (Diode Conduction)
Avalanche Current
Single Pulse Avalanche Energy
Maximum Power Dissipation
L = 0.1 mH
TA = 25 °C
TA = 70 °C
a
IDM
IS
IAS
EAS
PD
TJ, Tstg
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
ID
b,c
10 s
-5
-4
- 2.9
3.5
2.2
Steady State
- 60
± 20
- 3.2
- 2.6
- 25
- 1.2
22
24.2
1.5
0.94
- 55 to 150
260
Unit
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambienta
Maximum Junction-to-Case (Drain)
Symbol
t ≤ 10 s
Steady State
Steady State
RthJA
RthJC
Typical
27
60
3.3
Maximum
36
85
4.3
Unit
°C/W
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. See Solder Profile (www.vishay.com/ppg?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 73130
S09-0223-Rev. B, 09-Feb-09
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1
Si7949DP
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
-1
Typ.
Max.
Unit
Static
VGS(th)
VDS = VGS, ID = - 250 µA
Gate-Body Leakage
IGSS
VDS = 0 V, VGS = ± 20 V
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currenta
ID(on)
Gate Threshold Voltage
Drain-Source On-State Resistancea
Diode Forward Voltage
a
V
nA
VDS = - 60 V, VGS = 0 V
-1
VDS = - 60 V, VGS = 0 V, TJ = 70 °C
- 10
VDS ≥ 5 V, VGS = - 10 V
RDS(on)
Forward Transconductancea
-3
± 100
µA
- 25
A
VGS = - 10 V, ID = - 5 A
0.051
0.064
VGS = - 4.5 V, ID = - 4.5 A
0.064
0.080
gfs
VDS = - 15 V, ID = - 5 A
16
VSD
IS = - 2.9 A, VGS = 0 V
- 0.8
- 1.2
26
40
Ω
S
V
Dynamicb
Total Gate Charge
Qg
VDS = - 30 V, VGS = - 10 V, ID = - 5 A
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
7.0
Gate Resistance
Rg
7.0
td(on)
Turn-On Delay Time
td(off)
Turn-Off Delay Time
Fall Time
tf
Source-Drain Reverse Recovery Time
trr
Ω
8
tr
Rise Time
nC
4.5
15
VDD = - 30 V, RL = 30 Ω
ID ≅ - 1 A, VGEN = - 10 V, Rg = 6 Ω
9
15
65
100
30
45
IF = - 5 A, dI/dt = 100 A/µs
41
70
ns
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
30
30
VGS = 10 V thru 5 V
4V
25
ID - Drain Current (A)
ID - Drain Current (A)
25
20
15
10
3V
5
20
15
10
TC = 125 °C
5
25 °C
- 55 °C
0
0
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2
2
4
6
8
10
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
4.0
4.5
Document Number: 73130
S09-0223-Rev. B, 09-Feb-09
Si7949DP
Vishay Siliconix
25 °C, unless otherwise noted
0.12
1800
0.10
1500
C - Capacitance (pF)
R DS(on) - On-Resistance (Ω)
TYPICAL CHARACTERISTICS
0.08
VGS = 4.5 V
0.06
VGS = 10 V
0.04
600
300
0.00
0
5
10
15
20
25
30
Coss
Crss
0
10
20
30
40
50
ID - Drain Current (A)
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current
Capacitance
60
2.2
20
2.0
VDS = 30 V
ID = 5 A
16
VGS = 10 V
ID = 5 A
1.8
R DS(on) - On-Resistance
(Normalized)
VGS - Gate-to-Source Voltage (V)
900
0.02
0
Ciss
1200
12
8
1.6
1.4
1.2
1.0
0.8
4
0.6
0.4
- 50
0
0
10
20
30
40
50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
Qg - Total Gate Charge (nC)
Gate Charge
On-Resistance vs. Junction Temperature
0.30
40
R DS(on) - On-Resistance (Ω)
I S - Source Current (A)
0.25
TJ = 150 °C
10
TJ = 25 °C
ID = 5 A
0.20
0.15
0.10
0.05
1
0.0
0.00
0.2
0.4
0.6
0.8
1.0
VSD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
Document Number: 73130
S09-0223-Rev. B, 09-Feb-09
1.2
0
2
4
6
8
10
VGS - Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
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Si7949DP
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1.0
100
ID = 250 µA
0.8
80
Power (W)
V GS(th) (V)
0.6
0.4
0.2
60
40
0.0
20
- 0.2
- 0.4
- 50
0
- 25
0
25
50
75
100
125
150
0.001
0.01
0.1
1
10
TJ - Temperature (°C)
Time (s)
Threshold Voltage
Single Pulse Power, Junction-to-Ambient
100
ID - Drain Current (A)
10
Limited by RDS(on)*
10 µs
100 µs
1
1 ms
10 ms
100 ms
1s
0.1
TA = 25 °C
Single Pulse
0.01
10 s
100 s, DC
0.001
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* V GS > minimum VGS at which R DS(on) is specified
Safe Operating Area
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = R thJA = 52 °C/W
0.02
3. T JM - TA = PDMZthJA(t)
Single Pulse
4. Surface Mounted
0.01
10-4
10-3
10-2
10-1
1
Square Wave Pulse Duration (s)
10
100
600
Normalized Thermal Transient Impedance, Junction-to-Ambient
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Document Number: 73130
S09-0223-Rev. B, 09-Feb-09
Si7949DP
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-3
10-2
Square Wave Pulse Duration (s)
10-1
1
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73130.
Document Number: 73130
S09-0223-Rev. B, 09-Feb-09
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5
Package Information
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Vishay Siliconix
PowerPAK® SO-8, (Single/Dual)
L
H
E2
K
E4
θ
D4
W
1
M
1
Z
2
D5
D2
e
2
D1
D
2
D
3
4
θ
4
b
3
L1
E3
θ
A1
Backside View of Single Pad
H
K
E2
E4
L
1
D1
D5
2
D2
Detail Z
K1
2
E1
E
D3 (2x) D4
c
A
θ
3
4
Notes
1. Inch will govern.
2 Dimensions exclusive of mold gate burrs.
3. Dimensions exclusive of mold flash and cutting burrs.
E3
Backside View of Dual Pad
MILLIMETERS
DIM.
MIN.
A
0.97
A1
b
0.33
c
0.23
D
5.05
D1
4.80
D2
3.56
D3
1.32
D4
D5
E
6.05
E1
5.79
E2 (for AL product)
3.30
E2 (for other product)
3.48
E3
3.68
E4 (for AL product)
E4 (for other product)
e
K (for AL product)
K (for other product)
K1
0.56
H
0.51
L
0.51
L1
0.06

0°
W
0.15
M
ECN: C13-0702-Rev. K, 20-May-13
DWG: 5881
Revison: 20-May-13
b
D2
INCHES
NOM.
MAX.
MIN.
NOM.
MAX.
1.04
0.41
0.28
5.15
4.90
3.76
1.50
0.57 typ.
3.98 typ.
6.15
5.89
3.48
3.66
3.78
0.58 typ.
0.75 typ.
1.27 BSC
1.45 typ.
1.27 typ.
0.61
0.61
0.13
0.25
0.125 typ.
1.12
0.05
0.51
0.33
5.26
5.00
3.91
1.68
0.038
0
0.013
0.009
0.199
0.189
0.140
0.052
0.044
0.002
0.020
0.013
0.207
0.197
0.154
0.066
6.25
5.99
3.66
3.84
3.91
0.238
0.228
0.130
0.137
0.145
0.71
0.71
0.20
12°
0.36
0.022
0.020
0.020
0.002
0°
0.006
0.041
0.016
0.011
0.203
0.193
0.148
0.059
0.0225 typ.
0.157 typ.
0.242
0.232
0.137
0.144
0.149
0.023 typ.
0.030 typ.
0.050 BSC
0.057 typ.
0.050 typ.
0.024
0.024
0.005
0.010
0.005 typ.
1
0.246
0.236
0.144
0.151
0.154
0.028
0.028
0.008
12°
0.014
Document Number: 71655
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK® SO-8 Dual
0.260
(6.61)
0.150
(3.81)
0.174
0.024
(0.61)
0.050
0.032
0.040
(1.27)
(0.82)
(1.02)
(4.42)
0.065
(1.65)
0.065
(1.65)
0.154
(1.27)
0.050
0.026
(0.66)
(3.91)
0.024
(0.61)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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16
Document Number: 72600
Revision: 21-Jan-08
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
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Revision: 02-Oct-12
1
Document Number: 91000