QFET FQN1N50C 500V N-Channel MOSFET Features Description • 0.38 A, 500 V, RDS(on) = 6.0 Ω @ VGS = 10 V These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction, electronic lamp ballasts based on half bridge topology. • Low gate charge ( typical 4.9 nC ) • Low Crss ( typical 4.1 pF) • Fast switching • 100 % avalanche tested • Improved dv/dt capability D G TO-92 S FQN Series GDS Absolute Maximum Ratings FQN1N50C Units VDSS Symbol Drain-Source Voltage Parameter 500 V ID Drain Current - Continuous (TC = 25°C) 0.38 A - Continuous (TC = 100°C) 0.24 A 3.04 A ± 30 V IDM Drain Current VGSS Gate-Source Voltage - Pulsed EAS Single Pulsed Avalanche Energy (Note 2) 44.4 mJ IAR Avalanche Current (Note 1) 0.38 A EAR Repetitive Avalanche Energy (Note 1) 0.21 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns PD Power Dissipation (TA = 25°C) 0.89 W Power Dissipation (TL = 25°C) 2.08 W (Note 1) - Derate above 25°C TJ, TSTG Operating and Storage Temperature Range TL Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 0.017 W/°C -55 to +150 °C 300 °C Thermal Characteristics Typ Max Units RθJL Symbol Thermal Resistance, Junction-to-Lead Parameter (Note 6a) -- 60 °C/W RθJA Thermal Resistance, Junction-to-Ambient (Note 6b) -- 140 °C/W ©2006 Fairchild Semiconductor Corporation FQN1N50C Rev. A 1 www.fairchildsemi.com FQN1N50C 500V N-Channel MOSFET January 2006 ® Device Marking Device Package Reel Size Tape Width Quantity 1N50C FQN1N50C TO-92 -- -- 2000ea Electrical Characteristics Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min. Typ. Max. Units 500 -- -- V Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS/ ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.5 -- V/°C IDSS Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V -- -- 50 µA VDS = 400 V, TC = 125°C -- -- 250 µA IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.19 A -- 4.6 6.0 Ω gFS Forward Transconductance VDS = 40 V, ID = 0.19A -- 0.6 -- S -- 150 195 pF -- 28 40 pF -- 4.1 -- pF -- 10 30 ns -- 10 30 ns -- 20 50 ns -- 15 40 ns -- 4.9 6.4 nC -- 0.66 -- nC -- 2.9 -- nC (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 250 V, ID = 1.0 A, RG = 25 Ω (Note 4, 5) VDS = 400 V, ID = 1.0 A, VGS = 10 V (Note 4, 5) Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 0.38 A ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 3.04 A VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.38 A -- -- 1.4 V trr Reverse Recovery Time -- 188 -- ns Qrr Reverse Recovery Charge VGS = 0 V, IS = 1.0 A, dIF / dt = 100 A/µs -- 0.55 -- µC (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 80mH, IAS = 1.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 0.38A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature 6. a) Reference point of the RθJL is the drain lead b) When mounted on 3”x4.5” FR-4 PCB without any pad copper in a still air environment (RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance. RθCA is determined by the user’s board design) FQN1N50C Rev. A 2 www.fairchildsemi.com FQN1N50C 500V N-Channel MOSFET Package Marking and Ordering Information Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V ID, Drain Current [A] 10 10 10 0 ID, Drain Current [A] Top : -1 0 10 o 150 C o 25 C o -55 C ※ Notes : 1. VDS = 40V 2. 250µ s Pulse Test ※ Notes : 1. 250µ s Pulse Test 2. TC = 25℃ -2 10 -1 10 0 10 -1 10 1 2 4 VDS, Drain-Source Voltage [V] 6 8 10 VGS, Gate-Source Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperatue IDR, Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 20 15 VGS = 10V 10 VGS = 20V 5 ※ Note : TJ = 25℃ 0 0.0 0 10 150℃ ※ Notes : 1. VGS = 0V 2. 250µ s Pulse Test -1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 10 4.0 0.2 0.4 ID, Drain Current [A] 400 1.0 1.2 1.4 12 VGS, Gate-Source Voltage [V] Capacitances [pF] 0.8 Figure 6. Gate Charge Characteristics Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd Coss Ciss * Note : 1. VGS = 0 V 2. f = 1 MHz 200 100 0.6 VSD, Source-Drain voltage [V] Figure 5. Capacitance Characteristics 300 25℃ Crss VDS = 100V 10 VDS = 250V VDS = 400V 8 6 4 2 ※ Note : ID = 1A 0 -1 10 0 10 0 1 10 FQN1N50C Rev. A 0 1 2 3 4 5 6 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] 3 www.fairchildsemi.com FQN1N50C 500V N-Channel MOSFET Typical Performance Characteristics FQN1N50C 500V N-Channel MOSFET Typical Performance Characteristics (Continued) Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 3.0 RDS(ON), (Normalized) Drain-Source On-Resistance BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 µA 0.9 0.8 -100 -50 0 50 100 150 2.5 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 0.19 A 0.5 0.0 -100 200 -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature 1 10 0.4 10 µs 100 µs 0.3 1 ms 10 ms ID, Drain Current [A] ID, Drain Current [A] 0 10 100 ms Operation in This Area is Limited by R DS(on) -1 10 DC -2 ※ Notes : 10 o 1. TC = 25 C 0.2 0.1 o 2. TJ = 150 C 3. Single Pulse -3 10 0 10 1 2 10 0.0 25 3 10 10 50 VDS, Drain-Source Voltage [V] 75 100 125 150 TC, Case Temperature [℃] Figure 11. Transient Thermal Response Curve 10 2 Zθ JC(t), Thermal Response D = 0 .5 10 0 .2 1 0 .1 PDM 0 .0 5 10 t1 0 .0 2 0 .0 1 0 ※ N o te s : 1 . Z θ J L (t) = 6 0 ℃ /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T L = P D M * Z q J C (t) s in g le p u ls e 10 -1 10 -5 10 -4 10 -3 10 t2 -2 10 -1 10 0 10 1 10 2 10 3 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] FQN1N50C Rev. A 4 www.fairchildsemi.com FQN1N50C 500V N-Channel MOSFET Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms FQN1N50C Rev. A 5 www.fairchildsemi.com FQN1N50C 500V N-Channel MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms FQN1N50C Rev. A 6 www.fairchildsemi.com FQN1N50C 500V N-Channel MOSFET Mechanical Dimensions TO-92 +0.25 4.58 ±0.20 4.58 –0.15 ±0.10 14.47 ±0.40 0.46 (0.25) +0.10 0.38 –0.05 0.38 –0.05 ±0.20 3.86MAX 3.60 1.02 ±0.10 +0.10 1.27TYP [1.27 ±0.20] 1.27TYP [1.27 ±0.20] (R2.29) Dimensions in Millimeters FQN1N50C Rev. A 7 www.fairchildsemi.com TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST® ActiveArray™ FASTr™ Bottomless™ FPS™ Build it Now™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ E2CMOS™ i-Lo™ EnSigna™ ImpliedDisconnect™ FACT™ IntelliMAX™ FACT Quiet Series™ Across the board. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I18