TPC8405 TOSHIBA Field Effect Transistor Silicon N, P Channel MOS Type (P Channel U−MOS IV/N Channel U-MOS III) TPC8405 Lithium Ion Secondary Battery Applications Portable Equipment Applications Notebook PC Applications Unit: mm z Low drain-source ON resistance : P Channel RDS (ON) = 25 mΩ (typ.) N Channel RDS (ON) = 20 mΩ (typ.) z High forward transfer admittance : P Channel |Yfs| = 12S (typ.) N Channel |Yfs| = 14S (typ.) z Low leakage current : P Channel IDSS = −10 μA (VDS = −30 V) N Channel IDSS = 10 μA (VDS = 30 V) z Enhancement-mode : P Channel Vth = −0.8 to −2.0 V (VDS = −10 V, ID = −1 mA) N Channel Vth = 1.3 to 2.5 V (VDS = 10 V, ID = 1 mA) Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating P Channel N Channel Unit Drain-source voltage VDSS −30 30 V Drain-gate voltage (RGS = 20 kΩ) VDGR −30 30 V Gate-source voltage VGSS ±20 ±20 V Drain current DC (Note 1) ID −4.5 6 Pulse (Note 1) IDP −18 24 ― JEITA ― TOSHIBA Drain power Single-device operation (Note 3a) dissipation (t = 10s) Single-device value at (Note 2a) dual operation (Note 3b) PD (1) 1.5 1.5 PD (2) 1.1 1.1 Single-device operation (Note 3a) PD (1) 0.75 0.75 (t = 10s) Single-device value at (Note 2b) dual operation (Note 3b) PD (2) 0.45 0.45 Drain power dissipation A JEDEC 2-6J1E Weight: 0.080 g (typ.) W 13.2 (Note 4a) 23.4 (Note 4b) Circuit Configuration Single pulse avalanche energy EAS Avalanche current IAR Repetitive avalanche energy Single-device value at operation (Note 2a, 3b, 5) EAR 0.1 mJ Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C −4.5 6 mJ A Note: For Notes 1 to 5, refer to the next page. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). This transistor is an electrostatic-sensitive device. Handle with care. 1 2009-09-29 TPC8405 Thermal Characteristics Characteristics Single-device operation (Note 3a) Thermal resistance, channel to ambient (t = 10s) (Note 2a) Single-device value at dual operation (Note 3b) Single-device operation (Note 3a) Thermal resistance, channel to ambient (t = 10s) (Note 2b) Single-device value at dual operation (Note 3b) Symbol Max Rth (ch-a) (1) 83.3 Rth (ch-a) (2) 114 Unit °C/W Rth (ch-a) (1) 167 Rth (ch-a) (2) 278 Marking (Note 6) TPC8405 Part No. (or abbreviation code) Lot No. Note 7 Note 1: Ensure that the channel temperature does not exceed 150°C. Note 2: a) Device mounted on a glass-epoxy board (a) b) Device mounted on a glass-epoxy board (b) FR-4 25.4 × 25.4 × 0.8 (unit: mm) FR-4 25.4 × 25.4 × 0.8 (unit: mm) (a) (b) Note 3: a) The power dissipation and thermal resistance values shown are for a single device. (During single-device operation, power is applied to one device only.) b) The power dissipation and thermal resistance values shown are for a single device. (During dual operation, power is evenly applied to both devices.) Note 4: a) VDD = −24 V, Tch = 25°C (initial), L = 0.5 mH, RG = 25 Ω, IAR = −4.5 A b) VDD = 24 V, Tch = 25°C (initial), L = 0.5 mH, RG = 25 Ω, IAR = 6.0 A Note 5: Repetitive rating: pulse width limited by maximum channel temperature Note 6: • on the lower left of the marking indicates Pin 1. * Weekly code: (Three digits) Week of manufacture (01 for first week of year, continuing up to 52 or 53) Year of manufacture (The last digit of the calendar year) Note 7: A line under a Lot No. identifies the indication of product Labels. Not underlined: [[Pb]]/INCLUDES > MCV Underlined: [[G]]/RoHS COMPATIBLE or [[G]]/RoHS [[Pb]] Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. The RoHS is the Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment. 2 2009-09-29 TPC8405 P-ch Electrical Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Gate leakage current IGSS VGS = ±16 V, VDS = 0 V — — ±10 μA Drain cut-OFF current IDSS VDS = −30 V, VGS = 0 V — — −10 μA V (BR) DSS ID = −10 mA, VGS = 0 V −30 — — V (BR) DSX ID = −10 mA, VGS = 20 V −15 — — Vth VDS = −10 V, ID = −1 mA −0.8 — −2.0 RDS (ON) VGS = −4.5 V, ID = −2.2 A — 32 42 RDS (ON) VGS = −10 V, ID = −2.2 A — 25 33 Forward transfer admittance |Yfs| VDS = −10 V, ID = −2.2 A 6 12 — Input capacitance Ciss — 1540 — Reverse transfer capacitance Crss — 220 — Output capacitance Coss — 250 — tr — 5.0 — ton — 13 — tf — 35 — toff — 125 — Qg — 40 — — 4.4 — — 8.2 — Drain-source breakdown voltage Gate threshold voltage Drain-source ON resistance Rise time Turn-ON time VDS = −10 V, VGS = 0 V, f = 1 MHz Switching time V V mΩ S pF ns Fall time Turn-OFF time Total gate charge (Gate-source plus gate-drain) Gate-source charge 1 Qgs1 Gate-drain (“miller”) charge Qgd VDD ≈ −24 V, VGS = −10 V, ID = −4.5 A nC Source-Drain Ratings and Characteristics (Ta = 25°C) Characteristics Drain reverse current Pulse (Note 1) Forward voltage (diode) Symbol Test Condition Min Typ. Max Unit IDRP — — — −18 A — — 1.2 V VDSF IDR = −4.5 A, VGS = 0 V 3 2009-09-29 TPC8405 N-ch Electrical Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Gate leakage current IGSS VGS = ±16 V, VDS = 0 V ― ― ±10 μA Drain cut-OFF current IDSS VDS = 30 V, VGS = 0 V ― ― 10 μA V (BR) DSS ID = 10 mA, VGS = 0 V 30 ― ― V (BR) DSX ID = 10 mA, VGS = −20 V 15 ― ― Vth VDS = 10 V, ID = 1 mA 1.3 ― 2.5 RDS (ON) VGS = 4.5 V, ID = 3 A ― 25 33 RDS (ON) VGS = 10 V, ID = 3 A ― 20 26 Forward transfer admittance |Yfs| VDS = 10 V, ID = 3 A 7 14 ― Input capacitance Ciss ― 1240 ― ― 180 ― Drain-source breakdown voltage Gate threshold voltage Drain-source ON resistance VDS = 10 V, VGS = 0 V, f = 1 MHz Reverse transfer capacitance Crss Output capacitance Coss ― 230 ― tr ― 4.5 ― ton ― 12.5 ― Rise time Turn-ON time Switching time V V mΩ S pF ns Fall time Turn-OFF time Total gate charge (Gate-source plus gate-drain) tf ― 6.6 ― toff ― 33 ― Qg ― 27 ― ― 3.9 ― ― 7.0 ― Gate-source charge 1 Qgs1 Gate-drain (“miller”) charge Qgd VDD ≈ 24 V, VGS = 10 V, ID = 6 A nC Source-Drain Ratings and Characteristics (Ta = 25°C) Characteristics Drain reverse current Pulse (Note 1) Forward voltage (diode) Symbol Test Condition Min Typ. Max Unit IDRP — — — 24 A — — −1.2 V VDSF IDR = 6 A, VGS = 0 V 4 2009-09-29 TPC8405 P-ch ID – VDS −10 −6 −4 −3.2 Common source Ta = 25°C Pulse test −2.8 −8 −2.6 ID −2.4 −6 −2.3 −4 −2.2 −2.1 −2 −0.2 −0.4 −0.6 Drain−source voltage −0.8 VDS −15 Common source Ta = 25°C Pulse test −12 −2.6 −2.8 −9 −2.4 −2.3 −6 −2.2 −2.1 −3 VGS = −2 V 0 0 −10 −4 −3.2 −6 Drain current ID (A) −8 Drain current ID – VDS −18 (A) −10 VGS = −2 V 0 0 −1.0 (V) −1 −2 ID – VGS Drain−source voltage Drain current ID (A) VDS (V) Common source VDS = −10 V Pulse test −6 25 Ta = −55°C 100 −2 −1 −3 −4 Gate−source voltage VGS −0.4 −0.3 −0.2 −0.1 0 0 −5 (V) −4 −6 −8 −10 VGS (V) −12 RDS (ON) – ID Drain−source ON resistance RDS (ON) (mΩ) Forward transfer admittance |Yfs| (S) −2 −2.2 Gate−source voltage Common source VDS = −10 V Pulse test 25 100 10 −1 Drain current ID = −4.5 A −1.3 100 Ta = −55°C 1 −0.1 Common source Ta = 25°C Pulse test −0.5 |Yfs| – ID 100 (V) VDS – VGS −9 0 0 VDS −5 −0.6 −12 −3 −4 Drain−source voltage −18 −15 −3 −10 ID VGS = −4.5 V −10 10 1 −0.1 −100 (A) Common source Ta = 25°C Pulse test −1 Drain current 5 −10 ID −100 (A) 2009-09-29 TPC8405 P-ch RDS (ON) – Ta IDR – VDS −100 50 (A) IDR 40 VGS = −4.5 V ID = −1.3 A, −2.2 A, −4.5 A VGS = −10 V 10 0 −80 −40 0 40 Ambient temperature 80 120 Ta −10 −1 0.2 C – VDS Vth (V) (pF) 1000 Gate threshold voltage VDS Coss Crss 100 f = 1 MHz −1 VDS = −10 V −10 Pulse test −1.2 −0.8 −0.4 −40 0 160 (°C) VDS (V) (4) 100 150 Ta −16 Common source 0.4 Ambient temperature Ta −40 0.8 (3) 50 120 Dynamic input/output characteristics Drain−source voltage (W) 1.2 (2) 80 (V) Device mounted on a glass-epoxy board (a) (Note 2a) (1) Single-device operation (Note 3a) (2) Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3) Single-device operation (Note 3a) (4) Single-device value at dual operation (Note 3b) t = 10 s 1.6 (1) 40 Ambient temperature −100 VDS ID = −1 mA PD – Ta 2.0 (V) Common source −1.6 0 −80 Ta = 25°C Drain−source voltage 1.2 ID = −4.5 A Ta = 25°C −30 (°C) −12 Pulse test VDS −12 −20 −6 VDD = −24 V −4 VGS 10 20 Total gate charge 6 −8 −10 0 0 200 (V) C Capacitance Ciss 10 −0.1 1.0 Vth – Ta VGS = 0 V PD 0.8 −2.0 Common source Drain power dissipation 0.6 0.4 Drain−source voltage (°C) 10000 0 0 VGS = 0 V −1 −0.1 0 160 −3 30 Qg 40 VGS 20 −5 −10 Gate−source voltage 30 Common source Ta = 25°C Pulse test ID = −1.3 A, −2.2 A, −4.5 A Pulse test Drain reverse current Drain−source ON resistance RDS (ON) (mΩ) Common source 0 50 (nC) 2009-09-29 TPC8405 P-ch rth − tw 1000 (4) Single pulse (3) Transient thermal impedance rth (°C/W) (2) (1) 100 10 Device mounted on a glass-epoxy board (a) (Note 2a) (1) Single-device operation (Note 3a) (2) Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3) Single-device operation (Note 3a) (4) Single-device value at dual operation (Note 3b) t = 10 s 1 0.1 0.001 0.01 0.1 1 Pulse width 10 tw 100 1000 (s) Safe operating area −100 Single-device value at dual operation (Note 3b) −10 1 ms* Drain current ID (A) ID max (Pulse)* 10 ms* −1 *: Single nonrepetitive pulse Ta = 25°C Curves must be derated linearly with increase in temperature −0.1 −0.1 VDSS max −1 Drain−source voltage −10 VDS −100 (V) 7 2009-09-29 TPC8405 N-ch ID – VDS ID – VDS 3.2 6 3.1 3.8 3.6 16 3 3.4 ID 6 2.9 4 10 6 Drain current Drain current ID (A) 8 20 Common source Ta = 25°C Pulse test 3.3 4 10 3.6 3.8 Common source Ta = 25°C Pulse test 3.4 4 (A) 10 2.8 2.7 2 3.3 12 3.2 3.1 8 3 2.9 2.8 4 2.7 VGS = 2.6 V 0 0 0.2 0.4 0.6 Drain−source voltage 0.8 VDS VGS = 2.6 V 0 0 1.0 (V) 2 1 ID – VGS VDS (V) Drain−source voltage (A) ID Drain current 25 Ta = −55°C 100 4 2 1 3 5 4 Gate−source voltage VGS 0.4 0.3 0.2 ID = 6 A 0.1 0 0 6 (V) 4 8 6 Common source VDS = 10 V Pulse test Ta = 100°C 1 1 Drain current 10 ID 12 10 VGS (V) RDS (ON) – ID Drain−source ON resistance RDS (ON) (mΩ) Forward transfer admittance ⎪Yfs⎪ (S) 2 3 Gate−source voltage 25°C 0.1 0.1 1.5 1000 −55°C (V) Common source Ta = 25°C Pulse test 0.5 |Yfs| – ID 10 5 VDS – VGS Common source VDS = 10 V Pulse test 8 100 VDS 0.6 12 0 0 4 Drain−source voltage 20 16 3 100 VGS = 4.5 V 10 1 1 100 (A) Common source Ta = 25°C Pulse test VGS = 10 V 10 Drain current 8 100 ID (A) 2009-09-29 TPC8405 N-ch IDR – VDS RDS (ON) – Ta 100 50 Common source Ta = 25°C Pulse test (A) Common source IDR 40 ID = 4.5 A ID = 2.2 A 30 Drain reverse current Drain−source On resistance RDS (ON) (mΩ) Pulse test ID = 1.3 A ID = 4.5 A VGS = 4.5 V ID = 2.2 A 20 ID = 1.3 A VGS = 10 V 10 0 −80 −40 0 40 Ambient temperature 80 120 Ta 10 3 10 1 1 0.1 0 160 5 (°C) −0.4 −0.2 VGS = 0 V −0.8 −0.6 Drain−source voltage C – VDS −1.0 VDS (V) 80 120 −1.2 Vth – Ta 10000 5 Vth (V) Gate threshold voltage Ciss 1000 Coss Crss 100 Common source VGS = 0 V f = 1 MHz Ta = 25°C 10 Drain−source voltage 3 2 1 0 −80 100 VDS Pulse test (V) −40 VDS (V) (4) 0.4 50 100 Ambient temperature 150 Ta 16 Common source 0.8 (3) 0 0 (°C) 40 Drain−source voltage (W) PD Drain power dissipation 1.2 (2) Ta 160 Dynamic input/output characteristics Device mounted on a glass-epoxy board (a) (Note 2a) (1) Single-device operation (Note 3a) (2) Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3) Single-device operation (Note 3a) (4) Single-device value at dual operation (Note 3b) t = 10 s 1.6 (1) 40 Ambient temperature PD – Ta 2.0 0 Ta = 25°C 30 (°C) ID = 6 A 12 Pulse test VDS 12 20 8 VDD = 24 V 6 10 4 VGS 0 0 200 (V) 1 ID = 1 mA 10 20 Total gate charge 9 30 Qg VGS 10 0.1 VDS = 10 V 4 Gate−source voltage Capacitance C (pF) Common source 0 40 (nC) 2009-09-29 TPC8405 N-ch rth − tw 1000 (4) Single pulse (3) (2) Transient thermal impedance rth (°C/W) (1) 100 10 Device mounted on a glass-epoxy board (a) (Note 2a) (1) Single-device operation (Note 3a) (2) Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3) Single-device operation (Note 3a) (4) Single-device value at dual operation (Note 3b) t = 10 s 1 0.1 0.001 0.01 0.1 1 Pulse width 10 tw 100 1000 (s) Safe operating area 100 Single-device value at dual operation (Note 3b) 1 ms* 10 Drain current ID (A) ID max (Pulse) * 10 ms* 1 *: Single nonrepetitive pulse Ta = 25°C Curves must be derated linearly with increase in temperature 0.1 0.1 VDSS max 1 Drain−source voltage 10 VDS 100 (V) 10 2009-09-29 TPC8405 RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA’s written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product’s quality and reliability, Product can malfunction or fail. Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before creating and producing designs and using, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the instructions for the application that Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. 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Product and related software and technology may be controlled under the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. • Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations. 11 2009-09-29