SSM3K318T TOSHIBA Field-Effect Transistor Silicon N-Channel MOS Type (U-MOSⅣ) SSM3K318T ○ Load Switching Applications ○ High-Speed Switching Applications +0.2 2.8-0.3 4.5 V drive Low ON-resistance : RDS(ON) = 145 mΩ (max) (@VGS = 4.5 V) : RDS(ON) = 107 mΩ (max) (@VGS = 10 V) V ±20 ID 2.5 Pulse IDP 5.0 Drain power dissipation A PD (Note 1) 700 mW Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C 0.4±0.1 3 0~0.1 VGSS 2 0.16±0.05 V 0.15 Unit 60 0.95 Rating VDSS DC Gate-Source voltage Drain current Symbol 1 0.7±0.05 Characteristic Drain-Source voltage 2.9±0.2 Absolute Maximum Ratings (Ta = 25°C) 1.9±0.2 +0.2 1.6-0.1 0.95 • • Unit: mm 1: Gate Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note1: Mounted on an FR4 board. (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2) 2: Source 3: Drain TSM JEDEC ― JEITA ― TOSHIBA 2-3S1A Weight: 10 mg (typ.) Electrical Characteristics (Ta = 25°C) Characteristic Drain-Source breakdown voltage Symbol Test Conditions Min Typ. Max V (BR) DSS ID = 10mA, VGS = 0 V 60 ⎯ ⎯ V (BR) DSX ID = 10mA, VGS = -20 V 35 ⎯ ⎯ Unit V Drain cut-off current IDSS VDS = 60 V, VGS = 0 V ⎯ ⎯ 1 μA Gate leakage current IGSS VGS = ±16 V, VDS = 0 V ⎯ ⎯ ±1 μA VDS = 5 V, ID = 1 mA 1.8 ⎯ 2.8 V S Gate threshold voltage Forward transfer admittance Drain–source ON-resistance Vth ⏐Yfs⏐ RDS (ON) Input capacitance Ciss Output capacitance Coss Reverse transfer capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Switching time VDS = 5 V, ID = 2.0 A (Note 2) 3.7 7.4 ⎯ ID = 2.0 A, VGS = 10 V (Note 2) ⎯ 83.5 107 ID = 1.0 A, VGS = 4.5 V (Note 2) ⎯ 101 145 ⎯ 235 ⎯ VDS = 30 V, VGS = 0 V, f = 1 MHz VDD = 30 V, IDS= 2.5 A VGS = 10 V ⎯ 30.5 ⎯ ⎯ 23.0 ⎯ ⎯ 7.0 ⎯ ⎯ 4.8 ⎯ ⎯ 2.2 ⎯ Turn-on time ton VDD = 30 V, ID = 1.0 A, ⎯ 14.0 ⎯ Turn-off time toff VGS = 0 to 4.5 V, RG = 10 Ω ⎯ 9.5 ⎯ ⎯ -0.83 -1.2 Drain-Source forward voltage VDSF ID = -2.5 A, VGS = 0 V (Note 2) mΩ pF nC ns V Note2: Pulse test 1 2009-04-09 SSM3K318T Switching Time Test Circuit (a) Test Circuit (b) VIN OUT 4.5 V 0V IN (c) VOUT RG 0 10 μs 4.5 V VDD 10% VDD VDS (ON) VDD = 30 V RG = 10 Ω D.U. < = 1% VIN: tr, tf < 5 ns Common Source Ta = 25°C Marking 90% 10% 90% tr ton tf toff Equivalent Circuit (top view) 3 3 KDX 1 2 1 2 Usage Consideration Let Vth be the voltage applied between gate and source that causes the drain current (ID) to be low (1 mA for the SSM3K318T). Then, for normal switching operation, VGS(on) must be higher than Vth, and VGS(off) must be lower than Vth. This relationship can be expressed as: VGS(off) < Vth < VGS(on). Take this into consideration when using the device Handling Precaution When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. 2 2009-04-09 SSM3K318T ID – VGS ID – VDS 5 Common Source Ta = 25 °C Common Source VDS = 5 V 1 (A) 4.0 V 4 ID 4.5V ID 3 3.5V 2 Ta = 100 °C 0.1 Drain current (A) 10 V Drain current 10 25 °C − 25 °C 0.01 0.001 1 VGS = 3.0 V 0 0 0.4 0.2 0.6 0.8 Drain–source voltage VDS 0.0001 0 1.0 1.0 (V) 2.0 ID =2.0A Common Source Drain–source ON-resistance RDS (ON) (mΩ) Drain–source ON-resistance RDS (ON) (mΩ) 300 200 Ta = 100 °C 100 25 °C − 25 °C 0 0 10 Gate–source voltage VGS 200 4.5 V 100 VGS = 10 V 0 20 0 (V) 1 2 ID 3.0 1.0A / 4.5 V ID = 2.0 A / VGS = 10 V 0 50 Ambient temperature 5 Common Source VDS = 5 V ID = 1 mA Vth (V) 200 0 −50 4 (A) Vth – Ta Gate threshold voltage Drain–source ON-resistance RDS (ON) (mΩ) 3 Drain current Common Source 100 5.0 (V) Common Source Ta = 25°C RDS (ON) – Ta 300 4.0 VGS RDS (ON) – ID RDS (ON) – VGS 300 3.0 Gate–source voltage 100 Ta 2.0 1.0 0 −50 150 (°C) 0 50 Ambient temperature 3 100 Ta 150 (°C) 2009-04-09 SSM3K318T IDR – VDS 10 10 IDR (A) Common Source VDS = 5 V Ta = 25 °C 3 Drain reverse current (S) 30 Forward transfer admittance ⎪Yfs⎪ |Yfs| – ID 100 1 0.3 0.1 0.03 Common Source VGS = 0 V D 1 IDR G S 0.1 100 °C 0.01 25 °C 0.01 0.001 0.1 0.01 Drain current 10 1 ID 0.001 0 -0.2 (A) -0.4 -0.6 Drain–source voltage C – VDS -1.0 -0.8 VDS -1.2 (V) t – ID 1000 1000 300 Common Source VDD = 30 V VGS = 0 to 4.5 V Ta = 25 °C RG = 10 Ω toff Ciss tf (ns) (pF) −25 °C 100 Coss 30 Crss 10 3 1 0.1 Switching time Capacitance C t 100 Common Source Ta = 25 °C f = 1 MHz 10 ton tr 1 10 Drain–source voltage 1 0.01 100 VDS 0.1 Drain current (V) 1 ID 10 (A) Dynamic Input Characteristic Common Source ID = 2.5A Ta = 25°C 8 VGS (V) 10 Gate–source voltage 6 VDD=30V 4 2 0 0 2 4 Total Gate Charge 6 Qg 8 (nC) 4 2009-04-09 SSM3K318T Rth PD – Ta – tw 1000 Drain power dissipation PD (mW) Transient thermal impedance Rth (°C/W) 1000 b 100 a 10 1 0.001 a: Mounted on FR4 Board (25.4mm × 25.4mm × 1.6mm , Cu Pad : 645 mm2) b: Mounted on FR4 Board (25.4mm × 25.4mm × 1.6mm , 2 Cu Pad : 0.8 mm ×3) 0.01 0.1 1 Pulse width 10 tw 100 800 a 600 400 b 200 0 -40 1000 a: Mounted on FR4 Board (25.4mm × 25.4mm × 1.6mm , Cu Pad : 645 mm2) b: Mounted on FR4 Board (25.4mm × 25.4mm × 1.6mm , Cu Pad : 0.8 mm2×3) -20 0 20 40 60 80 Ambient temperature (s) 5 100 120 140 160 Ta (°C) 2009-04-09 SSM3K318T RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA’s written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product’s quality and reliability, Product can malfunction or fail. Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before creating and producing designs and using, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the instructions for the application that Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. 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