SSM3J114TU TOSHIBA Field Effect Transistor Silicon P Channel MOS Type SSM3J114TU ○ High-Speed Switching Applications ○ Power Management Switch Applications • • Unit: mm 1.5 V drive Low on-resistance 2.1±0.1 Ron = 526 mΩ (max) (@ VGS = -1.5 V) Ron = 149 mΩ (max) (@ VGS = -4.0 V) +0.1 0.3 -0.05 2.0±0.1 Ron = 321 mΩ (max) (@ VGS = -1.8 V) Ron = 199 mΩ (max) (@ VGS = -2.5 V) 0.65±0.05 1.7±0.1 1 3 2 Drain-Source voltage Symbol Rating Unit VDS -20 V V VGSS ± 8 DC ID -1.8 Pulse IDP -3.6 PD (Note 1) 800 PD (Note 2) 500 Channel temperature Tch 150 °C Storage temperature Tstg −55 ~ 150 °C Gate-Source voltage Drain current Drain power dissipation 0.7±0.05 Characteristics 0.166±0.05 Absolute Maximum Ratings (Ta = 25°C) A 1. Gate 2. Source 3. Drain mW UFM JEDEC ― Using continuously under heavy loads (e.g. the application of JEITA ― high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the TOSHIBA 2-2U1A reliability significantly even if the operating conditions (i.e. Weight: 6.6 mg (typ.) operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Mounted on ceramic board (25.4 mm × 25.4 mm × 0.8 t, Cu Pad: 645 mm2) Note 2: Mounted on FR4 board (25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 645 mm2) Note: Electrical Characteristics (Ta = 25°C) Characteristics Drain-Source breakdown voltage Symbol Test Condition Min Typ. Max V (BR) DSS ID = −1 mA, VGS = 0 −20 ⎯ ⎯ V (BR) DSX ID = −1 mA, VGS = +8 V −12 ⎯ ⎯ Unit V Drain cut-off current IDSS VDS = −20 V, VGS = 0 ⎯ ⎯ −10 μA Gate leakage current IGSS VGS = ± 8 V, VDS = 0 ⎯ ⎯ ±1 μA −0.3 ⎯ −1.0 V 1.9 3.9 ⎯ S Gate threshold voltage Forward transfer admittance Drain-Source ON-resistance Vth VDS = −3 V, ID = −1 mA ⏐Yfs⏐ VDS = -3 V, ID = -0.6 A RDS (ON) Input capacitance Ciss Output capacitance Coss Reverse transfer capacitance Crss Switching time Turn-on time ton (Note 3) ID = -0.6 A, VGS = -4.0 V (Note 3) ⎯ 100 149 ID = -0.6 A, VGS = -2.5 V (Note 3) ⎯ 133 199 ID = -0.6 A, VGS = -1.8 V (Note 3) ⎯ 183 321 ID = -0.1 A, VGS = -1.5 V (Note 3) VDS = −10 V, VGS = 0 f = 1 MHz VDD = −10 V, ID = −0.6 A 1 mΩ ⎯ 220 526 ⎯ 331 ⎯ pF ⎯ 48 ⎯ pF ⎯ 39 ⎯ pF ⎯ 19 ⎯ ns 2007-11-01 SSM3J114TU Turn-off time toff Characteristics VGS = 0 ~ −2.5 V, RG = 4.7 Ω Symbol Total gate charge Qg Gate-Source charge Qgs Gate-Drain charge Qgd Drain-Source forward voltage VDSF Test Condition VDS = −16 V, IDS = -1.2 A, VGS = − 4 V ID = 1.8 A, VGS = 0 (Note 3) ⎯ 18 ⎯ Min Typ. Max ⎯ 7.7 ⎯ ⎯ 4.9 ⎯ ⎯ 2.8 ⎯ ⎯ 0.8 1.2 Unit nC V Note 3: Pulse test Switching Time Test Circuit (a) Test Circuit (b) VIN 0V 10% OUT 0 IN 90% −2.5 V RG −2.5V 10 μs RL (c) VOUT VDD VDD = -10 V RG = 4.7 Ω D.U. < = 1% VIN: tr, tf < 5 ns Common Source Ta = 25 °C Marking VDS (ON) 90% 10% VDD tr ton tf toff Equivalent Circuit (top view) 3 3 JJ7 1 2 1 2 Precaution Vth can be expressed as the voltage between the gate and source when the low operating current value is ID = -1mA for this product. For normal switching operation, VGS (on) requires a higher voltage than Vth and VGS (off) requires a lower voltage than Vth. (The relationship can be established as follows: VGS (off) < Vth < VGS (on).) Be sure to take this into consideration when using the device. Handling Precaution When handling individual devices (which are not yet mounted on a circuit board), ensure that the environment is protected against static electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. 2 2007-11-01 SSM3J114TU ID – VDS -4 ID – VGS -10000 -1.8 V -4 V Common Source -2.5 V VDS = -3 V (mA) -3 -100 ID -1.5 V -2 Drain current Drain current ID (A) -1000 VGS = -1.2 V -1 Ta = 85 °C -10 25 °C -1 −25 °C -0.1 0 Common Source Ta = 25 °C 0 -0.5 -1 -1.5 Drain - Source voltage VDS -0.01 0 -2 -0.2 (V) -0.4 Drain – Source on-resistance RDS (ON) (mΩ) Drain – Source on-resistance RDS (ON) (mΩ) 300 250 25 °C 150 Ta = 85 °C 100 0 -2 -4 -6 Gate - Source voltage Common Source 350 300 250 25 °C 200 150 Ta = 85 °C 100 50 0 -8 −25 °C 0 VGS (V) -2 RDS (ON) – ID -6 -8 VGS (V) RDS (ON) – Ta 500 Common Source 400 Common Source Ta = 25°C Drain – Source on-resistance RDS (ON) (mΩ) Drain – Source on-resistance RDS (ON) (mΩ) -4 Gate - Source voltage 450 350 300 VGS = -1.5 V 250 200 -1.8 V 150 -2.5 V 100 -4.0 V 50 0 -1.6 ID = -0.6 A −25 °C 0 -1.4 VGS (V) 400 350 50 -1.2 RDS (ON) – VGS Common Source 200 -1.0 450 ID = -0.1 A 400 -0.8 Gate - Source voltage RDS (ON) – VGS 450 -0.6 0 -1 -2 Drain current -3 ID 400 300 -0.6 A / -2.5 V 200 (A) -0.6 A / -4.0 V 100 0 −50 -4 ID = -0.1 A / VGS = -1.5 V -0.6 A / -1.8 V 0 50 Ambient temperature 3 100 Ta 150 (°C) 2007-11-01 SSM3J114TU Vth (V) Gate threshold voltage Common Source -0.7 -0.5 VDS = -3 V ID = -1 mA 10 Forward transfer admittance -0.6 (S) |Yfs| – ID 30 ⎪Yfs⎪ Vth – Ta -0.8 -0.4 -0.3 -0.2 -0.1 0 −25 0 25 50 75 100 Ambient temperature Ta 125 150 Common Source VDS = -3 V Ta = 25 °C 3 1 0.3 0.1 0.03 0.01 1 Drain current (°C) C – VDS 5000 -100 -10 -1000 ID -10000 (mA) Dynamic Input Characteristic -10 Ciss 300 100 50 30 10 -0.1 -8 VGS Gate-Source voltage (pF) 500 Capacitance 1000 C (V) 3000 Common Coss Source Ta = 25 °C f = 1 MHz VGS = 0 V Crss -1 -10 Drain – Source voltage VDS -4 -2 0 -100 VDD = -16 V -6 Common Source ID = -1.2 A Ta = 25 °C 0 5 10 Total gate charge (V) 15 Qg 20 (nC) t – ID IDR – VDS 100 Common Source VGS = 0 V (A) toff -2 IDR Common Source VDD = -10 V VGS = 0 ∼ -2.5 V Ta = 25 °C RG = 4.7 Ω Drain reverse current Switching time tf ton 10 tr 1 0.01 Drain current 1 ID 10 IDR G S -1 -0.5 0 0.1 D Ta = 25 °C -1.5 t (ns) 1000 0 0.2 0.4 0.6 Drain-Source voltage (A) 4 0.8 VDS 1 1.2 (V) 2007-11-01 SSM3J114TU PD - Ta 1000 a: mounted on FR4 board (25.4mm×25.4mm×1.6mm) Cu Pad :25.4mm×25.4mm b:mounted on ceramic board (25.4mm×25.4mm×0.8mm) Cu Pad :25.4mm×25.4mm b 600 a 400 200 0 0 20 40 60 80 100 120 140 160 A mbient temperature Ta(°C) Rth - tw 1000 c Transient thermal impedance Rth(°C/W) Drain power dissipation PD(mW) 800 b 100 a Single pulse a:Mounted on ceramic board (25.4mm×25.4mm×0.8mm) Cu Pad :25.4mm×25.4mm b:Mounted on FR4 board (25.4mm×25.4mm×1.6mm) Cu Pad :25.4mm×25.4mm c:Mounted on FR4 Board (25.4mm×25.4mm×1.6mm) Cu Pad :0.45mm×0.8mm×3 10 1 0.001 0.01 0.1 1 10 Pulse width tw (S) 5 100 1000 2007-11-01 SSM3J114TU RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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