www.fairchildsemi.com
TMC2272A
Digital Colorspace Converter
36 Bit Color, 50 MHz
Features
Applications
• 50 MHz (20ns) pipelined throughput
• 3 Simultaneous 12-bit input and output channels
(64 Giga {236} colors)
• Two's complement inputs and outputs
• Overflow headroom available in lower resolution
• 10-bit user-defined coefficients
• TTL compatible input and output signals
• Full precision internal calculation
• Output rounding
• On-board coefficient memory
• Submicron CMOS process
• Translation between component color standards (RGB,
YIQ, YUV, etc.)
• Broadcast composite color encoding and decoding (all
standards)
• Broadcast composite color standards conversion and
transcoding
• Camera tube and monitor phosphor colorimetry
correction
• White balancing and color-temperature conversion
• Image capture, processing and storage
• Color matching between systems, cameras and monitors
• Three-dimensional perspective translation
Description
A 50-MHz, three-channel, 36 bit (three 12-bit components)
colorspace converter and color corrector, the TMC2272A
uses 9 parallel multipliers to process high-resolution imagery
in real time.
The TMC2272A also operates at any slower clock rate and
with any smaller data path width, allowing it to handle all
broadcast and consumer camera, frame-grabber, encoder/
decoder, recorder and monitor applications as well as most
electronic imaging applications.
A complete set of three 12-bit samples is processed on every
clock cycle, with a five-cycle pipeline latency. Full 23-bit
(for each of three components) internal precision is provided
with 10-bit user-defined coefficients. The coefficients may be
varied dynamically, with three new coefficients loaded every
clock cycle. (The full set of nine can be replaced in three clock
cycles.) Rounding to 12 bits per component is performed only
at the final output. This allows full accuracy with correct
rounding and overflow headroom for applications that require
less than 12 bits per component.
The TMC2272A is fabricated in a submicron CMOS process
and performance is guaranteed over the full operating temperature range. It is available in a 120-pin Plastic Pin Grid
Array (PPGA) package, 120-pin Ceramic Pin Grid Array
(CPGA), 120-pin MQFP to PGA package, and 120-pin
Plastic Quad FlatPack (PQFP) in three speed grades.
Logic Symbol
Data Input
CLK
TMC2272A
Colorspace Converter
A11-0
C11-0
X11-0
Coefficient
Input
Y11-0
KA11-0
Z11-0
Data Output
B11-0
KB11-0
KC11-0
CSEL1-0
REV. 1.1.3 10/25/00
PRODUCT SPECIFICATION
TMC2272A
Block Diagram
CWSEL1,0
A11-0
DECODER
CWSEL1,0 = 1 1
ENABLE K_Z
CWSEL1,0 = 1 0
ENABLE K_Y
CWSEL1,0 = 0 1
ENABLE K_X
2
1
12
2
12
ENA
KAX
KAY
B11-0
12
3
3
3
4
4
4
2
12
KBY
KBZ
10
10
21
21
3
3
3
4
4
4
10
1
12
2
2
12
ENA
KCX
KCY
12
ENA
KCZ
10
10
21
2
12
ENA
10
10
10
10
21
21
3
3
3
4
4
4
10
(ROUND)
(ROUND)
(ROUND)
12
12
5
5
12
X11-0
2
12
ENA
10
10
21
2
12
ENA
10
10
CLK
21
1
KBX
KC9-0
10
10
10
ENA
C11-0
KAZ
21
2
KB9-0
12
ENA
10
10
21
2
12
ENA
10
10
KA9-0
2
12
5
12
Y11-0
12
Z11-0
REV. 1.1.3 10/25/00
TMC2272A
PRODUCT SPECIFICATION
Functional Description
The TMC2272A is a nine–multiplier array with the internal bus
structure and summing adders needed to implement a 3 x 3
matrix multiplier (triple dot product). With a 50MHz guaranteed maximum clock rate, this device offers video and imaging
system designers a single–chip solution to numerous common
image and signal–processing problems.
KAX(n) thru KCZ(n)
The three data input ports (A11-0, B11-0, C11-0) accept 12-bit
two's complement integer data, which is also the format for
the output ports (X11-0, Y11-0, Z11-0). Other format and path
width options are discussed in the numeric format and overflow section. The coefficient input ports (KA, KB, KC) are
always 10-bit two's complement fractional. Table 2 details
the bit weighting.
X(n), Y(n), Z(n)
Full precision is maintained throughout the TMC2272A.
Each output is accurately rounded to 12 bits from the 23 bits
entering the final adder.
Signal Definitions
Indicates coefficient value stored in the specified
one of the nine onboard coefficient registers
KAX through KCZ, input during or before the
specified clock rising edge (n).
Indicates data available at that output port tDO
after the specified clock rising edge (n).
Applies to output ports X11-0, Y11-0, and Z11-0.
The TMC2272A utilizes six input and output ports to realize
a "triple dot product", in which each output is the sum of all
three input words, multiplied by the appropriate stored coefficients. The three corresponding sums of products are available at the outputs five clock cycles after the input data are
latched, and three new data words rounded to 12-bits are then
available every clock cycle. See the Applications Discussion
regarding encoded video standard conversion matrices.
X(5)=A(1)KAX(1)+B(1)KBX(1)+C(1)KCX(1)
A(n), B(n), C(n)
Y(5)=A(1)KAY(1)+B(1)KBY(1)+C(1)KCY(1)
Indicates the data word presented to that input
port during the specified clock rising edge (n).
Applies to input ports A11-0, B11-0, and C11-0.
Z(5)=A(1)KAZ(1)+B(1)KBZ(1)+C(1)KCZ(1)
Pin Assignments
120 Pin Plastic Pin Grid Array, H5 Package, 120 Pin Ceramic Pin Grid Array, G1 Package, and
120 Pin MQFP to PPGA, H6 Package
13
12
11
10
9
8
Top View
Cavity Up
7
6
5
KEY
4
3
2
1
A
B
C
D
REV. 1.1.3 10/25/00
E
F
G
H
J
K
L
M N
Pin
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
C1
C2
C3
C4
Name
X7
X9
X10
GND
C11
C8
C7
C5
C3
C1
B10
B7
B4
X4
X5
X8
X11
GND
C9
C6
C4
C2
B11
B9
B6
B2
X1
X2
X6
VDD
Pin
C5
C6
C7
C8
C9
C10
C11
C12
C13
D1
D2
D3
D11
D12
D13
E1
E2
E3
E11
E12
E13
F1
F2
F3
F11
F12
F13
G1
G2
G3
Name
GND
C10
GND
VDD
C0
B8
B5
B3
B1
Y11
X0
X3
CLK
B0
A10
Y9
Y10
GND
A11
A9
A8
Y7
Y8
VDD
A7
A6
A5
Y5
Y6
GND
Pin
G11
G12
G13
H1
H2
H3
H11
H12
H13
J1
J2
J3
J11
J12
J13
K1
K2
K3
K11
K12
K13
L1
L2
L3
L4
L5
L6
L7
L8
L9
Name
A3
A2
A4
Y4
Y0
VDD
GND
A0
A1
Y1
Y2
GND
KA8
CWSEL1
CWSEL0
Y3
Z0
Z3
KA4
KA7
KA9
Z1
Z4
Z6
GND
KC0
GND
VDD
KB0
KB4
Pin
L10
L11
L12
L13
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
N1
N2
N3
N4
N5
N6
N7
N8
N9
N10
N11
N12
N13
Name
KB8
KA1
KA5
KA6
Z2
Z7
Z9
Z11
KC2
KC4
KC6
KC9
KB2
KB5
KB9
KA2
KA3
Z5
Z8
Z10
KC1
KC3
KC5
KC7
KC8
KB1
KB3
KB6
KB7
KA0
3
PRODUCT SPECIFICATION
TMC2272A
Pin Assignments (continued)
120 Pin Metric Quad Flat Pack (MQFP), KE Package
1
120
91
90
30
61
60
31
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Name
X6
X5
X4
X3
X2
X1
X0
GND
Y11
Y10
Y9
VDD
Y8
Y7
Y6
GND
Y5
Y4
Y0
VDD
Y1
Y2
Y3
GND
Z0
Z1
Z2
Z3
Z4
Z5
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Name
Z6
Z7
Z8
GND
Z9
Z10
Z11
KC0
KC1
KC2
KC3
GND
KC4
KC5
KC6
VDD
KC7
KC8
KC9
KB0
KB1
KB2
KB3
KB4
KB5
KB6
KB7
KB8
KB9
KA0
Pin
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
Name
KA1
KA2
KA3
KA4
KA5
KA6
KA7
KA8
KA9
CWSEL1
CWSEL0
GND
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
B0
B1
B2
CLK
B3
B4
Pin
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
Name
B5
B6
B7
B8
B9
B10
B11
C0
C1
C2
C3
VDD
C4
C5
C6
GND
C7
C8
C9
C10
C11
GND
GND
GND
X11
X10
X9
VDD
X8
X7
Pin Descriptions
Pin Name
CPGA/PPGA/
MPGA
Pin Number
KE Pin Number
Pin Function Description
Power
VDD
F3, H3, L7, C8, 12, 20, 46, 102,
C4
118
GND
E3, G3, J3, L4, 8, 16, 24, 34, 42,
L6, H11, C7, C5, 72, 106, 112,
A4, B5
113, 114
Supply Voltage. The TMC2272A operates from a single +5V
supply. All pins must be connected.
Ground
Clock
CLK
D11
88
System Clock. The TMC2272A operates from a single system
clock input. All timing specifications are referenced to the rising
edge of clock.
J12, J13
70, 71
Coefficient Write Select. This input selects which three of the 9
coefficient registers, if any, will be updated on the next clock
cycle from the KA9-0, KB9-0, AND KC9-0 inputs. See Table 4 and
the Functional Block Diagram.
Controls
CWSEL1,0
4
REV. 1.1.3 10/25/00
TMC2272A
PRODUCT SPECIFICATION
Pin Descriptions (continued)
Pin Name
CPGA/PPGA/
MPGA
Pin Number
KE Pin Number
Pin Function Description
Inputs
A11-0
E11, D13, E12,
E13, F11, F12,
F13, G13, G11,
G12, H13, H12
84, 83, 82, 81,
80, 79, 78, 77,
76, 75, 74, 73
Data Input A. This is one of three 12-bit wide data input ports.
B11-0
B10, A11, B11,
C10, A12, B12,
C11, A13, C12,
B13, C13, D12
97, 96, 95, 94,
93, 92, 91, 90,
89, 87, 86, 85
Data Input B. This is one of three 12-bit wide data input ports.
C11-0
A5, C6, B6, A6,
A7, B7, A8, B8,
A9, B9, A10, C9
111, 110, 109,
108, 107, 105,
104, 103, 101,
100, 99, 98
Data Input C. This is one of three 12-bit wide data input ports.
KA9-0
K13, J11, K12,
L13, L12, K11,
M13, M12, L11,
N13
69, 68, 67, 66,
65, 64, 63, 62,
61, 60
Coefficient Input KAX, KAY, or KAZ. These are the 10-bit
wide coefficient input ports. The value at each of these three
inputs will update one coefficient register as selected by the
coefficient write select (CWSEL1-0) on the next clock. See Table
1 and the Functional Block Diagram.
KB9-0
M11, L10, N12,
N11, M10, L9,
N10, M9, N9, L8
59, 58, 57, 56,
55, 54, 53, 52,
51, 50
Coefficient Input KBX, KBY, OR KBZ. These are the 10-bit
wide coefficient input ports. The value at each of these three
inputs will update one coefficient register as selected by the
coefficient write select (CWSEL1-0) on the next clock. See Table
1 and the Functional Block Diagram.
KC9-0
M8, N8, N7, M7,
N6, M6, N5, M5,
N4, L5
49, 48, 47, 45,
44, 43, 41, 40,
39, 38
Coefficient Input KCX, KCY, OR KCZ. These are the 10-bit
wide coefficient input ports. The value at each of these three
inputs will update one coefficient register as selected by the
coefficient write select (CWSEL1-0) on the next clock. See Table
1 and the Functional Block Diagram.
Outputs
X11-0
B4, A3, A2, B3, 115, 116, 117,
A1, C3, B2, B1, 119, 120, 1, 2, 3,
D3, C2, C1, D2
4, 5, 6, 7
Output X. These are the data outputs. Data are available at the
12-bit registered Output Ports X,Y and Z tDO after every clock
rising edge.
Y11-0
D1, E2, E1, F2, 9, 10, 11, 13, 14,
F1, G2, G1, H1, 15, 17, 18, 23,
K1, J2, J1, H2
22, 21, 19
Output Y. These are the data outputs. Data are available at the
12-bit registered Output Ports X,Y and Z tDO after every clock
rising edge.
Z11-0
M4, N3, M3, N2,
M2, L3, N1, L2,
K3, M1, L1, K2
Output Z. These are the data outputs. Data are available at the
12-bit registered Output Ports X,Y and Z tDO after every clock
rising edge.
37, 36, 35, 33,
32, 31, 30, 29,
28, 27, 26, 25
Table 1. Coefficient Loading
CWSEL1,0
Input
KA9-0
Input
KB9-0
Input
KC9-0
REV. 1.1.3 10/25/00
00
Hold
All
Hold
All
Hold
All
01
Load
KAX
Load
KBX
Load
KCX
10
Load
KAY
Load
KBY
Load
KCY
11
Load
KAZ
Load
KBZ
Load
KCZ
5
PRODUCT SPECIFICATION
TMC2272A
1
2
3
4
5
6
7
8
CLK
CWSEL1,0
01
10
11
KA, KB, KC
(K_X)
(K_Y)
(K_Z)
0
0
1.0
DATA IN A, B, C
00
0
0
0
KAX + KBX + KCX
X OUT
KAY + KBY + KCY
Y OUT
KAZ + KBZ + KCZ
Figure 1. Impulse Response
tCY
1
2
tPWH
3
4
5
CLK
CWSEL1,0
tPWL
KA, KB, KC
tD
tS
tH
X, Y, Z
PREVIOUS
NEW
tHO
Figure 2. Input/Output Timing
Numeric Format and Overflow
Use with Fewer than 12 Bits
Table 2 shows the binary weightings of the input and output ports
of the TMC2272A. Although the internal sums of products
could grow to 23 bits, the outputs X, Y, and Z are rounded to
yield 12-bit integer words. Thus the output format is identical
to the input data format. Bit weighting is easily adjusted by
applying the same scaling correction factor to both input and
output data words.
The TMC2272A can be configured to provide several format
and overflow options when used in systems with fewer than
12 bits of resolution. An 8-bit system will be used as an example, however these concepts apply to any other word width.
As shown in Table 2, the TMC2272A’s matched input and
output data formats accommodate 0dB (unity) gain. Therefore the user must be aware of input conditions that could lead
to numeric overflow. Maximum input data and coefficient
word sizes must be taken into account with the specific translation performed to ensure that no overflow occurs.
6
The most apparent mode of operation is to left justify the incoming data and to ground the unused input LSBs. Hoever,
the outputs will still be rounded to the least significant bit of
the TMC2272A, having little if any effect on the top 8 bits
actually used. Because the TMC2272A carries out all calculations to full precision, the preferred mode of operation is to
right jusitfy and sign extend the data as shown in Figure 3.
Since all the LSBs are used, the desired output will be rounded
correctly, and overflow will be accommodated by bits 7
through 10.
REV. 1.1.3 10/25/00
TMC2272A
PRODUCT SPECIFICATION
The TMC2272A may also be used in unsigned binary 8-bit
systems as shown in Figure 4. Bits 11 through 8 will handle
overflow.
In all applications, a digital zero (ground) should be connected to all unused inputs.
Table 2. Bit Weightings for Input and Output Data Words
Bit Weights
211
210
29
28
27
26
25
24
23
22
21
20
• 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 2-9
I10
I9
I8
I7
I6
I5
I4
I3
I2
I1
I0 ∑
Inputs
All Modes
-I11
Data A, B, C
-K9 ∑ K8 K7 K6 K5 K4 K3 K2 K1 K0
Coefficients
KA, KB, KC
Internal
Sum
-X20
X19 X18 X17 X16 X15 X14 X13 X12 X11 X10 X9 ∑ X8 X7 X6 X5 X4 X3 X2 X1 X0
Outputs
-O11 O10 O9 O8 O7 O6 O5 O4 O3 O2 O1 O0 ∑
X, Y, Z
A minus sign indicates a two’s complement sign bit.
INPUTS
TMC2272
(A11-0, B11-0,
BIT WEIGHTINGS
OR C11-0)
MSB(11)
(10)
SIGN
EXTENSION
(9)
(8)
OUTPUTS
(X11-0, Y11-0,
OR Z11-0)
MSB(7)
NC/
OVERFLOW
(WILL
ACCUMULATE
OVERFLOW)
MSB(7)
(7)
(6)
(6)
(6)
(5)
(5)
(5)
(4)
(4)
(4)
(3)
(3)
(3)
(2)
(2)
(2)
(1)
(1)
(1)
LSB(0)
LSB(0)
LSB(0)
Figure 3. Two’s Complelent 8-bit Application
REV. 1.1.3 10/25/00
INPUTS
(A11-0, B11-0,
OR C11-0)
TMC2272
BIT WEIGHTINGS
GND
MSB(11)
GND
(10)
GND
(9)
GND
(8)
OUTPUTS
(X11-0, Y11-0,
OR Z11-0)
NC/
OVERFLOW
(WILL
ACCUMULATE
OVERFLOW)
MSB(7)
(7)
MSB(7)
(6)
(6)
(6)
(5)
(5)
(5)
(4)
(4)
(4)
(3)
(3)
(3)
(2)
(2)
(2)
(1)
(1)
(1)
LSB(0)
LSB(0)
LSB(0)
Figure 4. Binary 8-bit Application
7
PRODUCT SPECIFICATION
TMC2272A
VDD
VDD
p
p
Data or
Control
Input
Output
n
n
GND
GND
Figure 5. Equivalent Digital Input Circuit
Figure 6. Equivalent Digital Output Circuit
Absolute Maximum Ratings (beyond which the device may be damaged)1
Parameter
Min
Max
Unit
Supply Voltage
-0.5
7.0
V
Input Voltage
-0.5
VDD + 0.5
V
-0.5
VDD + 0.5
V
-3.0
6.0
mA
1
sec
-20
110
°C
140
°C
150
°C
300
°C
Applied
Voltage2
Externally Forced
Current3,4
Short Circuit Duration (single output in HIGH state to ground)
Operating, Ambient Temperature
Junction Temperature
Storage Temperature
Lead Soldering Temperature (10 seconds)
-65
Typ
Notes:
1. Absolute maximum ratings are limiting values applied individually while all other parameters are within specified operating
conditions. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed
only if Operating Conditions are not exceeded.
2. Applied voltage must be current limited to specified range.
3. Forcing voltage must be limited to specified range.
4. Current is specified as conventional current flowing into the device.
8
REV. 1.1.3 10/25/00
TMC2272A
PRODUCT SPECIFICATION
Operating Conditions
Parameter
VDD
Power Supply Voltage
fCLK
Clock Frequency
Min
Nom
Max
4.75
5.0
Units
5.25
V
TMC2272A
30
MHz
TMC2272A-2
40
MHz
TMC2272A-3
50
MHz
tPWH
CLK pulse width, HIGH
6
ns
tPWL
CLK pulse width, LOW
8
ns
tS
Input Data Setup Time
6
ns
tH
Input Data Hold Time
2
ns
VIH
Input Voltage, Logic HIGH
2.0
V
VIL
Input Voltage, Logic LOW
0.8
IOH
Output Current, Logic HIGH
-2.0
mA
IOL
Output Current, Logic LOW
4.0
mA
TA
Ambient Temperature, Still Air
70
°C
0
V
Electrical Characteristics
Parameter
IDD
IDDU
Conditions
Total Power Supply
Current
Power Supply Current,
Unloaded
IDDQ
Power Supply Current,
Quiescent
CPIN
I/O Pin Capacitance
IIH
Input Current,
HIGH1
1
Min
Typ
Max
Units
TMC2272A
125
mA
TMC2272A-2
140
mA
TMC2272A-3
155
mA
TMC2272A
120
mA
TMC2272A-2
135
mA
TMC2272A-3
150
mA
VDD = Max, CLK = LOW
12
mA
VDD = Max, CLOAD = 25pF, fCLK = Max
VDD = Max, fCLK=Max
5
VDD = Max, VIN = VDD
pF
±5
µA
IIL
Input Current, LOW
VDD = Max, VIN = 0 V
±5
µA
IOZH
Hi-Z Output Leakage
Current, Output HIGH2
VDD = Max, VIN = VDD
±10
µA
IOZL
Hi-Z Output Leakage
Current, Output LOW2
VDD = Max, VIN = 0 V
±10
µA
IOS
Short-Circuit Current
-80
mA
VOH
Output Voltage, HIGH
IOH = Max, VDD = Min
VOL
Output Voltage, LOW
IOL = Max, VDD = Min
-20
2.4
V
0.4
V
Notes:
1. Except pins XC11-0, YC11-8.
2. Pins XC11-0, YC11-8.
REV. 1.1.3 10/25/00
9
PRODUCT SPECIFICATION
TMC2272A
Switching Characteristics
Parameter
Conditions
tDO
Output Delay Time
CLOAD = 25 pF
tHO
Output Hold Time
CLOAD = 25 pF
Applications Discussion
The TMC2272A can convert between any two three-coordinate
colorspaces with the selection of the proper coefficients. Sets
of coefficients for some popular colorspace conversions are
presented below.
By concatenating coefficient matrices of single transformations, the user can program the TMC2272A to perform
compound transforms efficiently. For example, given an
RGB input, correction of the relative values of R and B, for
A B C
J
K L
D E F
M N O
G H I
P Q R
=
Min
Typ
Max
Units
15
3
ns
ns
color temperature, conversion to YIQ, modification of
contrast by changing Y, and conversion back to RGB can be
performed as quickly and easily as any simple transformation.
To calculate the final set of coefficients from the coefficients
of the individual transformations, the procedure in Figure 7
(concatenation) is used. If more than two matrices are to be
combined, the result from the concatenation of the first two
matrices is concatenated with the third. If more matrices
must be incorporated in the final function, the last step is
repeated.
AJ + BM + CP
AK + BN + CQ
AL + BO + CR
DJ + EM + FP
DK + EN + FQ
DL + EO + FR
GJ + HM + IP
GK + HN + IQ
GL + HO + IR
Figure 7. Concatenation
Converting from GBR to YCBCR
With the right coefficients, two external NOT gates, and an
external 4-bit half-adder, the TMC2272A can convert video
data from 8-bit full-scale (e.g. VGA) GBR components to 10bit YCBCR components.
Table 3. 10-bit component formats and
inclusive ranges.
Color Space Term
Range
Format
Y
Luminance
64-940
magnitude
Y'
Y - 64
0-876
magnitude
CB
Color difference,
Blue
64-960
magnitude
U'
CB - 512
±448
CR
Color difference,
Red
64-960
V'
CR - 512
±448
2’s comp
GBR
Green, Blue, Red
components
0-255
magnitude,
8-bits
10
2’s comp
magnitude
The analog defining equations for 1 Volt luminance and ±0.5
Volt color difference components are:
Y = + 0.5870 (G) + 0.1140 (B) + 0.2990 (R)
B – Y = – 0.3313 (G) + 0.5000 (B) – 0.1687 (R)
R – Y = – 0.4187 (G) – 0.0813 (B) + 0.5000 (R)
To translate these equations into the digital domain, note that
the ranges of R, G, and B are 0 to 255 instead of 0 to 1, the
range of Y is 64 to 940 instead of 0 to 1, and the ranges of U
and V are 64 to 960 instead of +/-0.5:
Y
= (876/255)(0.587(G)+0.114(B)+0.299(R))+64
= 2.01652 (G)+0.39162(B)+1.02715(R) +64
CB = (896/255)(0.3313(G)+0.5(B)-0.1687(R))+512
= -1.16397(G)+1.75686(B)-0.59289(R)+512
CR = (896/255)(-0.4187(G)-0.0813(B)+0.5(R))+512
= -1.47115(G)-0.28571(B)+1.75686(B))+512
Let Y'=Y-64, U'=CB-512, and V'=CR - 512. The TMC2272A
will compute Y', U', and V'. Adding 64 (040h) externally to Y'
will then yield Y, whereas inverting the most significant bits of
U' and V', U'9 and V'9, will yield CB and CR, respectively.
Multiplying the equations immediately above by 128 and
rounding each coefficient to the nearest integer yields the recommended set of coefficients for GBR to YUV conversion.
REV. 1.1.3 10/25/00
TMC2272A
PRODUCT SPECIFICATION
128 (Y')
=
258 (G)
102
+50 (B)
032
+131 (R)
083
dec.
hex
128 (U')
=
-149 (G)
36B
+225 (B)
0E1
-76 (R)
3B4
dec
hex
128l (V')
=
-188 (G)
344
-37 (B)
3DB
+225 (R)
0E1
dec.
hex
If the TMC2272A input data alignment for 8-bit GBR is:
0
0
G7
G6
G5
G4
G3
G2
G1
G0
0
0
0
0
B7
B6
B5
B4
B3
B2
B1
B0
0
0
0
0
R7
R6
R5
R4
R3
R2
R1
R0
0
0
then the output data alignment for 10-bit Y'U'V' is:
0
0
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
U9
U9
U9
U8
U7
U6
U5
U4
U3
U2
U1
U0
V9
V9
V9
V8
V7
V6
V5
V4
V3
V2
V1
V0
where the tripled U9 and V9 sign bits denote two’s complement
sign extensions. The factors of 4 in the input data format and
128 in the equations are absorbed by the internal 9-bit (factor
of 512) right-shifting of the emerging results.
As in the previous RGB to YCBCR case, begin with the
defining equations, but without the range compensation
factors of 255/876 and 255/896:
At the output of the TMC2272A, invert the most significant
bits, U9 and V9, of the chrominance components, and add 1 at
Y6 of the luminance to obtain the true CCIR Rec. 601 values.
+0.2990 (R)
Y=
Converting from GBR to 8-bit Full-Scale YUV
With the right coefficients and two external NOT gates, the
TMC2272A can convert video data from 8-bit full-scale (e.g.
VGA) GBR components to 8-bit full-scale YUV components.
Table 4. 8-bit component formats and
inclusive ranges:
Color Space Term
Range
Format
Y
Luminance
0-255
magnitude
U
Color difference,
Blue
128 to
-127
2’s comp
U'
U + 128
0-255
magnitude
V
Color difference, Red 128 to
-127
V'
V + 128
0-255
magnitude
G,B,R Green, Blue, Red
components
0-255
magnitude
REV. 1.1.3 10/25/00
U = -0.3313 (G)
0.5870 (G) +0.1140 (B)
+0.5000 (B)
V=
-0.1687 (R)
-0.4187 (G) -0.0813 (B)
+0.5000 (R)
The TMC2272A will compute Y, U, and V directly, whereas
inverting the most significant bits of U and V, U7 and V7 will
yield U' and V', respectively. Multiplying the equations
immediately above by 512 and rounding each coefficient to
the nearest integer yields the recommended set of coefficients for GBR to YUV conversion.
2’s comp
11
PRODUCT SPECIFICATION
512 (Y)
=
512 (U)
=
512 (V)
=
TMC2272A
301 (G)
12D
+
58 (B)
03A
+
153 (R)
099
dec.
hex
–
170 (G)
356
+
256 (B)
100
–
86 (R)
3AA
dec.
hex
–
214 (G)
32A
–
42 (B)
3D6
+
256 (R)
100
dec.
hex
If the TMC2272A input data alignment for 8-bit GBR is:
0
0
0
0
G7
G6
G5
G4
G3
G2
G1
G0
0
0
0
0
B7
B6
B5
B4
B3
B2
B1
B0
0
0
0
0
R7
R6
R5
R4
R3
R2
R1
R0
then the output data alignment for 8-bit YUV is:
0
0
0
0
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
U7
U7
U7
U7
U7
U6
U5
U4
U3
U2
U1
U0
V7
V7
V7
V7
V7
V6
V5
V4
V3
V2
V1
V0
where the quintupled U9 and V9 sign bits denote two’s complement sign extensions. The factor of 512 in the equations
above is absorbed by the internal 9-bit right shift of each
emerging result.
At the output of the TMC2272A, invert the most significant
bits, U7 and V7, of the chrominance components, to obtain
the 8-bit offset format.
Converting From YCBCR to GBR
Following the notation employed earlier, the TMC2272A will
be used to convert data in Y'U'V' format into GBR format.
R=
– 0.20324 (V')
+
204 (V')
0CC
dec.
hex
Decrease the incoming luminance at the input to the
TMC2272A by 64 by adding 1’s at positions Y9, Y8, Y7, and
Y6. Invert U9 and V9 and their sign extensions, to accommodate CCIR Rec. 601 data. Instead of reducing Y by 64, an
alternate is to reduce each of the G, B, and R outputs by
(255) (64 / 876) = 19.
For the Y'U'V' to RGB conversion, the TMC2272A input
data alignment for 10-bit Y'U'V' is:
0
Since Y' = 876, U' = V' = 0, and G = B = R = 255 for saturated
white output, every Y' coefficient will be 225/876 = 0.29110.
The full analog matrix for Y'U'V' to GBR conversion is:
149 (Y')
095
0
Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
U9 U9 U9 U8 U7 U6 U5 U4 U3 U2 U1 U0
V9 V9 V9 V8 V7 V6 V5 V4 V3 V2 V1 V0
G=
0.29110 (Y')
– 0.09794 (U')
B=
0.29110 (Y')
+ 0.50431 (U')
where the tripled U9 and V9 sign bits denote two’s complement sign extensions. The TMC2272A output data alignment for 8-bit GBR is then:
R=
0.29110 (Y')
+ 0.39901 (V')
0
0
0
0
G7 G6 G5 G4 G3 G2 G1 G0
0
0
0
0
B7 B6 B5 B4 B3 B2 B1 B0
0
0
0
0
R7 R6 R5 R4 R3 R2 R1 R0
Since the largest element is just over 0.5 and the largest permissible coefficient is 511, multiply all elements of the
matrix by 512 to obtain the values to load into the
TMC2272A.
G=
149 (Y' )
095
–
50 (U')
3CE
B=
149 (Y')
095
+
258 (U')
100
12
–
04 (V')
398
dec.
hex
dec.
hex
Converting From 8-bit Full Scale YUV to GBR
Following the notation employed earlier, the TMC2272A
will be used to convert data in 8-bit YUV format into 8-bit
GBR format.
REV. 1.1.3 10/25/00
TMC2272A
PRODUCT SPECIFICATION
Since Y = 256, U = V = 0, and G = B = R = 255 for saturated
white output, every Y coefficient will be 255 / 255=1.0. The
full matrix for YUV to GBR conversion is:
-0.7142 (V)
For the YUV to RGB conversion, the TMC2272A input data
alignment for 10-bit Y'U'V' is:
0
Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 0
G = 1.0 (Y)
-0.3443 (U)
B = 1.0 (Y)
+1.7727 (U)
V9 V9 V8 V7 V6 V5 V4 V3 V2 V1 V0 0
R = 1.0 (Y)
+1.3965 (V)
where the doubled U9 and V9 sign bits denote two’s complement sign extensions. The TMC2272A output data alignment for 8-bit GBR is then:
U9 U9 U8 U7 U6 U4 U4 U3 U2 U1 U0 0
Since the largest element is over 1.0 and the largest permissible coefficient is 511, multiply all elements of the matrix by
256 to obtain the values to load into the TMC2272A:
G=
256 (Y')
100
- 88 (U')
3A8
B=
256 (Y')
100
+ 454 (U')
1C6
dec.
hex
256 (Y')
100
+ 359 (V')
167
dec.
hex
R=
- 83 (V')
349
dec.
hex
0
0
0
0
G7 G6 G5 G4 G3 G2 G1 G0
0
0
0
0
B7 B6 B5 B4 B3 B2 B1 B0
0
0
0
0
R7 R6 R5 R4 R3 R2 R1 R0
Note that the inputs have to be doubled because the coefficient gain is 256, whereas the internal gain is 1 / 512, for a
net gain of 1/2.
Table 5. Summary of Colorspace Conversion Coefficients
Conversion
KAX
KAY
KAZ
KBX
KBY
KBZ
KCX
KCY
KCZ
RGB to YUV
099
3AA
100
12D
356
32A
03A
100
3D6
RGB to YCBCR
083
3B4
0E1
102
36B
344
032
0E1
3DB
YUV to RGB
100
100
100
000
3A8
1C6
167
349
000
YCBCR to RGB
149
149
149
000
3CE
102
0CC
398
000
Table 6. Conversion Port Assignments and Alignments
Port
AIN
BIN
CIN
XOUT
YOUT
ZOUT
RGB to YUV
R7-0
G7-0
B7-0
Y7-0
U7-0(e)
V7-0(e)
RGB to YCBCR
R7-0
G7-0
B7-0
Y9-0
U9-0(e)
V9-0(e)
Y8-1(e)
U8-1(e)
V8-1(e)
R7-0
G7-0
B7-0
Y9-0
CB9-0(e)
CR9-0(e)
R7-0
G7-0
B7-0
YUV to RGB
YCBCR to RGB
Where XY-0 denotes right-justified, (e) denotes sign extension, and XY-1 denotes shifted one bit leftward from a right-justified
position.
HSV (HSI) Format Conversions
HSV (or HSI) refers to Hue (color), Saturation (vividness),
and Value (intensity or brightness), quantities which are
directly related to the human perception of light and color.
The V (or I) levels are simply the Y (or luminance) levels.
Hue and Saturation are derived from the R-Y and B-Y color
difference values of a signal.
HSV Calculations:
Value (V) = Intensity (I) = Y
Hue (H) = Arctan (B-Y/R-Y)
Saturation (S) =
R-Y = S*cos(H)
B-Y = S*sin(H)
One may use two 64Kx8 ROM look-up-tables to calculate
Hue and Saturation from R-Y and B-Y in an 8-bit system.
However, the finite size of this LUT may limit performance,
especially if the TMC2272A’s full precision is used. The
TMC2330A, developed to translate between rectangular and
polar coordinates, can perform the trigonometric transformations to 16 bit precision at 50MHz. These calculations are
the same as required in HSV calculations. A 4 Gigabyte x 32
bit LUT can achieve the same accuracy and precision as the
TMC2330A, if it is programmed correctly.
2
2
(R – Y) + (B – Y)
REV. 1.1.3 10/25/00
13
PRODUCT SPECIFICATION
TMC2272A
To convert between Y, R-Y, B-Y and HSV, the TMC2272A
isn’t needed at all; simply use the TMC2330A. To convert
between HSV and any other format, use the TMC2330A to
translate between HSV and Y, R-Y, B-Y, and use the
TMC2272A to translate between Y, R-Y, B-Y and the other
format. See Figures 8 and 9.
X11-0 (Y)
12
12
A11-0
ANY DESIRED
COLORSPACE
12
B11-0
EQUALIZING PIPELINE
DELAY, 22 CYCLES
3X TMC2011
Y11-0 (R-Y) XRIN15-0
V
12
RXOUT15, 10-0
TMC2272A
S
12
12
C11-0
NOTE 1
Z11-0 (B-Y)
NOTE 1
TMC2330A
YPIN15-0
12
YPOUT15, 10-0
H
12
NOTE 1
NOTE 1
12
Notes:
1. Connect TMC2272A MSBs (Bits 11) to TMC2330A MSBs (Bits 15) and also to TMC2330A Bits 14-11. Connect
TMC2272A LSBs (Bits 10-0) to TMC2330A LSBs (Bits 10-0). TMC2330A output bits 14-11 are overflow.
2. TMC2272A Y11-0 outputs should not be confused with the designation “Y” used to signify the intensity components.
The assignment of components to TMC2272A inputs and outputs may be altered through the selection of appropriate
coefficients.
Figure 8. Conversion to HSV
V
12
S
H
EQUALIZING PIPELINE
DELAY, 22 CYCLES
3X TMC2011
(Y)
12
RXOUT15, 10-0 (R-Y)
NOTE 1
NOTE 1
12
NOTE 1
12
TMC2330A
X11-0
12
XRIN15-0
YPIN15-0
A11-0
TMC2272A
12
YPOUT15, 10-0
NOTE 1
B11-0
Y11-0
12
(B-Y)
C11-0
12
ANY
COLORSPACE
Z11-0
12
Notes:
1. Connect input MSBs (Bits 11) to TMC2330A MSBs (Bits 15) and also to TMC2330A Bits 14-11. Connect input LSBs
(Bits 10-0) to TMC2330A LSBs (Bits 10-0).
2. TMC2272A Y11-0 outputs should not be confused with the designation “Y” used for an intensity component. Component
assignment depends on the coefficient used.
Figure 9. Conversion from HSV
Input Interpolation/Output Decimation and
Filtering
In some applications the two color-difference signals (R-Y/B-Y
or Cr/Cb, for example) are transmitted at one-half the rate of
the luminance (Y) signal. These two color-difference signals
are often multiplexed to one signal which is at the same sample
rate as the luminance signal.
14
In many applications, if the color difference signals are
already band-limited, it is satisfactory to use the same color
difference sample for each two luminance samples. Little
improvement is obtained with a simple averaging ([A+B]/2)
interpolation filter. If the color difference signal is not bandlimited, either of these two methods may yield unsatisfactory
results due to aliasing. In this case, a Fairchild TMC2242B
digital low-pass (half-band) interpolating filter will correctly
band-limit each color difference signal as it is interpolated.
See Figure 10.
REV. 1.1.3 10/25/00
TMC2272A
PRODUCT SPECIFICATION
The same methods are used to decimate the color difference
outputs. Simple decimation by removing every other sample
of color information may yield unsatisfactory results due to
aliasing. This is a problem because the color difference signals have not been transformed with the higher-bandwidth
luminance signals and therefore have higher bandwidths than
they had before the transform. The best performance is
(Y)
LUMINANCE
(Y) INPUT
12
(Cr)
Cr+Cb
xMSPS 12
NOTE1
DE-MUX
NOTE1
x/2 MSPS
(Cb) NOTE1
x/2 MSPS
CLK
12
12
obtained by using a precise low-pass (half-band) decimation
filter such as the TMC2242B to remove aliasing components.
See Figure 11.
The TMC2242B is a bi-directional, selectable rate filter/
interpolator/decimator.
EQUALIZING PIPELINE
DELAY, 60 CYCLES OR
TMC2242B IN 1:1 MODE
A11-0
xMSPS
TMC2242B LOW PASS
(Cr)
FILTER/INTERPOLATOR,
1:2 MODE
xMSPS
(Cb)
TMC2242B LOW PASS
FILTER/INTERPOLATOR,
xMSPS
1:2 MODE
12
B11-0
12
TMC2272A
C11-0
12
xMSPS
Notes:
1. Width of input paths will vary with source.
2. See TMC2242B Datasheet for further information.
Figure 10. Input Interpolation and Filtering
X11-0
(Y)
12
TMC2272A
Y11-0
xMSPS
Z11-0
xMSPS
(Cr)
12
(Cb)
12
EQUALIZING PIPELINE
DELAY, 60 CYCLES OR
TMC2242B IN 1:1 MODE
xMSPS
TMC2242B LOW PASS
(Cr)
FILTER/INTERPOLATOR,
x/2 MSPS
1:2 MODE
12
LUMINANCE
(Y) OUTPUT
xMSPS
12
DE-MUX
(Cb)
TMC2242B LOW PASS
FILTER/INTERPOLATOR,
x/2 MSPS 12
1:2 MODE
Cr+Cb OUTPUT
(MULTIFLEXED COLOR
DIFFERENCE)
CLK
xMSPS
Figure 11. Output Decimation and Filtering
Related Products
•
•
•
•
•
•
TMC1175 8 bit 40 Msps A/D Converter
TMC2301 Image Resampling Sequencer
TMC2302A Image Manipulation Sequencer
TMC2249A Video Mixer
TMC2242B Half–Band Filter
TMC2330A Coordinate Transformer
REV. 1.1.3 10/25/00
15
PRODUCT SPECIFICATION
TMC2272A
Mechanical Dimensions
120-Lead CPGA Package Outline
Symbol
Inches
Min.
A
A1
A2
øB
øB2
D
D1
e
L
L1
M
N
P
Max.
Millimeters
Min.
Notes:
Notes
1. Pin #1 identifier shall be within shaded area shown.
Max.
.080
.160
.040
.060
.125
.215
.016
.020
.050 NOM.
1.340
1.380
2.03
4.06
1.01
1.53
3.17
5.46
0.40
0.51
1.27 NOM.
33.27
35.05
1.200 BSC
.100 BSC
.110
.145
.170
.190
13
120
.003
—
30.48 BSC
2.54 BSC
2.79
3.68
4.31
4.83
13
120
.076
—
2. Pin diameter excludes solder dip finish.
3. Dimension "M" defines matrix size.
4. Dimension "N" defines the maximum possible number of pins.
5. Orientation pin is at supplier's option.
2
2
SQ
6. Controlling dimension: inch.
3
4
A
A2
A1
øB
L
D
øB2
P
e
Top View
Cavity Up
D1
Pin 1 Identifier
16
REV. 1.1.3 10/25/00
TMC2272A
PRODUCT SPECIFICATION
Mechanical Dimensions
120-Lead PPGA Package
Symbol
Inches
Min.
A
A1
A2
øB
øB2
D
D1
e
L
L1
M
N
P
Max.
Millimeters
Min.
Notes:
Notes
1. Pin #1 identifier shall be within shaded area shown.
Max.
.080
.160
.040
.060
.125
.215
.016
.020
.050 NOM.
1.340
1.380
2.03
4.06
1.01
1.53
3.17
5.46
0.40
0.51
1.27 NOM.
33.27
35.05
1.200 BSC
.100 BSC
.110
.145
.170
.190
13
120
.003
—
30.48 BSC
2.54 BSC
2.79
3.68
4.31
4.83
13
120
.076
—
2. Pin diameter excludes solder dip finish.
3. Dimension "M" defines matrix size.
4. Dimension "N" defines the maximum possible number of pins.
5. Orientation pin is at supplier's option.
2
2
SQ
6. Controlling dimension: inch.
3
4
A
A2
A1
øB
L
D
øB2
P
e
Top View
Cavity Up
D1
Pin 1 Identifier
REV. 1.1.3 10/25/00
17
PRODUCT SPECIFICATION
TMC2272A
Mechanical Dimensions
120-Lead Metric Quad Flat Package to Pin Grid Array Package (MPGA)
Symbol
Inches
Min.
A
A1
A2
A3
øB
øB2
D
D1
e
L
M
N
Max.
Millimeters
Min.
Notes:
Notes
1. Pin #1 identifier shall be within shaded area shown.
Max.
2. Pin diameter excludes solder dip finish.
.309
.311
.145
.155
.080
.090
.050 TYP.
.016
.020
.050 NOM.
1.355
1.365
7.85
7.90
3.68
3.94
2.03
2.29
1.27 TYP.
0.40
0.51
1.27 NOM.
34.42
34.67
2
2
SQ
1.200 BSC
.100 BSC
.175
.185
13
120
30.48 BSC
2.54 BSC
4.45
4.70
13
120
3
4
3. Dimension "M" defines matrix size.
4. Dimension "N" defines the maximum possible number of pins.
5. Orientation pin is at supplier's option.
6. Controlling dimension: inch.
A
A1
A2
L
A3
øB2
øB
e
D
e
Fairchild
TMC2272A
D1
Pin 1 Identifier
18
REV. 1.1.3 10/25/00
PRODUCT SPECIFICATION
TMC2272A
Mechanical Dimensions
120-Lead MQFP Package
Inches
Symbol
Min.
A
A1
A2
B
C
D/E
D1/E1
e
L
N
ND
α
ccc
Max.
—
.154
.010
—
.125
.144
.018
.012
.009
.005
1.219
1.238
1.098
1.106
.0315 BSC
.026
.037
120
30
0°
—
7°
.004
Millimeters
Min.
1. All dimensions and tolerances conform to ANSI Y14.5M-1982.
Max.
—
3.92
.25
—
3.17
3.67
.45
.30
.23
.13
30.95
31.45
27.90
28.10
.80 BSC
.65
.95
120
30
0°
—
Notes:
Notes
2. Controlling dimension is millimeters.
3. Dimension "B" does not include dambar protrusion. Allowable
dambar protrusion shall be .08mm (.003in.) maximum in excess
of the "B" dimension. Dambar cannot be located on the lower
radius or the foot.
3, 5
5
4. "L" is the length of terminal for soldering to a substrate.
5. "B" & "C" includes lead finish thickness.
4
7°
.10
.20 (.008) Min.
0° Min.
.13 (.005) R Min.
.13/.30
R
.005/.012
D
D1
e
C
PIN 1 IDENTIFIER
E
0.063" Ref (1.60mm)
L
α
Lead Detail
E1
See Lead Detail
Base Plane
A A2
B
A1
19
Seating Plane
-CLEAD COPLANARITY
ccc C
REV. 1.1.3 10/25/00
PRODUCT SPECIFICATION
TMC2272A
Ordering Information
Product Number
Temperature
Range
Speed
Grade
Screening
Package
Package
Marking
TMC2272AG1C
0°C to 70°C
30 MHz
Commercial
120 Pin Ceramic Pin Grid Array
2272AG1C
TMC2272AG1C2
0°C to 70°C
40 MHz
Commercial
120 Pin Ceramic Pin Grid Array
2272AG1C2
TMC2272AG1C3
0°C to 70°C
50 MHz
Commercial
120 Pin Ceramic Pin Grid Array
2272AG1C3
TMC2272AH5C
0°C to 70°C
30 MHz
Commercial
120 Pin Plastic Pin Grid Array
2272AH5C
TMC2272AH5C2
0°C to 70°C
40 MHz
Commercial
120 Pin Plastic Pin Grid Array
2272AH5C2
TMC2272AH5C3
0°C to 70°C
50 MHz
Commercial
120 Pin Plastic Pin Grid Array
2272AH5C3
TMC2272AH6C
0°C to 70°C
30 MHz
Commercial
120 Lead Metric Quad Flatpack
to Pin Grid Array
N/A
TMC2272AH6C2
0°C to 70°C
40 MHz
Commercial
120 Lead Metric Quad Flatpack
to Pin Grid Array
N/A
TMC2272AH6C3
0°C to 70°C
50 MHz
Commercial
120 Lead Metric Quad Flatpack
to Pin Grid Array
N/A
TMC2272AKEC
0°C to 70°C
30 MHz
Commercial
120 Lead Plastic Quad Flatpack
2272AKEC
TMC2272AKEC2
0°C to 70°C
40 MHz
Commercial
120 Lead Plastic Quad Flatpack
2272AKEC2
TMC2272AKEC3
0°C to 70°C
50 MHz
Commercial
120 Lead Plastic Quad Flatpack
2272AKEC3
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
10/25/00 0.0m 003
Stock#DS30002272A
2000 Fairchild Semiconductor Corporation