ONSEMI MC34084DW

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These devices are a new generation of high speed JFET input monolithic
operational amplifiers. Innovative design concepts along with JFET
technology provide wide gain bandwidth product and high slew rate.
Well–matched JFET input devices and advanced trim techniques ensure low
input offset errors and bias currents. The all NPN output stage features large
output voltage swing, no deadband crossover distortion, high capacitive
drive capability, excellent phase and gain margins, low open loop output
impedance, and symmetrical source/sink AC frequency response.
This series of devices is available in fully compensated or
decompensated (AVCL≤2) and is specified over a commercial temperature
range. They are pin compatible with existing Industry standard operational
amplifiers, and allow the designer to easily upgrade the performance of
existing designs.
• Wide Gain Bandwidth: 8.0 MHz for Fully Compensated Devices
Wide Gain Bandwidth: 16 MHz for Decompensated Devices
• High Slew Rate: 25 V/µs for Fully Compensated Devices
High Slew Rate: 50 V/µs for Decompensated Devices
• High Input Impedance: 1012Ω
•
•
•
•
•
HIGH PERFORMANCE
JFET INPUT
OPERATIONAL AMPLIFIERS
8
8
1
1
P SUFFIX
PLASTIC PACKAGE
CASE 626
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
PIN CONNECTIONS
Offset Null
1
8
NC
Inv. Input
2
–
7
Noninv. Input
3
+
6
VCC
Output
VEE
4
5
Offset Null
Input Offset Voltage: 0.5 mV Maximum (Single Amplifier)
Large Output Voltage Swing: –14.7 V to +14 V for
Large Output Voltage Swing: VCC/VEE = ±15 V
Low Open Loop Output Impedance: 30 Ω @ 1.0 MHz
(Single, Top View)
Low THD Distortion: 0.01%
Output 1
Excellent Phase/Gain Margins: 55°/7.6 dB for Fully Compensated
Devices
Op Amp
Function
Single
Dual
Quad
Fully
Compensated
VEE
MC34081BD
MC34080BD
MC34081BP
MC34080BP
MC34082P
MC34083BP
MC34084DW
MC34085BDW
MC34084P
7
–
+
4
Package
TA = 0° to +70°C
70°C
Plastic DIP
Plastic DIP
SO–16L
TA = 0° to +70°C
MC34085BP
1
16
2
15
Inputs 1
3
VCC
–
+
1
4
–
+
14
4
13
5
12
Inputs 2
6
+
–
2
3
+
–
11
Inputs 2
5
SO–8
Plastic DIP
16
14
1
1
P SUFFIX
PLASTIC PACKAGE
CASE 646
DW SUFFIX
PLASTIC PACKAGE
CASE 751G
(SO–16L)
PIN CONNECTIONS
Output 1
6
VCC
Output 2
(Dual, Top View)
Operating
Temperature
Range
AVCL≥2
Compensated
8
–
3 +
Inputs 1
ORDERING INFORMATION
1
2
Output 4
Inputs 4
Output 1
1
14
2
13
Inputs 1
3
VEE
Inputs 3
VCC
7
10
Output 3
NC
8
9
NC
–
+
Inputs 4
12
11
10
+
–
2
3
+
–
7
9
8
VEE
Inputs 3
Output 3
(Quad, Top View)
 Motorola, Inc. 1996
MOTOROLA ANALOG IC DEVICE DATA
4
5
Inputs 2
Output 2
1
4
6
Output 2
–
+
Output 4
Rev 0
1
MC34080 thru MC34085
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VS
+44
V
VIDR
(Note 1)
V
Input Voltage Range
VIR
(Note 1)
V
Output Short Circuit Duration (Note 2)
tSC
Indefinite
sec
Operating Ambient Temperature Range
TA
0 to +70
°C
TJ
+125
°C
Tstg
– 65 to +165
°C
Supply Voltage (from VCC to VEE)
Input Differential Voltage Range
Operating Junction Temperature
Storage Temperature Range
NOTES: 1. Either or both input voltages must not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature
(TJ) is not exceeded.
Representative Schematic Diagram
(Each Amplifier)
VCC
200 µA
50 µA
850 µA
Q1
D1
–
J1
Q6
R1
240
J2
18
Output
RSC
Inputs
+
+
Q8
CC
5.0
pF
CF
20
pF
700
R2
D2
Q7
CM
+
3.0
pF
Q5
Q2
R3
1.0 k
Q10
Q9
500
500
Ω
Q11
D4
1
Null Adjust
(MC34080, 081)*
Q4
D3
R6
50 µA
Q3
R4
1.0 k
5
100 µA
RM
300 µA
R7
66 k
VEE
*Pins 1 & 5 (MC34080,081) should not be directly grounded or connected to VCC.
2
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = – 15 V, TA = Tlow to Thigh [Note 3], unless otherwise noted.)
Characteristics
Input Offset Voltage (Note 4)
Single
TA = +25°C
TA = 0° to +70°C (MC34080B, MC34081B)
Dual
TA = +25°C
TA = 0° to +70°C (MC34082, MC34083)
Quad
TA = +25°C
TA = 0° to +70°C (MC34084, MC34085)
Average Temperature Coefficient of Offset Voltage
Symbol
IIB
Input Offset Current (VCM = 0 Note 5)
TA = +25°C
TA = 0° to +70°C
IIO
Large Signal Voltage Gain (VO = ±10 V, RL = 2.0 k)
TA = +25°C
TA = Tlow to Thigh
AVOL
Output Voltage Swing
RL = 2.0 k, TA = +25°C
RL = 10 k, TA = +25°C
RL = 10 k, TA = Tlow to Thigh
VOH
RL = 2.0 k, TA = +25°C
RL = 10 k, TA = +25°C
RL = 10 k, TA = Tlow to Thigh
VOL
Input Common Mode Voltage Range
TA = +25°C
Typ
Max
Unit
mV
—
—
0.5
—
2.0
4.0
—
—
1.0
—
3.0
5.0
—
—
6.0
—
12
14
—
10
—
µV/°C
—
—
0.06
—
0.2
4.0
nA
—
—
0.02
—
0.1
2.0
nA
25
15
80
—
—
—
13.2
13.4
13.4
13.7
13.9
—
—
—
—
—
—
—
–14.1
–14.7
—
–13.5
–14.1
–14.0
∆VIO/∆T
Input Bias Current (VCM = 0 Note 5)
TA = +25°C
TA = 0° to +70°C
Output Short Circuit Current (TA = +25°C)
Input Overdrive = 1.0 V, Output to Ground
Source
Sink
Min
VIO
V/mV
V
ISC
mA
20
20
VICR
31
28
—
—
(VEE +4.0) to
(VCC – 2.0)
V
Common Mode Rejection Ratio (RS ≤ 10 k, TA = +25°C)
CMRR
70
90
—
dB
Power Supply Rejection Ratio (RS = 100 Ω, TA = 25°C)
PSRR
70
86
—
dB
Power Supply Current
Single
TA = +25°C
TA = Tlow to Thigh
Dual
TA = +25°C
TA = Tlow to Thigh
Quad
TA = +25°C
TA = Tlow to Thigh
ID
mA
—
—
2.5
—
3.4
4.2
—
—
4.9
—
6.0
7.5
—
—
9.7
—
11
13
NOTES: (continued)
3. Tlow = 0°C for MC34080B
Thigh = +70°C for MC34080B
0°C for MC34081B
+70°C for MC34081B
0°C for MC34084
+70°C for MC34084
0°C for MC34085
+70°C for MC34085
4. See application information for typical changes in input offset voltage due to solderability and temperature cycling.
5. Limits at TA = +25°C are guaranteed by high temperature (Thigh) testing.
MOTOROLA ANALOG IC DEVICE DATA
3
MC34080 thru MC34085
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = – 15 V, TA = +25°C, unless otherwise noted.)
Symbol
Characteristics
Slew Rate (Vin = –10 V to +10 V, RL = 2.0 kΩ, CL = 100 pF)
Compensated
AV = +1.0
AV = –1.0
Decompensated AV = +2.0
AV = –1.0
Min
Typ
Max
Unit
SR
Settling Time (10 V Step, AV = –1.0)
To 0.10% (±1/2 LSB of 9–Bits)
To 0.01% (±1/2 LSB of 12–Bits)
V/µs
20
—
35
—
25
30
50
50
—
—
—
—
—
—
0.72
1.6
—
—
6.0
12
8.0
16
—
—
—
—
400
800
—
—
—
—
55
39
—
—
—
—
7.6
4.5
—
—
µs
ts
Gain Bandwidth Product (f = 200 kHz)
Compensated
Decompensated
GBW
Power Bandwidth (RL = 2.0 k, VO = 20 Vpp, THD = 5.0%)
Compensated AV = +1.0
Decompensated AV = – 1.0
BWp
MHz
kHz
Phase Margin (Compensated)
RL = 2.0 k
RL = 2.0 k, CL = 100 pF
φm
Gain Margin (Compensated)
RL = 2.0 k
RL = 2.0 k, CL = 100 pF
Am
Equivalent Input Noise Voltage
RS = 100 Ω, f = 1.0 kHz
en
—
30
—
nV/ √ Hz
Equivalent Input Noise Current (f = 1.0 kHz)
In
—
0.01
—
pA/ √ Hz
Input Capacitance
Ci
—
5.0
—
pF
Input Resistance
ri
—
1012
—
Ω
THD
—
0.05
—
%
Channel Separation (f = 10 kHz)
—
—
120
—
dB
Open Loop Output Impedance (f = 1.0 MHz)
Zo
—
35
—
Ω
Figure 1. Input Common Mode Voltage Range
versus Temperature
0
VCC/VEE = ±3.0 V to ±22 V
∆VIO = 5.0 mA
100 k
VCC
–1.0
3.0
2.0
1.0
VEE
0
–55
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
4
100
125
dB
Figure 2. Input Bias Current
versus Temperature
IIB , INPUT BIAS CURRENT (pA)
VICR , INPUT COMMON MODE VOLTAGE RANGE (V)
Total Harmonic Distortion
AV = +10, RL = 2.0 k, 2.0 ≤ VO ≤ 20 Vpp, f = 10 kHz
Degrees
10 k
VCC/VEE = ±15 V
VCM = 0 V
1.0 k
100
10
1.0
–55
–25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
Figure 3. Input Bias Current versus
Input Common Mode Voltage
Figure 4. Output Voltage Swing
versus Supply Voltage
50
VCC/VEE = ±15 V
TA = 25°C
120
VO, OUTPUT VOLTAGE SWING (Vpp )
I IB , INPUT BIAS CURRENT (pA)
140
100
80
60
40
20
–12
–8.0
–4.0
0
4.0
8.0
VIC, INPUT COMMON MODE VOLTAGE (V)
RL Connected to Ground
TA = 25°C
40
30
20
10
0
12
0
0
VCC
Source
VCC/VEE = +15 V to +22 V
TA = 25°C
–2.0
–3.0
Sink
1.0
VEE
0
0
4.0
8.0
12
2.0
1.0
VEE
0
300
2.0
VCC/VEE = +15 V
RL to VCC
TA = 25°C
VEE
300 k
I SC , OUTPUT SHORT CIRCUIT CURRENT (mA)
V sat , OUTPUT SATURATION VOLTAGE (V)
–0.8
MOTOROLA ANALOG IC DEVICE DATA
30 k
300 k
Figure 8. Output Short Circuit Current
versus Temperature
–0.4
RL, LOAD RESISTANCE TO VCC (Ω)
3.0 k
RL, LOAD RESISTANCE TO GROUND (Ω)
VCC
30 k
VCC/VEE = ±15 V
TA = 25°C
–4.0
16
0
3.0 k
±25
VCC
–2.0
Figure 7. Output Saturation versus
Load Resistance to VCC
0
300
±10
±15
±20
VCC |VEE|, SUPPLY VOLTAGE (V)
0
IL, LOAD CURRENT (±mA)
1.0
±5.0
Figure 6. Output Saturation vesus
Load Resistance to Ground
V sat , OUTPUT SATURATION VOLTAGE (V)
V sat , OUTPUT SATURATION VOLTAGE (V)
Figure 5. Output Saturation versus
Load Current
–1.0
RL = 2.0 k
RL = 10 k
40
Source
30
Sink
20
VCC/VEE = ±15 V
RL ≤ 0.1 Ω
∆Vin = 1.0 V
10
0
–55
–25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
5
MC34080 thru MC34085
Figure 9. Output Impedance versus Frequency
Figure 10. Output Impedance versus Frequency
80
60
40
VCC/VEE = ±15 V
VCM = 0
VO = 0
∆IO = ±0.5 mA
TA = 25°C
Compensated
Units Only
20
AV = 1.0
AV = 1000
0
1.0 k
Z O , OUTPUT IMPEDANCE (Ω )
Z O , OUTPUT IMPEDANCE ( Ω )
80
AV = 100
10 k
AV = 10
100 k
1.0 M
10 M
20
AV = 100
AV = 1000
10 k
100 k
AV = 10
AV = 2.0
1.0 M
10 M
f, FREQUENCY (Hz)
Figure 11. Output Voltage Swing
versus Frequency
Figure 12. Output Distortion versus Frequency
0.5
VCC/VEE = ±15 V
RL = 2.0 k
THD = 1.0%
TA = 25°C
20
Compensated
Units AV = +1.0
THD, OUTPUT DISTORTION (%)
VO, OUTPUT VOLTAGE SWING (Vpp )
40
f, FREQUENCY (Hz)
24
Decompensated
Units AV = –1.0
12
8.0
4.0
0
10 k
60
0
1.0 k
28
16
VCC/VEE = ±15 V
VCM = 0
VO = 0
∆IO = ±0.5 mA
TA = 25°C
Decompensated
Units Only
AV = 1000
0.4
VCC/VEE = ±15 V
VO = 2.0 Vpp
RL = 2.0 k
TA = 25°C
*Compensated
Units Only
0.3
0.2
AV = 100
0.1
AV = 10
0
100 k
1.0 M
10 M
10
100
AV = 1.0*
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
A VOL , OPEN LOOP VOLTAGE GAIN
(dB NORMALIZED)
Figure 13. Open Loop Voltage Gain
versus Temperature
VCC/VEE = ±15 V
VO = –10 V to +10 V
RL = 10 k
f ≤ 10 Hz
1.08
1.04
1.00
0.96
0.92
–55
–25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
6
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
60
Phase
45
Gain
90
40
135
20
Solid Line Curves — Compensated Units
Dashed Line Curves — Decompensated Units
0
1.0
10
100
1.0 k 10 k 100 k
f, FREQUENCY (Hz)
180
1.0 M
10 M
100 M
20
100
Gain
Margin
= 5.5 dB
10
VCC/VEE = ±15 V
0 VO = 0 V
TA = 25°C
Phase
Margin
–10
= 43°
120
140
160
–20
1 — Gain, RL = 2.0 k
2 — Gain, RL = 2.0 k, CL = 100 pF
–30 3 — Phase, RL = 2.0 k
4 — Phase, RL = 2.0 k, CL = 100 pF
Decompensated Units Only
–40
1.0
2.0 3.0
5.0 7.0 10
180
200
20
30
50
φ , EXCESS PHASE (DEGREES)
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
Figure 16. Open Loop Voltage Gain and
Phase versus Frequency
20
100
10
1 — Gain, RL = 2.0 k
2 — Gain, RL = 2.0 k, CL = 100 pF
–30 3 — Phase, RL = 2.0 k
4 — Phase, RL = 2.0 k, CL = 100 pF
Compensated Units Only
4
–40
1.0
2.0 3.0
5.0 7.0 10
f, FREQUENCY (Hz)
200
30
50
1.20
VCC/VEE = ±15 V
RL = 2.0 k
1.10
1.00
0.90
0.80
–55
–25
0
25
50
75
100
125
Figure 19. Phase Margin versus
Load Capacitance
70
φ M , PHASE MARGIN (DEGREES)
PERCENT OVERSHOOT
160
180
3
20
140
TA, AMBIENT TEMPERATURE (°C)
100
Decompensated
Units AV = +2.0
60
Compensated
Units AV = +1.0
40
0
10
2
120
Figure 17. Normalized Gain Bandwidth
Product versus Temperature
Figure 18. Percent Overshoot versus
Load Capacitance
20
1
–20
f, FREQUENCY (Hz)
80
Gain
Margin
= 7.6 dB
0 VCC/VEE = ±15 V
VO = 0 V
Phase
TA = 25°C
Margin
–10
= 54°
φ , EXCESS PHASE (DEGREES)
80
0
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
VCC/VEE = ±15 V
VO = 0 V
RL = 2.0 k
TA = 25°C
GBW, GAIN BANDWIDTH PRODUCT (NORMALIZED)
100
Figure 15. Open Loop Voltage Gain and
Phase versus Frequency
φ , EXCESS PHASE (DEGREES)
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
Figure 14. Open Loop Voltage Gain and
Phase versus Frequency
VCC/VEE = ±15 V
RL = 2.0 k
∆VO = 100 mVpp
VO = –10 V to +10 V
TA = 25°C
100
CL, LOAD CAPACITANCE (pF)
MOTOROLA ANALOG IC DEVICE DATA
1.0k
60
R
VCC/VEE = ±15 V
RL = 2.0 k to
∆VO = 100 mVpp
VO = –10 V to +10 V
TA = 25°C
Compensated
Units AV = +1.0
50
40
30
20
10
0
10
Decompensated
Units AV = +2.0
100
1.0k
CL, LOAD CAPACITANCE (pF)
7
MC34080 thru MC34085
Figure 20. Gain Margin versus Load Capacitance
8.0
60
VCC/VEE = ±15 V
RL = 2.0 k to ∞
∆VO = 100 mVpp
VO = –10 V to +10 V
TA = 25°C
Compensated
Units AV = +1.0
6.0
φ m , PHASE MARGIN (DEGREES)
A m, GAIN MARGIN (dB)
10
4.0
Decompensated
Units AV = +2.0
2.0
0
10
100
CL, LOAD CAPACITANCE (pF)
Figure 21. Phase Margin versus Temperature
50
Solid Line Curves–Compensated Units AV = +1.0
CL = 10 pF Dashed Line Curves–Decompensated Units AV = +2.0
40
CL = 100 pF
30
20
CL = 360 pF
10
∆VO = 100 mVpp
VCC/VEE = ±15 V
VO = –10 V to +10 V
CL = 200 pF RL = 2.0 k to ∞
–25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
0
–55
10 k
Figure 23. Normalized Slew Rate
versus Temperature
Figure 22. Gain Margin versus Temperature
8.0
6.0
1.40
Solid Line Curves–Compensated Units AV = +1.0
Dashed Line Curves–Decompensated Units AV = +2.0
CL = 10 pF
VCC/VEE = ±15 V
RL = 2.0 k to ∞
∆VO = 100 mVpp
VO = –10 V to +10 V
4.0
2.0
0
–55
CL = 100 pF
CL = 200 pF
CL = 360 pF
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
8
100
125
SR, SLEW RATE (NORMALIZED)
A m, GAIN MARGIN (dB)
10
1.20
1.00
VCC/VEE = ±15 V
AV = +1.0 for Compensated Units
AV = –1.0 for Decompensated Units
RL = 2.0 k
CL = 100 pF
VO = –10 V to +10 V
0.80
0.60
–55
–25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
MC34084 Transient Response
AV = +1.0, RL = 2.0 k, VCC/VEE = ±15 V, TA = 25°C
Figure 24. Small Signal
Figure 25. Large Signal
CL = 100 pF
0
5.0 mV/Div
50 mV/Div
CL = 10 pF
0
0.2 µs/Div
0.5 µs/Div
MC34085 Transient Response
AV = +2.0, RL = 2.0 k, VCC/VEE = ±15 V, TA = 25°C
Figure 26. Small Signal
Figure 27. Large Signal
CL = 100 pF
0
0.2 µs/Div
MOTOROLA ANALOG IC DEVICE DATA
5.0 mV/Div
50 mV/Div
CL = 10 pF
0
0.5 µs/Div
9
100
TA = –55°C
TA = 25°C
80
TA = 125°C
VCC/VEE = ±15 V
∆VS = 3.0 V
VO = 0 V
60
VCC ± ∆VCC
40
+
–
20
VO
Compensated Units AV = +1.0
Decompensated Units AV = +2.0
VEE ± ∆VEE
0
0.1
1.0
10
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
1.0 M
10 M
PSSR, POWER SUPPLY REJECTION RATIO (dB)
Figure 28. Common Mode Rejection Ratio
versus Frequency
Figure 29. Power Supply Rejection Ratio
versus Frequency
120
VCC/VEE = ±15 V
∆VS = 3.0 V
VO = 0 V
TA = 25°C
100
80
60
40
+
–
100
90
VCC ± ∆VCC
+
–
80
70
–55
VCC/VEE = ±15 V
∆VS = 3.0 V
VO = 0 V
f ≤ 10 Hz
Positive
Supply
VO
Compensated Units AV = +1.0
Decompensated Units AV = +2.0
VEE ± ∆VEE
–25
0
25
50
75
100
VO
VEE ± ∆VEE
0
0.1
1.0
10
125
1.0 M
10 M
TA = 125°C
1.00
TA = 25°C
Supply Current
Normalized to
VCC/VEE = ±15 V, TA = 25°C
RL = ∞
VO = 0
0.90
0.80
0.70
0
±5.0
±10
TA = –55°C
±20
±25
±15
VS, SUPPLY VOLTAGE (V)
Figure 33. Spectral Noise Density
100
e n , INPUT NOISE VOLTAGE (nV/ √ Hz )
120
CHANNEL SEPERATION (dB)
100 k
1.10
Figure 32. Channel Separation versus Frequency
100
80
60
40
VCC/VEE = ±15 V
TA = 25°C
0
10 k
10
100 1.0 k
10 k
f, FREQUENCY (Hz)
1.20
TA, AMBIENT TEMPERATURE (°C)
20
Negative
Supply
20
Figure 31. Normalized Supply Current
versus Supply Voltage
110
Negative
Supply
Positive
Supply
VCC ± ∆VCC
Figure 30. Power Supply Rejection Ratio
versus Temperature
I CC , SUPPLY CURRENT (NORMALIZED)
PSSR, POWER SUPPLY REJECTION RATION (dB)
CMRR, COMMON MODE REJECTION RATIO (dB)
MC34080 thru MC34085
100 k
1.0 M
f, FREQUENCY (Hz)
10 M
VCC/VEE = ±15 V
VCM = 0
TA = 25°C
80
60
40
20
0
10
100
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
APPLICATIONS INFORMATION
The bandwidth and slew rate of the MC34080 series is
nearly double that of currently available general purpose
JFET op–amps. This improvement in AC performance is due
to the P–channel JFET differential input stage driving a
compensated miller integration amplifier in conjunction with
an all NPN output stage.
The all NPN output stage offers unique advantages over
the more conventional NPN/PNP transistor Class AB output
stage. With a 10 k load resistance, the op amp can typically
swing within 1.0 V of the positive rail (VCC), and within 0.3 V
of the negative rail (VEE), providing a 28.7 p–p swing from
±15 V supplies. This large output swing becomes most
noticeable at lower supply voltages. If the load resistance is
referenced to VCC instead of ground, the maximum possible
output swing can be achieved for a given supply voltage. For
light load currents, the load resistance will pull the output to
VCC during the positive swing and the NPN output transistor
will pull the output very near VEE during the negative swing.
The load resistance value should be much less than that of
the feedback resistance to maximize pull–up capability.
The all NPN transistor output stage is also inherently
fast, contributing to the operation amplifier ’s high
gain–bandwidth product and fast settling time. The
associated high frequency output impedance is 50 Ω (typical)
at 8.0 MHz. This allows driving capacitive loads from 0 pF to
300 pF without oscillations over the military temperature
range, and over the full range of output swing. The 55°C
phase margin and 7.6 dB gain margin as well as the general
gain and phase characteristics are virtually independent of
the sink/source output swing conditions. The high frequency
characteristics of the MC34080 series is especially useful for
active filter applications.
The common mode input range is from 2.0 V below the
positive rail (VCC) to 4.0 V above the negative rail (VEE). The
amplifier remains active if the inputs are biased at the positive
rail. This may be useful for some applications in that single
supply operation is possible with a single negative supply.
However, a degradation of offset voltage and voltage gain
may result.
Phase reversal does not occur if either the inverting or
noninverting input (or both) exceeds the positive common
mode limit. If either input (or both) exceeds the negative
common mode limit, the output will be in the high state. The
MOTOROLA ANALOG IC DEVICE DATA
input stage also allows a differential up to ±44 V, provided the
maximum input voltage range is not exceeded. The supply
voltage operating range is from ±5.0 V to ±22 V.
For optimum frequency performance and stability, careful
component placement and printed circuit board layout should
be exercised. For example, long unshielded input or output
leads may result in unwanted input–output coupling. In order
to reduce the input capacitance, resistors connected to the
input pins should be physically close to these pins. This not
only minimizes the input pole for optimum frequency
response, but also minimizes extraneous “pickup” at
this node.
Supply decoupling with adequate capacitance close to the
supply pin is also important, particularly over temperature,
since many types of decoupling capacitors exhibit large
impedance changes over temperature.
Primarily due to the JFET inputs of the op amp, the input
offset voltage may change due to temperature cycling and
board soldering. After 20 temperature cycles (– 55° to
165°C), the typical standard deviation for input offset voltage
is 559 µV in the plastic packages. With respect to board
soldering (260°C, 10 seconds), the typical standard deviation
for input offset voltage is 525 µV in the plastic package.
Socketed devices should be used over a minimal
temperature range for optimum input offset voltage
performance.
Figure 34. Offset Nulling Circuit
VCC
3 +
2
–
4
7
6
5
1
5.0 k
VEE
11
MC34080 thru MC34085
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
8
5
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–B–
1
4
F
–A–
NOTE 2
DIM
A
B
C
D
F
G
H
J
K
L
M
N
L
C
J
–T–
N
SEATING
PLANE
D
M
K
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
–––
10_
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
–––
10_
0.030
0.040
G
H
0.13 (0.005)
T A
M
B
M
M
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
D
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
C
8
5
0.25
H
E
M
B
M
1
4
h
B
e
X 45 _
q
A
C
SEATING
PLANE
L
0.10
A1
B
0.25
12
M
C B
S
A
S
DIM
A
A1
B
C
D
E
e
H
h
L
q
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.35
0.49
0.18
0.25
4.80
5.00
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
14
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
8
B
1
7
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
L
C
J
N
H
G
D
SEATING
PLANE
K
M
DW SUFFIX
PLASTIC PACKAGE
CASE 751G–02
(SO–16L)
ISSUE A
–A–
16
9
–B–
8X
P
0.010 (0.25)
1
M
B
M
8
16X
0.010 (0.25)
M
T A
S
B
S
F
R X 45 _
C
–T–
14X
G
K
SEATING
PLANE
MOTOROLA ANALOG IC DEVICE DATA
M
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.62 BSC
0_
10_
0.39
1.01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
J
D
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.300 BSC
0_
10_
0.015
0.039
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
10.15
10.45
7.40
7.60
2.35
2.65
0.35
0.49
0.50
0.90
1.27 BSC
0.25
0.32
0.10
0.25
0_
7_
10.05
10.55
0.25
0.75
INCHES
MIN
MAX
0.400
0.411
0.292
0.299
0.093
0.104
0.014
0.019
0.020
0.035
0.050 BSC
0.010
0.012
0.004
0.009
0_
7_
0.395
0.415
0.010
0.029
13
MC34080 thru MC34085
NOTES
14
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
NOTES
MOTOROLA ANALOG IC DEVICE DATA
15
MC34080 thru MC34085
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
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are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
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51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
16
◊
MOTOROLA ANALOG IC DEVICE DATA
*MC34080/D*
MC34080/D