ONSEMI MMBD301LT1

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by MBD301/D
SEMICONDUCTOR TECHNICAL DATA
Schottky Barrier Diodes
Motorola Preferred Devices
These devices are designed primarily for high–efficiency UHF and VHF detector
applications. They are readily adaptable to many other fast switching RF and digital
applications. They are supplied in an inexpensive plastic package for low–cost,
high–volume consumer and industrial/commercial requirements. They are also
available in a Surface Mount package.
30 VOLTS
SILICON HOT–CARRIER
DETECTOR AND SWITCHING
DIODES
• Extremely Low Minority Carrier Lifetime – 15 ps (Typ)
• Very Low Capacitance – 1.5 pF (Max) @ VR = 15 V
• Low Reverse Leakage – IR = 13 nAdc (Typ) MBD301, MMBD301
1
2
CASE 182– 02, STYLE 1
(TO–226AC)
MAXIMUM RATINGS (TJ = 125°C unless otherwise noted)
MBD301
Rating
MMBD301LT1
Symbol
Value
Unit
Reverse Voltage
VR
30
Volts
Forward Power Dissipation
@ TA = 25°C
Derate above 25°C
PF
Operating Junction
Temperature Range
TJ
280
2.8
200
2.0
2
CATHODE
mW
mW/°C
3
°C
– 55 to +125
Storage Temperature Range
Tstg
1
ANODE
1
2
°C
– 55 to +150
CASE 318 – 08, STYLE 8
SOT– 23 (TO – 236AB)
DEVICE MARKING
MMBD301LT1 = 4T
3
CATHODE
1
ANODE
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
V(BR)R
30
—
—
Volts
Total Capacitance (VR = 15 V, f = 1.0 MHz) Figure 1
CT
—
0.9
1.5
pF
Reverse Leakage (VR = 25 V) Figure 3
IR
—
13
200
nAdc
Forward Voltage (IF = 1.0 mAdc) Figure 4
VF
—
0.38
0.45
Vdc
Forward Voltage (IF = 10 mAdc) Figure 4
VF
—
0.52
0.6
Vdc
Characteristic
Reverse Breakdown Voltage (IR = 10 µA)
NOTE: MMBD301LT1 is also available in bulk packaging. Use MMBD301L as the device title to order this device in bulk.
Thermal Clad is a registered trademark of the Berquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
 Motorola, Inc. 1997
1
TYPICAL ELECTRICAL CHARACTERISTICS
500
2.8
t , MINORITY CARRIER LIFETIME (ps)
C T, TOTAL CAPACITANCE (pF)
f = 1.0 MHz
2.4
400
2.0
KRAKAUER METHOD
300
1.6
1.2
200
0.8
100
0.4
0
0
0
3.0
6.0
18
9.0
12
15
21
VR, REVERSE VOLTAGE (VOLTS)
24
27
30
0
Figure 1. Total Capacitance
80
90
100
100
IF, FORWARD CURRENT (mA)
IR, REVERSE LEAKAGE (m A)
30
40
50
60
70
IF, FORWARD CURRENT (mA)
20
Figure 2. Minority Carrier Lifetime
10
TA = 100°C
1.0
75°C
0.1
25°C
0.01
0.001
10
10
TA = – 40°C
TA = 85°C
1.0
TA = 25°C
0.1
0
6.0
12
18
VR, REVERSE VOLTAGE (VOLTS)
24
0.2
30
Figure 3. Reverse Leakage
IF(PEAK)
0.4
0.6
0.8
VF, FORWARD VOLTAGE (VOLTS)
1.0
1.2
Figure 4. Forward Voltage
CAPACITIVE
CONDUCTION
IR(PEAK)
FORWARD
CONDUCTION
SINUSOIDAL
GENERATOR
BALLAST
NETWORK
(PADS)
STORAGE
CONDUCTION
PADS
DUT
SAMPLING
OSCILLOSCOPE
(50 W INPUT)
Figure 5. Krakauer Method of Measuring Lifetime
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
drain pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA . Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD =
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the maximum
temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
PACKAGE DIMENSIONS
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND ZONE R IS
UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN P AND L.
DIMENSIONS D AND J APPLY BETWEEN L AND K
MINIMUM. LEAD DIMENSION IS
UNCONTROLLED IN P AND BEYOND DIM K
MINIMUM.
B
R
SEATING
PLANE
D
P
ÉÉ
L
F
K
J
DIM
A
B
C
D
F
G
H
J
K
L
N
P
R
V
SECTION X–X
X X
D
G
H
V
1
C
N
2
CASE 182–02
(TO–226AC)
ISSUE H
N
A
L
3
STYLE 8:
PIN 1. ANODE
2. NO CONNECTION
3. CATHODE
B S
1
V
2
G
C
H
D
J
K
INCHES
MIN
MAX
0.175
0.205
0.170
0.210
0.125
0.165
0.016
0.022
0.016
0.019
0.050 BSC
0.100 BSC
0.014
0.016
0.500
–––
0.250
–––
0.080
0.105
–––
0.050
0.115
–––
0.135
–––
MILLIMETERS
MIN
MAX
4.45
5.21
4.32
5.33
3.18
4.49
0.41
0.56
0.407
0.482
1.27 BSC
3.54 BSC
0.36
0.41
12.70
–––
6.35
–––
2.03
2.66
–––
1.27
2.93
–––
3.43
–––
STYLE 1:
PIN 1. ANODE
2. CATHODE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIUMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
DIM
A
B
C
D
G
H
J
K
L
S
V
INCHES
MIN
MAX
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
MILLIMETERS
MIN
MAX
2.80
3.04
1.20
1.40
0.89
1.11
0.37
0.50
1.78
2.04
0.013
0.100
0.085
0.177
0.35
0.69
0.89
1.02
2.10
2.64
0.45
0.60
CASE 318–08
ISSUE AF
SOT–23 (TO–236AB)
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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4
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MBD301/D
Motorola Small–Signal Transistors, FETs and Diodes Device
Data