INTERSIL HS-1840RH/883S

HS-1840RH/883S
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Features
• This Circuit is Processed in Accordance to
Mil-Std-883 and is Fully Conformant Under the
Provisions of Paragraph 1.2.1.
Rad-Hard 16 Channel CMOS Analog
with High-Z Analog Input Protection
Pinouts
HS1-1840RH/883S 28 PIN CERAMIC SIDEBRAZE DIP
CASE OUTLINE D-10,COMPLIANT TO MIL-M-38510 PACKAGE
TOP VIEW
• Radiation Environment
- Gamma Rate (γ) 1 x 108 RAD(Si)/s
- Gamma Dose (γ) 2 x 105 RAD(Si)
+VS 1
28 OUT
NC 2
27 -VS
NC 3
26 IN 8
IN 16 4
25 IN 7
• Fast Access Time 1000ns
IN 15 5
24 IN 6
• High Analog Input Impedance 500MΩ
During Power Loss (Open)
IN 14 6
23 IN 5
IN 13 7
22 IN 4
IN 12 8
21 IN 3
IN 11 9
20 IN 2
IN 10 10
19 IN 1
• Low Power Consumption
• Dielectrically Isolated Device Islands
• Excellent In Hi-Rel Redundant Systems
• Break-Before-Make Switching
• No Latch-Up
IN 9 11
18 ENABLE
GND 12
17 ADDR A0
(+5VS) VREF 13
16 ADDR A1
ADDR A3 14
15 ADDR A2
Description
The HS-1840RH/883S is a radiation hardened,
monolithic 16 channel multiplexer constructed with the
Intersil Linear Dielectric Isolation CMOS process. It is
designed to provide a high input impedance to the
analog source if device power fails (open) or the
analog signal voltage inadvertently exceeds the supply
rails during powered operation. Excellent for use in
redundant applications, since the secondary device
can be operated in a standby unpowered mode
affording no additional power drain. More significantly,
a very high impedance exists between the active and
inactive devices preventing any interaction. One of
sixteen channel selection is controlled by a 4-bit binary
address plus an Enable-Inhibit input which conveniently controls the ON/OFF operation of several
multiplexers in a system. All digital inputs have
electrostatic discharge protection.
The HS-1840RH/883S has been specifically designed
to meet exposure to radiation environments. It is
available in a 28 pin Ceramic Sidebraze dual-in-line
package and 28 pin Ceramic Flatpack. It is guaranteed
operational from -55oC to +125oC.
HS9-1840RH/883S 28 PIN CERAMIC SIDEBRAZE FLATPACK
CASE OUTLINE F-11A, COMPLIANT TO MIL-M-38510 PACKAGE
TOP VIEW
+VS
1
28
OUT
NC
2
27
-VS
NC
3
26
IN 8
IN 16
4
25
IN 7
IN 15
5
24
IN 6
IN 14
6
23
IN 5
IN 13
7
22
IN 4
IN 12
8
21
IN 3
IN 11
9
20
IN 2
IN 10
10
19
IN 1
IN 9
11
18
ENABLE
GND
12
17
ADDR A0
(+5VS) VREF
13
16
ADDR A1
ADDR A3
14
15
ADDR A2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
File Number
3022.1
HS-1840RH/883S
Functional Diagram
IN 1
A0
1
P
A1
DIGITAL
ADDRESS
A2
OUT
A3
16
EN
P
IN 16
ADDRESS INPUT
BUFFER AND
LEVEL SHIFTER
DECODERS
MULTIPLEX
SWITCHES
Truth Table
A3
A2
A1
A0
EN
“ON” CHANNEL
X
X
X
X
H
None
L
L
L
L
L
1
L
L
L
H
L
2
L
L
H
L
L
3
L
L
H
H
L
4
L
H
L
L
L
5
L
H
L
H
L
6
L
H
H
L
L
7
L
H
H
H
L
8
H
L
L
L
L
9
H
L
L
H
L
10
H
L
H
L
L
11
H
L
H
H
L
12
H
H
L
L
L
13
H
H
L
H
L
14
H
H
H
L
L
15
H
H
H
H
L
16
2
Specifications HS-1840RH/883S
Absolute Maximum Ratings
Reliability Information
Supply Voltage Between Pins 1 and 27 . . . . . . . . . . . . . . . . . . +40V
+VSUPPLY to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V
-VSUPPLY to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20V
VREF to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V
Analog input Overvoltage:
+VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+25V (Power On/Off)
-VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V (Power On)
Digital Input Overvoltage:
+VEN, +VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VREF +4V
-VEN, -VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -4V
Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . . .+275o
Thermal Resistance . . . . . . . . . . . . . . . . . .
θJA
θJC
Sidebraze Package . . . . . . . . . . . . . . . . . 83.1oC/W 19.1oC/W
Flatpack Package . . . . . . . . . . . . . . . . . . 49.1oC/W 16.5oC/W
Total Power Dissipation*:
Sidebraze DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . 1600mW
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . 1400mW
ESD Classification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
* For DIP Derate 20.4mW/oC above TA = +95oC
For Flatpack Derate 18.5mW/oC above TA = +95oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Supply Voltage (±VSUPPLY) . . . . . . . . . . . . . . . . . . . ±15V
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC
VREF (Pin 13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V
Logic Low Level (VAL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.8V
Logic High Level (VAH). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.0V
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V
PARAMETER
SYMBOL
Analog Signal Range
VS
Input Leakage
Current, Address, or
Enable Pins
IAH
IAL
Leakage Current Into
the Source Terminal of
an “Off” Switch
+IS(OFF)
-IS(OFF)
GROUP A
SUBGROUPS
CONDITIONS
7, 8A, 8B
Measure Inputs Sequentially
Ground All Unused Pins
VAL = 0.8V, VAH = 4.0V
VS = +10V, All Unused Inputs
and Output = -10V, VEN = 4V
VS = -10V, All Unused Inputs,
Output = +10V, VEN = 4V
Leakage Current into
the Source Terminal of
an “Off” Switch With
Power “Off”
+IS(OFF)
Power Off
V+, V-, VREF, A0, A1, A2, A3,A4,
EN = GND, Unused Inputs Tied to
GND, VS = +25V
Leakage Current Into
the Source Terminal of
an “Off” Switch With
Overvoltage Applied
+IS(OFF)
Overvoltage
VS = +25V, VD = 0V, VEN = 4V
All Unused Inputs Tied to GND
-IS(OFF)
Overvoltage
Leakage Current Into
the Drain Terminal of
an “Off” Switch
+ID(OFF)
-ID(OFF)
Leakage Current Into
the Drain Terminal of
an “Off” Switch With
Overvoltage Applied
LIMITS
TEMPERATURE
-55oC,
+25oC,
+125oC
MIN
MAX
UNITS
-5
+15
V
1, 2, 3
-55oC, +25oC,
+125oC
-1000
1000
nA
1
+25oC
-10
10
nA
2, 3
+125oC,-55oC
-100
100
nA
1
+25oC
-10
10
nA
o
o
2, 3
+125 C, -55 C
-100
100
nA
1
+25oC
-50
50
nA
-55oC
-100
100
nA
1, 2, 3
-55oC, +25oC,
+125oC
-1000
1000
nA
VS = -25V, VD = 0V, VEN = 4V All
Unused Inputs Tied to GND
1, 2, 3
-55oC, +25oC,
+125oC
-1000
1000
nA
VD = +10V, VEN = 4V All Unused
Inputs = -10V
1
+25oC
-10
10
nA
-100
100
nA
-10
10
nA
+125 C, -55 C
-100
100
nA
VD = -10V, VEN = 4V All Unused
Inputs = +10V
2, 3
2, 3
1
2, 3
+125oC,
+125o
C, -55 C
+25o
o
o
C
o
+ID(OFF)
Overvoltage
VS = +25V, Measure VD,
VEN = 4V, All Unused Inputs to
GND
1, 2, 3
-55o
C, +25 C,
+125oC
-1000
1000
nA
-ID(OFF)
Overvoltage
VS = -25V, Measure VD,
All Unused Inputs to GND
1, 2, 3
-55oC, +25oC,
+125oC
-1000
1000
nA
3
o
Specifications HS-1840RH/883S
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V
PARAMETER
Leakage Current from
an “On” Driver into the
Switch (Drain & Source)
SYMBOL
+ID(ON)
-ID(ON)
Switch On Resistance
+15V R(ON)
GROUP A
SUBGROUPS
CONDITIONS
VS = +10V, VD = +10V, VEN =
0.8V All unused inputs = -10V
VS = -10V, VD = -10V, VEN =
0.8V, All Unused Inputs = +10V
LIMITS
TEMPERATURE
o
1
2, 3
+25 C
+125
-55oC
+25oC
1
2, 3
oC,
o
o
+125 C, -55 C
oC,
MIN
MAX
UNITS
-10
10
nA
-100
100
nA
-10
10
nA
-100
100
nA
+25oC,
50
1000
Ω
VS = +15V, ID = -1mA,
VEN = 0.8V
1, 2, 3
-55
-5V R(ON)
VS = -5V, ID = +1mA, VEN = 0.8V
1, 2, 3
-55oC, +25oC,
+125oC
50
4000
Ω
+5V R(ON)
VS = +5V, ID = -1mA, VEN = 0.8V
1, 2, 3
-55oC, +25oC,
+125oC
50
2500
Ω
+125oC
Positive Supply
Current
I(+)
VEN = 0.8V
1, 2, 3
-55oC, +25oC,
+125oC
-
0.5
mA
Negative Supply
Current
I(-)
VEN = 0.8V
1, 2, 3
-55oC, +25oC,
+125oC
-0.5
-
mA
Positive Standby
Supply Current
+ISBY
VEN = 4.0V
1, 2, 3
-55oC, +25oC,
+125oC
-
0.5
mA
Negative Standby
Supply Current
-ISBY
VEN = 4.0V
1, 2, 3
-55oC, +25oC,
+125oC
-0.5
-
mA
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V
PARAMETER
Break-Before-Make
Time Delay
Propagation Delay
Times: Address Inputs
to I/O Channels
Enable to I/O
SYMBOL
TD
CONDITIONS
RL = 1000Ω, CL = 50pF
TEMPERATURE
MIN
MAX
UNITS
9
+25oC
25
-
ns
5
-
ns
-
600
ns
-
1000
ns
-
600
ns
-
1000
ns
10, 11
TON(A),
TOFF(A)
TON(EN),
TOFF(EN)
RL = 10KΩ,CL = 50pF
9
10, 11
RL = 1000Ω, CL = 50pF
LIMITS
GROUP A
SUBGROUPS
9
10, 11
+125oC,
-55oC
o
+25 C
+125oC,
-55oC
+25oC
o
o
+125 C, -55 C
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Characterized At: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V, Unless Otherwise Specified
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTE
TEMPERATURE
o
MIN
MAX
UNITS
Capacitance Address
Input
CA
+VS = -VS = 0V, f = 1MHz
1
+25 C
-
7
pF
Capacitance Channel
Input
CS(OFF)
+VS = -VS = 0V, f = 1MHz
1
+25oC
-
5
pF
Capacitance Channel
Output
CD(OFF)
TOFF(EN)
+VS = -VS = 0V, f = 1MHz
1
+25oC
-
50
pF
VEN = 4.0V, f = 200kHz, CL = 7pF,
RL = 1kΩ, VS = 3.0VRMS
1
+25oC
45
-
dB
Off Isolation
VISO
NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters and not directly tested. These parameters are
characterized upon initial design and after major process and/or design changes.
4
Specifications HS-1840RH/883S
TABLE 4. POST 200K RAD(Si) ELECTRICAL CHARACTERISTICS
Tested, per Mil-Std-883. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.5V, VAL = 0.5V
PARAMETER
SYMBOL
GROUP A
SUBGROUPS
CONDITIONS
LIMITS
TEMPERATURE
o
MIN
MAX
UNITS
Measure Inputs Sequentially,
Ground All Unused Pins
1
+25 C
-1000
1000
nA
+IS(OFF)
VS = +10V, All Unused Inputs &
Output = -10V, VEN = 4.5V
1
+25oC
-100
100
nA
-IS(OFF)
VS = -10V, All Unused Inputs &
Output = +10V, VEN = 4.5V
1
+25oC
-100
100
nA
Leakage Current into
the Source Terminal of
an “Off” Switch With
Power “Off”
+IS(OFF)
Power Off
V+, V-, VREF, A0, A1, A2, A3, A4,
EN = GND, Unused Inputs Tied to
GND, VS = +25V
1
+25oC
-100
100
nA
Leakage Current Into
the Source Terminal of
an “Off” Switch With
Overvoltage Applied
+IS(OFF)
Overvoltage
VS = +25V, VD=0V, VEN=4.5V
All Unused Inputs Tied to GND
1
+25oC
-1500
1500
nA
-IS(OFF)
Overvoltage
VS = -25V, VD=0V, VEN=4.5V
All Unused Inputs Tied to GND
1
+25oC
-1500
1500
nA
Input Leakage Current,
Address, or Enable Pins
IAH
IAL
Leakage Current Into
the Source Terminal of
an “Off” Switch
Leakage Current Into
the Drain Terminal of
an “Off” Switch
+ID(OFF)
VD = +10V, VEN = 4.5V
All Unused Inputs = -10V
1
+25oC
-100
100
nA
-ID(OFF)
VD = -10V, VEN = 4.5V
All Unused Inputs = +10V
1
+25oC
-100
100
nA
Leakage Current Into
the Drain Terminal of
an “Off” Switch With
Overvoltage Applied
+ID(OFF)
Overvoltage
VS = +25V, Measure VD,
VEN = 4.5V
All Unused Inputs to GND
1
+25oC
-1000
1000
nA
-ID(OFF)
Overvoltage
VS = -25V, Measure VD,
VEN = 4.5V
All Unused Inputs to GND
1
+25oC
-1000
1000
nA
+ID(ON)
VS = +10V, VD = +10V,
VEN = 0.5V
All Unused Inputs = -10V
1
+25oC
-100
100
nA
-ID(ON)
VS = -10V, VD = -10V,
VEN = 0.5V
All Unused Inputs = +10V
1
+25oC
-100
100
nA
VS = +15V, ID = -1mA, VEN = 0.5V
1
+25oC
50
1000
Ω
Leakage Current from
an “On” Driver into the
Switch (Drain & Source)
Switch On Resistance
+15V R(ON)
-5V R(ON)
+5V R(ON)
VS = -5V, ID = +1mA, VEN = 0.5V
VS = +5V, ID = -1mA, VEN = 0.5V
o
1
+25 C
50
4000
Ω
1
+25oC
50
2500
Ω
-
0.50
mA
Positive Supply
Current
I(+)
VEN = 0.5V
1
+25o
Negative Supply
Current
I(-)
VEN = 0.5V
1
+25oC
-0.50
-
mA
Positive Standby
Supply Current
+I(SBY)
VEN = 4.5V
1
+25oC
-
0.50
mA
Negative Standby
Supply Current
-I(SBY)
VEN = 4.5V
1
+25oC
-0.50
-
mA
TD
RL = 1000Ω, CL = 50pf
9
+25oC
5
-
ns
TON (A)
TOFF (A)
RL = 10KΩ, CL = 50pf
9
+25oC
-
3000
ns
TON (EN)
TOFF (EN)
RL = 1000Ω, CL = 50pf
9
+25oC
-
3000
ns
Make-Before-Break
Time Delay
Propagation Delay
Times: Adress Inputs
to I/O Channels
Enable to I/O
5
C
Specifications HS-1840RH/883S
TABLE 5. DC POST BURN-IN DELTA ELECTRICAL CHARACTERISTICS
Guaranteed, per Mil-Std-883, Method 1019. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V
PARAMETER
SYMBOL
Input Leakage Current,
Address, or Enable
Pins
IAH
IAL
Leakage Current Into
the Source Terminal of
an “Off” Switch
GROUP A
SUBGROUPS
CONDITIONS
LIMITS
TEMPERATURE
o
MIN
MAX
UNITS
Measure Inputs Sequentially,
Ground All Unused Pins
1
+25 C
-100
100
nA
+IS(OFF)
VS = +10V, All Unused Inputs &
Output = -10V, VEN = 4.0V
1
+25oC
-20
20
nA
-IS(OFF)
VS = -10V, All Unused Inputs &
Output = +10V, VEN = 4.0V
1
+25oC
-20
20
nA
Leakage Current Into
the Drain Terminal of
an “Off” Switch
+ID(OFF)
VD = +10V, VEN = 4.0V
All Unused Inputs = -10V
1
+25oC
-20
20
nA
-ID(OFF)
VD = -10V, VEN = 4.0V
All Unused Inputs = +10V
1
+25oC
-20
20
nA
Leakage Current from
an “On” Driver into the
Switch (Drain & Source)
+ ID(ON)
VS = +10V, VD = +10V,
VEN = 0.8V
All Unused Inputs = -10V
1
+25oC
-20
20
nA
-ID(ON)
VS = -10V, VD = -10V,
VEN = 0.8V
All Unused Inputs = +10V
1
+25oC
-20
20
nA
+15V R(ON)
VS = +15V, ID = -1mA,
VEN = 0.8V
1
+25oC
-150
150
Ω
-5V R(ON)
VS = -5V, ID = +1mA,
VEN = 0.8V
1
+25oC
-250
250
Ω
Switch On Resistance
Positive Supply
Current
I(+)
VEN = 0.8V
1
+25oC
-50
50
µA
Negative Supply
Current
I(-)
VEN = 0.8V
1
+25oC
-50
50
µA
Positive Standby
Supply Current
+ISBY
VEN = 4.0V
1
+25oC
-50
50
µA
Negative Standby
Supply Current
-ISBY
VEN = 4.0V
1
+25oC
-50
50
µA
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
Q SUBGROUPS
Initial Test
100%/5004
1
Interim Test
100%/5004
1
PDA
100%/5004
1
Final Test
100%/5004
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Samples/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
B5
Samples/5005
1, 2, 3
Others
Samples/5005
1, 7
Group D
Samples/5005
1, 7
Group E, Subgroup 2
Samples/5005
1, 7
Group A
Group B
6
HS-1840RH/883S
Performance Characteristics and Test Circuits
ACCESS TIME vs. LOGIC LEVEL (HIGH)
4.0V
50%
VA
0.8V
VA
50Ω
A3
IN 1
A2
IN 2 IN 15
A1
A0
EN
0.8V
VOUT
15V, 0V
0V, 15V
IN 16
VOUT
GND
50pF
10K
50%
0V
ta
BREAK-BEFORE-MAKE DELAY (tOPEN)
4.0V
VA
0.8V
VA
50Ω
A3
IN 1
A2
IN 2 IN 15
A1
A0
VOUT
50%
0.8V
50%
EN
+5V
IN 16
GND
OUT
VOUT
1K
50pF
tOPEN
ENABLE DELAY (tON(EN), tOFF(EN))
4.0V
VA
A3
A2
0.8V
A1
A0
90%
OUTPUT
IN 2 IN 16
VOUT
EN
VA
10%
VOUT
+10V
IN 1
tON(EN)
tOFF(EN)
7
50Ω
1K
50pF
HS-1840RH/883S
Burn-In/Life Test Circuits
+VS
R
1
28
2
27
3
26
25
4
5
GND
F4
R
+VS
-VS
R
R
24
6
23
7
8
22
21
9
20
10
19
18
11
12
F5
13
16
14
15
GND
F1
17
F2
VR
F3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
R
-VS
R
R
STATIC BURN-IN TEST CIRCUIT
DYNAMIC BURN-IN AND LIFE TEST CIRCUIT
NOTES:
NOTES:
VS+ = +15.5V ± 0.5V, VS- = -15.5V ± 0.5V
R = 1kΩ ± 5%
C1 = C2 = 0.01µF ± 10%, 1 each per socket, minimum
D1 = D2 = 1N4002, 1 each per board, minimum
Input Signals: square wave, 50% duty cycle, 0V to 15V peak ± 10%
F1 = 100kHz; F2 = F1/2; F3 = F1/4; F4 = F1/8; F5 = F1/16
R = 1kΩ ± 5%, 1/4W
C1 = C2 = 0.01µF minimum, 1 each per socket, minimum
VS+ = 15.5V ± 0.5V, VS- = -15.5V ± 0.5V, VR = 15.5 ± 0.5V
NOTES:
1. The Above Test Circuits are Utilized for All Package Types
2. The Dynamic Test Circuit is Utilized for All Life Testing
Irradiation Circuit
28 PIN DIP
+15V
1
28
NC
2
27
NC
3
26
+1V
4
25
5
24
6
23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
+5V
NOTE: All irradiation testing is performed in the 28 pin DIP package
8
-15V
1KΩ
HS-1840RH/883S
Schematic Diagrams
ADDRESS INPUT BUFFER AND LEVEL SHIFTER
V
REF
LEVEL SHIFTER
V+
P
OVERVOLTAGE
PROTECTION
P
R3
D2
R1
P
P
R5
V
REF
ADD
IN.
P
N
P
P
LEVEL
SHIFTED
ADDRESS
TO
DECODE
R2
N
P
P
P
R7
N
N
N
N
R6
R8
N
N
N
N
200Ω
D1
V-
ADDRESS DECODER
MULTIPLEX SWITCH
+V
P
LEVEL
SHIFTED
ADDRESS
TO
DECODE
R4
P
P
P
P
N
A0 OR A0
A1 OR A1
A2 OR A2
A3 OR A3
V+
TO
SWITCH
P
P
IN
N
P
FROM
DECODE
N
S
D
N
N
N
N
ENABLE
VV-
9
OUT
HS-1840RH/883S
Intersil - Space Level Product Flow
SEM - Traceable to Diffusion Method 2018
PDA Calculation 3% Functional
5% Subgroups 1, 7, ∆
Wafer Lot Acceptance Method 5007
Dynamic Burn-In 240 Hours, +125oC Method 1015
Condition D
Internal Visual Inspection (Note 1)
Gamma Radiation Assurance Tests Method 1019
Electrical Tests Subgroups 1, 7, 9 (T2)
100% Nondestructive Bond Pull Method 2023
Burn-In Delta Calculation (T0 - T2)
Customer Pre-Cap Visual Inspection (Notes 1, 2)
Temperature Cycling Method 1010 Condition C
PDA Calculation 3% Functional
5% Subgroups 1, 7, ∆
Constant Acceleration method 2001 Y1 30KG
Electrical Test +125oC, -55oC
Particle Impact Noise Detection method 2020,
Condition A 20G
Alternate Group A Inspection Method 5005
Fine and Gross Leak Tests Method 1014
Marking and Serialization
Customer Source Inspection (Note 2)
X-Ray Inspection Method 2012
Group B Inspection (Notes 2, 4) Method 5005
Initial Electrical Tests (T0)
Group D Inspection (Notes 2, 4) Method 5005
Static Burn-In 72 Hour, +125oC method 1015 Condition A
External Visual Inspection Method 2009
Room Temperature Electrical Tests (T1)
Data Package Generation (Note 3)
Burn-In Delta Calculation (T0-T1)
NOTES:
1. Visual Inspection is performed to MIL-STD-883 Method 2010, Condition A.
2. These steps are optional, and should be listed on the purchase order if required.
3. Data package contains: Assembly Attributes (post seal)
Test Attributes (includes Group A) -55oC, +25oC, +125oC
Shippable Serial Number List
Radiation Testing Certificate of Conformance
Wafer Lot Acceptance Report (includes SEM report)
X-Ray Report and Film
Test Variables Data, DC Test and TELQV
+25oC Initial Test
+25oC Interim Test 1
+25oC Interim Test 2
+25oC Delta Over Burn-In
4. Group B data package contains Attributes Data pulse Variables Data, DC Test and TE2HQV. Group D data package contains Attributes only.
10
HS-1840RH/883S
Metallization Topology
DIE DIMENSIONS:
110 x 159 x 11mils
METALLIZATION:
Type: Al
Thickness: 12.5kÅ ± 2kÅ
GLASSIVATION:
Type: SiO2
Thickness: 8kÅ ± 1kÅ
DIE ATTACH:
Material: Gold Eutectic
Temperature: Sidebrazed Ceramic DIP - 460oC (Max)
Flatpack - 460oC (Max)
WORST CASE CURRENT DENSITY: 1.90e04A/cm2
LEAD TEMPERATURE (10 Seconds Soldering): <275oC
PROCESS: CMOS-DI
Metallization Mask Layout
IN1
IN2
IN3
IN4
IN5
IN6
IN7
HS-1840RH/883S
ENABLE
IN8
-V
A0
A1
OUT
A2
A3
VREF
+V
IN16
11
IN9
IN10
IN11
IN12
IN13
IN14
IN15
GND