NTP4302, NTB4302 Power MOSFET 74 Amps, 30 Volts N−Channel TO−220 and D2PAK Features • • • • • Low RDS(on) Higher Efficiency Extending Battery Life Diode Exhibits High Speed, Soft Recovery Avalanche Energy Specified IDSS Specified at Elevated Temperature http://onsemi.com 74 AMPERES 30 VOLTS RDS(on) = 9.3 mΩ Max Typical Applications • DC−DC Converters • Low Voltage Motor Control • Power Management in Portable and Battery Powered Products: Ie: N−Channel D Computers, Printers, Cellular and Cordless Telephones, and PCMCIA Cards G MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating 4 Symbol Value Unit Drain−to−Source Voltage VDSS 30 Vdc Drain−to−Gate Voltage (RGS = 10 MΩ) VDGR 30 Vdc Gate−to−Source Voltage − Continuous 20 ID ID 74 47 175 Adc PD 80 0.66 W W/°C Operating and Storage Temperature Range TJ, Tstg −55 to +150 °C Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 30 Vdc, VGS = 10 Vdc, L = 5.0 mH IL(pk) = 17 A, VDS = 30 Vdc, RG = 25 Ω) EAS 722 mJ Total Power Dissipation @ TC = 25°C Derate above 25°C Thermal Resistance − Junction−to−Case − Junction−to−Ambient (Note 1) Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds 4 1 IDM Apk 1 D2PAK CASE 418AA STYLE 2 TO−220AB CASE 221A STYLE 5 2 3 MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain 4 Drain NTx4302 LLYWW NTx4302 LLYWW °C/W RθJC RθJA 1.55 70 TL 260 °C 2 3 Vdc VGS Drain Current − Continuous @ TC = 25°C − Continuous @ TC = 100°C − Single Pulse (tp10 µs) S 1 Gate 3 Source 2 Drain 1. When surface mounted to an FR4 Board using minimum recommended Pad Size, (Cu Area 0.412 in2). 2. Current limited by internal lead wires. 1 Gate x NTx4302 LL Y WW 2 Drain 3 Source = P or B = Device Code = Location Code = Year = Work Week ORDERING INFORMATION Device Semiconductor Components Industries, LLC, 2003 October, 2003 − Rev. 1 1 Package Shipping NTP4302 TO−220AB 50 Units/Rail NTB4302 D2PAK 50 Units/Rail NTB4302T4 D2PAK 800/Tape & Reel Publication Order Number: NTP4302/D NTP4302, NTB4302 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit 30 − − 25 − − − − − − 1.0 10 − − ±100 1.0 − 1.9 −3.8 3.0 − − 6.8 6.8 9.5 9.3 9.3 12.5 gFS − 40 − mhos pF OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (Note 3) (VGS = 0 Vdc, ID = 250 µAdc) Temperature Coefficient (Positive) V(BR)DSS Zero Gate Voltage Drain Current (VDS = 30 Vdc, VGS = 0 Vdc) (VDS = 30 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS Gate−Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc) IGSS Vdc mV/°C µAdc nAdc ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (Note 3) (VDS = VGS, ID = 250 µAdc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain−to−Source On−Resistance (Note 3) (VGS = 10 Vdc, ID = 37 Adc) (VGS = 10 Vdc, ID = 20 Adc) (VGS = 4.5 Vdc, ID = 10 Adc) RDS(on) Forward Transconductance (Note 3) (VDS = 10 Vdc, ID = 20 Adc) Vdc mV/°C mΩ DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VDS = 24 Vdc, Vd VGS = 0 Vdc, Vd f = 1.0 MHz) Transfer Capacitance Ciss − 2050 2400 Coss − 640 800 Crss − 225 310 td(on) − 10 18 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time (VDD = 24 Vdc, ID = 20 Adc, VGS = 10 Vdc, RG = 2.5 Ω) (Note 3) Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time (VDD = 24 Vdc, ID = 10 Adc, VGS = 4.5 Vdc, RG = 2.5 Ω) (Note 3) Fall Time Gate Charge (VDS = 24 Vdc, Vd ID = 37 Adc, Ad VGS = 4.5 Vdc) (Note 3) tr − 22 35 td(off) − 45 75 tf − 35 70 td(on) − 18 − tr − 70 − td(off) − 32 − ns ns tf − 30 − QT − 28 − Qgs − 7.5 − Qgd − 19 − VSD − − 0.90 0.75 1.3 − Vdc trr − 37 − ns ta − 21 − tb − 16 − QRR − 0.035 − nC SOURCE−DRAIN DIODE CHARACTERISTICS Forward On−Voltage (IS = 20 Adc, VGS = 0 Vdc) (Note 3) (IS = 20 Adc, VGS = 0 Vdc, TJ = 125°C) Reverse Recovery Time (IS = 20 Adc, Ad VGS = 0 Vdc, Vd dIS/dt = 100 A/µs) (Note 3) Reverse Recovery Stored Charge 3. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 µC NTP4302, NTB4302 60 60 VGS = 10 V 7V 5V VDS ≥ 10 V 4.4 V TJ = 25C 4.6 V ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) 70 4V 50 40 3.8 V 30 3V 2.8 V 3.4 V 20 3.2 V 10 50 40 30 TJ = 25°C 20 TJ = 100°C 10 TJ = −55°C 0 0 1 0.5 2 1.5 2.5 3 3 2 4 5 6 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 0.08 ID = 20 A TJ = 25°C 0.06 0.04 0.015 TJ = 25°C VGS = 4.5 V 0.01 VGS = 10 V 0.005 0.02 0 0 2 4 6 8 10 0 0 10 20 30 40 50 60 70 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance versus Gate−to−Source Voltage Figure 4. On−Resistance versus Drain Current and Gate Voltage 10000 1.6 ID = 20 A VGS = 10 V VGS = 0 V TJ = 150°C 1.4 1000 IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω) 0 1.2 1 0.8 0.6 −50 100 TJ = 100°C 10 1 −25 0 25 50 75 100 125 0 150 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 30 VDS = 0 V VGS = 0 V TJ = 25°C C, CAPACITANCE (pF) 5000 Ciss 4000 3000 Crss Ciss 2000 Coss 1000 Crss 0 10 VGS 0 VDS 20 10 30 30 5 VDS 4 18 2 12 1 0 6 ID = 37 A TJ = 25°C 0 10 30 20 Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge 25 td(off) IS, SOURCE CURRENT (AMPS) t, TIME (ns) Q2 Q1 GATE−TO−SOURCE OR DRAIN−TO−SOURCE (VOLTS) VDD = 24 V ID = 20 A VGS = 10 V tf 100 tr 10 td(on) 1 1 10 VGS = 0 V TJ = 25°C 20 15 10 5 0 0.5 100 RG, GATE RESISTANCE (Ω) Mounted on 2″ sq. FR4 board (1″ sq. 2 oz. Cu 0.06″ thick single sided) with one die operating, 10 s max. VGS = 20 V SINGLE PULSE TC = 25°C 10 10 µs 100 µs 1 ms 10 ms RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 0.1 1 0.7 0.8 1 0.9 dc 10 100 Figure 10. Diode Forward Voltage versus Current EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ) 1000 0.6 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variations versus Gate Resistance ID, DRAIN CURRENT (AMPS) 24 VGS 3 1000 100 QT VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 6000 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) NTP4302, NTB4302 800 ID = 17 A 700 600 500 400 300 200 100 0 25 50 75 100 125 150 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature http://onsemi.com 4 NTP4302, NTB4302 SAFE OPERATING AREA r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1.00 D = 0.5 0.2 0.1 P(pk) 0.05 0.10 0.02 0.01 SINGLE PULSE t1 t2 DUTY CYCLE, D = t1/t2 0.01 1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 t, TIME (s) Figure 13. Thermal Response di/dt IS trr ta tb TIME 0.25 IS tp IS Figure 14. Diode Reverse Recovery Waveform http://onsemi.com 5 RθJC(t) = r(t) RθJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) − TC = P(pk) RθJC(t) 1.0E+00 1.0E+01 NTP4302, NTB4302 PACKAGE DIMENSIONS TO−220 THREE−LEAD TO−220AB CASE 221A−09 ISSUE AA SEATING PLANE −T− B C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 −−− −−− 0.080 STYLE 5: PIN 1. 2. 3. 4. http://onsemi.com 6 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 −−− −−− 2.04 NTP4302, NTB4302 PACKAGE DIMENSIONS D2PAK CASE 418AA−01 ISSUE O C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E V W −B− 4 DIM A B C D E F G J K M S V A 1 2 S 3 −T− SEATING PLANE K W J G D 3 PL 0.13 (0.005) T B M STYLE 2: PIN 1. 2. 3. 4. M VARIABLE CONFIGURATION ZONE U M INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.036 0.045 0.055 0.310 −−− 0.100 BSC 0.018 0.025 0.090 0.110 0.280 −−− 0.575 0.625 0.045 0.055 M M F F F VIEW W−W 1 VIEW W−W 2 VIEW W−W 3 http://onsemi.com 7 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.92 1.14 1.40 7.87 −−− 2.54 BSC 0.46 0.64 2.29 2.79 7.11 −−− 14.60 15.88 1.14 1.40 NTP4302, NTB4302 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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