NTMS4404N Power MOSFET 30 V, 12 A, Single N−Channel, SO−8 Features • High Density Power MOSFET with Ultra Low RDS(on) for Higher • • • Efficiency Miniature SO−8 Surface Mount Package Saving Board Space IDSS Specified at Elevated Temperature Diode Exhibits High Speed, Soft Recovery http://onsemi.com V(BR)DSS ID MAX 9.7 m @ 10 V 30 V Applications • • • • RDS(on) TYP 12 A 15.5 m @ 4.5 V Power Management for Battery Power Products Portable Products Computers, Printers, PCMCIA Cards Cell Phones, Cordless Telephones N−Channel D MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current (Note 1) Symbol Value Unit VDSS 30 V VGS 20 V ID 9.6 A Steady State TA = 25°C TA = 70°C 7.6 tp 10 s TA = 25°C 12 Steady State PD tp 10 s Continuous Drain Current (Note 2) Steady State Power Dissipation (Note 2) Pulsed Drain Current TA = 25°C MARKING DIAGRAM/ PIN ASSIGNMENT W 1.56 ID A 7.0 5.6 TA = 25°C PD 0.83 W tp = 10 s, DC = 2 % IDM 50 A TJ, TSTG −55 to 150 °C IS 6.0 A EAS 500 mJ Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (VDD = 20 V, VGS = 5 V, IPK = 7.25 A, L = 19 mH, RG = 25 ) 260 °C Symbol Max Unit Junction−to−Ambient – Steady State (Note 1) RJA 80 °C/W Junction−to−Ambient – t = 1 0 s (Note 1) RJA 50 Junction−to−Ambient – Steady State (Note 2) RJA 150 THERMAL RESISTANCE RATINGS Parameter 1 SO−8 CASE 751 STYLE 12 Source Source Source Gate 8 Drain Drain Drain Drain Top View E4404N = Device Code L = Assembly Location Y = Year WW = Work Week ORDERING INFORMATION Device TL Lead Temperature for Soldering Purposes (1/8” from case for 10 s) 1 2.5 TA = 70°C Operating Junction and Storage Temperature S E4404N LYWW Power Dissipation (Note 1) G NTMS4404NR2 Package Shipping† SO−8 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 1. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq. [1 oz] including traces) 2. Surface−mounted on FR4 board using the minimum recommended pad size (Cu area = 0.412 in sq.) Semiconductor Components Industries, LLC, 2003 November, 2003 − Rev. 1 1 Publication Order Number: NTMS4404N/D NTMS4404N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 A 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Units OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS V 25 VGS = 0 V V, VDS = 30 V mV/°C TJ = 25°C 1.0 TJ = 100°C 5.0 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 250 A 100 A nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Gate Threshold Temperature Coefficient Drain−to−Source On Resistance Forward Transconductance VGS(TH)/TJ RDS(on) ( ) 1.0 2.2 3.0 −5.0 VGS = 10 V, ID = 12 A 9.7 11.5 VGS = 4.5 V, ID = 6.0 A 15.5 17.5 VDS = 15 V, ID = 12 A 17.5 gFS V mV/°C m S CHARGES AND CAPACITANCES pF Input Capacitance CISS 1975 2500 Output Capacitance COSS 575 750 Reverse Transfer Capacitance CRSS 180 300 Total Gate Charge QG(TOT) 50 70 nC Threshold Gate Charge QG(TH) 15 25 ns 25 50 35 55 15 30 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD VGS = 0 V,, f = 1 MHz,, VDS = 24 V 2.4 VGS = 10 V V, VDS = 24 V V, ID = 12 A 7.5 16 SWITCHING CHARACTERISTICS, VGS = 10 V (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr td(OFF) VGS = 10 V, VDS = 24 V, ID = 12 A, RG = 2.5 tf SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) 20 tr 80 td(OFF) VGS = 4.5 V, VDS = 24 V, ID = 6.0 A, RG = 2.5 tf ns 25 15 DRAIN−SOURCE DIODE CHARACTERISTICS (Note 4) Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.80 TJ = 125°C 0.65 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V V, IS = 6 6.0 0A 40 VGS = 0 V, dISD/dt = 100 A/s, IS = 6.0 A QRR http://onsemi.com 2 V 55 ns 23 17 0.05 NOTES: 3. Pulse Test: pulse width 300 s, duty cycle 2%. 4. Switching characteristics are independent of operating junction temperatures. 1.1 C NTMS4404N TYPICAL PERFORMANCE CURVES 24 VGS = 10 V to 4.2 V VDS ≥ 10 V 4V ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) 24 20 TJ = 25°C 16 3.8 V 12 3.6 V 8 3.4 V 4 16 12 TJ = 25°C 8 0 TJ = −55°C 0 0 2 6 4 10 8 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 4 3 5 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE () 2 0.05 ID = 12 A TJ = 25°C 0.04 0.03 0.02 0.01 0 2 4 6 5 7 8 9 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 3 10 6 0.025 TJ = 25°C 0.02 VGS = 4.5 V 0.015 VGS = 10 V 0.01 0.005 0 6 8 10 12 14 16 18 20 22 24 ID, DRAIN CURRENT (AMPS) Figure 4. On−Resistance vs. Drain Current and Gate Voltage Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.6 10000 VGS = 0 V ID = 12 A VGS = 10 V 1.4 IDSS, LEAKAGE (A) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = 100°C 4 3.0 V 3.2 V RDS(on), DRAIN−TO−SOURCE RESISTANCE () 20 TJ = 150°C 1000 1.2 1 100 TJ = 100°C 0.8 0.6 −50 10 −25 0 25 50 75 100 125 150 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 30 NTMS4404N TYPICAL PERFORMANCE CURVES C, CAPACITANCE (pF) TJ = 25°C 4000 Ciss 30 QT VDS 10 3000 C rss Ciss 2000 1000 Coss Crss 0 10 5 0 VGS 5 10 15 20 20 VGS 5 QGS 0 0 30 10 20 40 QG, TOTAL GATE CHARGE (nC) VDS Figure 7. Capacitance Variation 12 VDD = 24 V ID = 12 A VGS = 10 V IS, SOURCE CURRENT (AMPS) 1000 td(off) tf tr 100 td(on) 10 1 10 RG, GATE RESISTANCE (OHMS) VGS = 0 V TJ = 25°C 10 8 6 4 2 0 0.5 100 Figure 9. Resistive Switching Time Variation vs. Gate Resistance 0.7 0.6 0.8 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 10. Diode Forward Voltage vs. Current 100 ID, DRAIN CURRENT (AMPS) t, TIME (ns) 0 50 Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1 10 QGD ID = 12 A TJ = 25°C 30 25 VDS , DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS = 0 V VDS = 0 V VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 15 5000 10 ms 100 s 1 ms 10 dc 1 VGS = 10 V SINGLE PULSE TC = 25°C 0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.01 0.1 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 100 0.9 NTMS4404N Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE 1000 DUTY CYCLE 100 MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT D = 0.5 0.2 0.1 0.05 10 0.02 0.01 P(pk) 1 t1 t2 DUTY CYCLE, D = t1/t2 SINGLE PULSE 0.1 1E−05 1E−04 1E−03 1E−02 1E−01 t, TIME (seconds) 1E+00 Figure 12. Thermal Response − Various Duty Cycles http://onsemi.com 5 RθJA(t) = r(t) RθJA D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) − TA = P(pk) RθJA(t) 1E+01 1E+02 1E+03 NTMS4404N PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AA NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. −X− A 8 5 S B 1 0.25 (0.010) M Y M 4 K −Y− G C N X 45 SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J S DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 STYLE 12: PIN 1. 2. 3. 4. 5. 6. 7. 8. INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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