ONSEMI NTLJD3115PTAG

NTLJD3115P
Power MOSFET
−20 V, −4.1 A, mCoolt Dual P−Channel,
2x2 mm WDFN Package
Features
• WDFN Package Provides Exposed Drain Pad for Excellent Thermal
•
•
•
•
•
•
Conduction
2x2 mm Footprint Same as SC−88
Lowest RDS(on) Solution in 2x2 mm Package
1.8 V RDS(on) Rating for Operation at Low Voltage Gate Drive Logic
Level
Low Profile (< 0.8 mm) for Easy Fit in Thin Environments
Bidirectional Current Flow with Common Source Configuration
This is a Pb−Free Device
Applications
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V(BR)DSS
RDS(on) MAX
ID MAX (Note 1)
100 mW @ −4.5 V
−20 V
−4.1 A
135 mW @ −2.5 V
200 mW @ −1.8 V
S1
S2
G1
G2
D1
P−CHANNEL MOSFET
D2
P−CHANNEL MOSFET
• Optimized for Battery and Load Management Applications in
Portable Equipment
• Li−Ion Battery Charging and Protection Circuits
• High Side Load Switch
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Parameter
D2
Value
Unit
Drain−to−Source Voltage
VDSS
−20
V
Gate−to−Source Voltage
VGS
±8.0
V
ID
−3.3
A
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
TA = 85°C
−2.4
t≤5s
TA = 25°C
−4.1
Steady
State
PD
Power Dissipation
(Note 2)
Pulsed Drain Current
JD = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
ID
TA = 85°C
TA = 25°C
tp = 10 ms
A
−2.3
−1.6
PD
0.71
W
IDM
−20
A
TJ, TSTG
−55 to
150
°C
Source Current (Body Diode) (Note 2)
IS
−1.9
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Operating Junction and Storage Temperature
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size
of 30 mm2, 2 oz Cu.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 4
1
6
2 JDMG 5
G
3
4
2.3
TA = 25°C
Steady
State
Pin 1
TA = 25°C
t≤5s
Continuous Drain
Current (Note 2)
WDFN6
CASE 506AN
W
1.5
MARKING
DIAGRAM
D1
1
D1
S1
1
6
D1
G1
2
5
G2
D2
3
4
S2
D2
(Top View)
ORDERING INFORMATION
Device
Package
Shipping†
NTLJD3115PT1G
WDFN6
(Pb−Free)
3000/Tape & Reel
NTLJD3115PTAG
WDFN6
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTLJD3115P/D
NTLJD3115P
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Junction−to−Ambient – Steady State (Note 3)
RqJA
83
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
177
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
54
Unit
SINGLE OPERATION (SELF−HEATED)
°C/W
DUAL OPERATION (EQUALLY HEATED)
Junction−to−Ambient – Steady State (Note 3)
RqJA
58
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
133
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
40
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu).
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2
°C/W
NTLJD3115P
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Test Conditions
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = −250 mA
−20
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
ID = −250 mA, Ref to 25°C
Parameter
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
VDS = −16 V, VGS = 0 V
9.95
mV/°C
TJ = 25°C
−1.0
TJ = 85°C
−10
IGSS
VDS = 0 V, VGS = ±8.0 V
VGS(TH)
VGS = VDS, ID = −250 mA
Gate−to−Source Leakage Current
V
mA
±100
nA
−1.0
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Gate Threshold
Temperature Coefficient
Drain−to−Source On−Resistance
VGS(TH)/TJ
−0.7
2.44
RDS(on)
Forward Transconductance
−0.4
gFS
mV/°C
VGS = −4.5, ID = −2.0 A
75
100
mW
VGS = −2.5, ID = −2.0 A
101
135
VGS = −1.8, ID = −1.6 A
150
200
VDS = −5.0 V, ID = −2.0 A
3.1
S
531
pF
CHARGES, CAPACITANCES AND GATE RESISTANCE
CISS
Input Capacitance
VGS = 0 V, f = 1.0 MHz,
VDS = −10 V
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
56
Total Gate Charge
QG(TOT)
5.5
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
1.4
RG
8.8
W
td(ON)
5.2
ns
Gate Resistance
VGS = −4.5 V, VDS = −10 V,
ID = −2.0 A
91
6.2
nC
0.7
1.0
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = −4.5 V, VDD = −5.0 V,
ID = −1.0 A, RG = 6.0 W
13.2
13.7
tf
19.1
td(ON)
5.5
tr
td(OFF)
VGS = −4.5 V, VDD = −10 V,
ID = −2.0 A, RG = 2.0 W
tf
ns
15
19.8
21.6
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Recovery Voltage
Reverse Recovery Time
VSD
TJ = 25°C
−0.75
TJ = 125°C
−0.64
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Time
VGS = 0 V, IS = −1.0 A
−1.0
V
16.2
VGS = 0 V, dISD/dt = 100 A/ms,
IS = −1.0 A
QRR
10.6
5.6
5.7
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
ns
nC
NTLJD3115P
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
VGS = −1.9 V to −6 V
−1.8 V
4
3.5
−1.7 V
3
2.5
−1.6 V
2
−1.5 V
1.5
1
−1.4 V
0.5
−1.3 V
−1.2 V
0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VDS ≥ 10 V
−ID, DRAIN CURRENT (AMPS)
4.5
5
TJ = 25°C
0.5
1
2
1.5
3
2.5
3.5
4
4
3
2
TJ = 25°C
1
TJ = 125°C
0
4.5
0
2
1.5
2.5
3
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.1
VGS = −4.5 V
0.09
TJ = 100°C
0.08
TJ = 25°C
0.07
0.06
TJ = −55°C
0.05
0.04
1.0
1.5
2.5
2.0
0.15
TJ = 25°C
VGS = −2.5 V
0.1
VGS = −4.5 V
0.05
0
1
3
2
−ID, DRAIN CURRENT (AMPS)
4
5
−ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus Drain Current
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1.6
10000
ID = −2.2 A
VGS = −4.5 V
VGS = 0 V
1.4
−IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
TJ = −55°C
1
0.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (AMPS)
5
1.2
1.0
0.8
0.6
−50
−25
0
25
50
75
100
125
150
TJ = 150°C
1000
TJ = 100°C
100
10
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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4
20
NTLJD3115P
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
C, CAPACITANCE (pF)
1000
−V GS, GATE−TO−SOURCE VOLTAGE (VOLTS)
VDS = 0 V VGS = 0 V
TJ = 25°C
Ciss
800
600
400
Crss
Coss
200
0
0
5
VGS
10
5
15
QT
4
16
3
VDS
12
VGS
QGS
2
QGD
8
4
1
ID = −2.2 A
TJ = 25°C
0
0
20
0
1
VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
5
2
3
4
QG, TOTAL GATE CHARGE (nC)
6
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
3
−Is, SOURCE CURRENT (AMPS)
VDD = −15 V
ID = −2.2 A
VGS = −4.5 V
100
tf
tr
td(off)
10
td(on)
1
10
RG, GATE RESISTANCE (OHMS)
VGS = 0 V
2.5
2
1.5
1
0.5
TJ = 150°C
0
0
1
100
0.1
0.2
0.3
0.4
TC = 25°C
TJ = 150°C
SINGLE PULSE
10 ms
100 ms
1 ms
1
0.1
0.01
10 ms
*See Note 2 on Page 1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.5
0.6
0.7
0.8
0.9 1.0
Figure 10. Diode Forward Voltage versus Current
100
10
TJ = 25°C
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
−ID, DRAIN CURRENT (AMPS)
t, TIME (ns)
20
5
−V DS , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1200
dc
10
1
100
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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5
NTLJD3115P
EFFECTIVE TRANSIENT THERMAL RESISTANCE
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
1000
100
D = 0.5
0.2
0.1
*See Note 2 on Page 1
10
P(pk)
0.05
0.02
1 0.01
t1
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
0.1
0.000001
0.00001
0.0001
0.001
0.01
t, TIME (s)
0.1
Figure 12. Thermal Response
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6
1
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TA = P(pk) RqJA(t)
10
100
1000
NTLJD3115P
PACKAGE DIMENSIONS
WDFN6, 2x2
CASE 506AN−01
ISSUE B
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
PIN ONE
REFERENCE
0.10 C
2X
ÍÍÍ
ÍÍÍ
ÍÍÍ
E
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
J
0.10 C
2X
A3
0.10 C
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
2.00 BSC
0.57
0.77
2.00 BSC
0.90
1.10
0.65 BSC
0.25 REF
0.20
0.30
0.15 REF
A
6X
0.08 C
C
SEATING
PLANE
D2
D2
6X
SOLDERMASK DEFINED
MOUNTING FOOTPRINT*
A1
e
L
1
2.30
6X
6X
0.35
0.43
4X
3
1
0.65
PITCH
2X E2
6X
K
6
6X
4
b
J
BOTTOM VIEW
0.25
6X
0.10 C A
0.05 C
B
2X
NOTE 3
0.72
1.05
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your local
Sales Representative
NTLJD3115P/D