BUB323Z NPN Silicon Power Darlington High Voltage Autoprotected D2PAK for Surface Mount The BUB323Z is a planar, monolithic, high–voltage power Darlington with a built–in active zener clamping circuit. This device is specifically designed for unclamped, inductive applications such as Electronic Ignition, Switching Regulators and Motor Control, and exhibit the following main features: • Integrated High–Voltage Active Clamp • Tight Clamping Voltage Window (350 V to 450 V) Guaranteed Over the –40°C to +125°C Temperature Range http://onsemi.com AUTOPROTECTED DARLINGTON 10 AMPERES 360–450 VOLTS CLAMP 150 WATTS • Clamping Energy Capability 100% Tested in a Live • • Ignition Circuit High DC Current Gain/Low Saturation Voltages Specified Over Full Temperature Range Design Guarantees Operation in SOA at All Times 360 V CLAMP MAXIMUM RATINGS ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ Rating Symbol Value Unit Collector–Emitter Sustaining Voltage VCEO 350 Vdc Collector–Emitter Voltage VEBO 6.0 Vdc Collector Current – Continuous – Peak IC ICM 10 20 Adc Base Current IB IBM 3.0 6.0 Adc – Continuous – Peak Total Power Dissipation @ TC = 25C Derate above 25C BUB323Z YWW PD 150 1.0 Watts W/C TJ, Tstg –65 to +175 C Symbol Max Unit Thermal Resistance, Junction to Case RθJC 1.0 C/W Thermal Resistance, Junction to Ambient RθJA 62.5 C/W TL 260 C Operating and Storage Junction Temperature Range MARKING DIAGRAM D2PAK CASE 418B STYLE 1 THERMAL CHARACTERISTICS Characteristic Maximum Lead Temperature for Soldering Purposes, 1/8″ from Case for 5 Seconds Semiconductor Components Industries, LLC, 2001 September, 2001 – Rev. 0 1 BUB323Z = Specific Device Code Y = Year WW = Work Week ORDERING INFORMATION Device Package Shipping BUB323Z D2PAK 50 Units/Rail BUB323ZT4 D2PAK 800/Tape & Reel Publication Order Number: BUB323Z/D BUB323Z ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted) Characteristic Symbol Min Typ Max Unit VCLAMP 350 – 450 Vdc Collector–Emitter Cutoff Current (VCE = 200 V, IB = 0) ICEO – – 100 µAdc Emitter–Base Leakage Current (VEB = 6.0 Vdc, IC = 0) IEBO – – 50 mAdc – – – – 2.2 2.5 – – – – – – – – – – 1.6 1.8 1.8 2.1 1.7 1.1 1.3 – – 2.1 2.3 – – 2.5 150 500 – – – 3400 fT – – 2.0 MHz Output Capacitance (VCB = 10 Vdc, IE = 0, f = 1.0 MHz) Cob – – 200 pF Input Capacitance (VEB = 6.0 V) Cib – – 550 pF WCLAMP 200 – – mJ tfi – 625 – ns tsi – 10 30 µs tc – 1.7 – µs OFF CHARACTERISTICS (Note 1.) Collector–Emitter Clamping Voltage (IC = 7.0 A) (TC = –40°C to +125°C) ON CHARACTERISTICS (Note 1.) Base–Emitter Saturation Voltage (IC = 8.0 Adc, IB = 100 mAdc) (IC = 10 Adc, IB = 0.25 Adc) VBE(sat) Collector–Emitter Saturation Voltage (IC = 7.0 Adc, IB = 70 mAdc) VCE(sat) (TC = 125°C) (IC = 8.0 Adc, IB = 0.1 Adc) (TC = 125°C) (IC = 10 Adc, IB = 0.25 Adc) Base–Emitter On Voltage (IC = 5.0 Adc, VCE = 2.0 Vdc) (IC = 8.0 Adc, VCE = 2.0 Vdc) Vdc Vdc VBE(on) (TC = –40°C to +125°C) Diode Forward Voltage Drop (IF = 10 Adc) VF DC Current Gain (IC = 6.5 Adc, VCE = 1.5 Vdc) (IC = 5.0 Adc, VCE = 4.6 Vdc) Vdc hFE (TC = –40°C to +125°C) Vdc – DYNAMIC CHARACTERISTICS Current Gain Bandwidth (IC = 0.2 Adc, VCE = 10 Vdc, f = 1.0 MHz) CLAMPING ENERGY (see notes) Repetitive Non–Destructive Energy Dissipated at turn–off: (IC = 7.0 A, L = 8.0 mH, RBE = 100 Ω) (see Figures 2 and 4) SWITCHING CHARACTERISTICS: Inductive Load (L = 10 mH) Fall Time Storage Time Cross–over Time (IC = 6.5 A, IB1 = 45 mA, VBE(off) = 0, RBE(off) = 0, VCC = 14 V V, VZ = 300 V) 1. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle = 2.0%. http://onsemi.com 2 BUB323Z IC MERCURY CONTACTS WETTED RELAY INOM = 6.5 A Output transistor turns on: IC = 40 mA VCE MONITOR (VGATE) High Voltage Circuit turns on: IC = 20 mA RBE = 100 Ω Avalanche diode turns on: IC = 100 µA 250 V 300 V 340 V Icer Leakage Current L INDUCTANCE (8 mH) IB CURRENT SOURCE VCE VCLAMP NOMINAL = 400 V VBEoff IB2 SOURCE IC MONITOR IC CURRENT SOURCE 0.1 Ω NON INDUCTIVE Figure 1. IC = f(VCE) Curve Shape Figure 2. Basic Energy Test Circuit By design, the BU323Z has a built–in avalanche diode and a special high voltage driving circuit. During an auto–protect cycle, the transistor is turned on again as soon as a voltage, determined by the zener threshold and the network, is reached. This prevents the transistor from going into a Reverse Bias Operating limit condition. Therefore, the device will have an extended safe operating area and will always appear to be in “FBSOA.” Because of the built–in zener and associated network, the IC = f(VCE) curve exhibits an unfamiliar shape compared to standard products as shown in Figure 1. . The bias parameters, VCLAMP, IB1, VBE(off), IB2, IC, and the inductance, are applied according to the Device Under Test (DUT) specifications. VCE and IC are monitored by the test system while making sure the load line remains within the limits as described in Figure 4. . Note: All BU323Z ignition devices are 100% energy tested, per the test circuit and criteria described in Figures 2. and 4. , to the minimum guaranteed repetitive energy, as specified in the device parameter section. The device can sustain this energy on a repetitive basis without degrading any of the specified electrical characteristics of the devices. The units under test are kept functional during the complete test sequence for the test conditions described: IC(peak) = 7.0 A, ICH = 5.0 A, ICL = 100 mA, IB = 100 mA, RBE = 100 Ω, Vgate = 280 V, L = 8.0 mH IC, COLLECTOR CURRENT (AMPS) 10 1 300µs 1ms TC = 25°C 10ms 250ms 0.1 0.01 0.001 10 THERMAL LIMIT SECOND BREAKDOWN LIMIT CURVES APPLY BELOW RATED VCEO 100 340V VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 3. Forward Bias Safe Operating Area http://onsemi.com 3 1000 BUB323Z IC The shaded area represents the amount of energy the device can sustain, under given DC biases (IC/IB/VBE(off)/ RBE), without an external clamp; see the test schematic diagram, Figure 2. . The transistor PASSES the Energy test if, for the inductive load and ICPEAK/IB/VBE(off) biases, the VCE remains outside the shaded area and greater than the VGATE minimum limit, Figure 4. a. ICPEAK IC HIGH IC LOW VCE (a) VGATE MIN IC ICPEAK IC HIGH IC LOW VCE (b) VGATE MIN IC ICPEAK IC HIGH The transistor FAILS if the VCE is less than the VGATE (minimum limit) at any point along the VCE/IC curve as shown on Figures 4. b, and 4. c. This assures that hot spots and uncontrolled avalanche are not being generated in the die, and the transistor is not damaged, thus enabling the sustained energy level required. IC LOW VCE (c) VGATE MIN IC ICPEAK IC HIGH The transistor FAILS if its Collector/Emitter breakdown voltage is less than the VGATE value, Figure 4. d. IC LOW VCE (d) VGATE MIN Figure 4. Energy Test Criteria for BU323Z http://onsemi.com 4 BUB323Z 10000 10000 TJ = 125°C hFE, DC CURRENT GAIN hFE, DC CURRENT GAIN TYPICAL 1000 -40°C 25°C 100 TYP - 6Σ TYP + 6Σ 100 VCE = 5 V, TJ = 25°C VCE = 1.5 V 10 100 1000 1000 IC, COLLECTOR CURRENT (MILLIAMPS) 10 100 10000 5.0 4.5 TJ = 25°C IC = 3 A 4.0 3.5 5A 3.0 8A 10 A 2.5 2.0 7A 1.5 1.0 0.5 0 1 10 IB, BASE CURRENT (MILLIAMPS) 100 2.4 VBE(on) , BASE-EMITTER VOLTAGE (VOLTS) VBE, BASE-EMITTER VOLTAGE (VOLTS) IC/IB = 150 TJ = 25°C 1.4 1.2 125°C 1.0 0.8 0.1 1 IC, COLLECTOR CURRENT (AMPS) TJ = 125°C 2.0 1.8 1.6 1.4 1.2 1.0 25°C 0.8 0.6 0.4 0.1 1 IC, COLLECTOR CURRENT (AMPS) 10 Figure 8. Collector–Emitter Saturation Voltage 2.0 1.6 IC/IB = 150 2.2 Figure 7. Collector Saturation Region 1.8 100000 Figure 6. DC Current Gain VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS) VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 5. DC Current Gain 10000 1000 IC, COLLECTOR CURRENT (MILLIAMPS) 10 2.0 1.8 VCE = 2 VOLTS 1.6 1.4 TJ = 25°C 1.2 1.0 125°C 0.8 0.6 0.1 Figure 9. Base–Emitter Saturation Voltage 1 IC, COLLECTOR CURRENT (AMPS) Figure 10. Base–Emitter “ON” Voltages http://onsemi.com 5 10 BUB323Z INFORMATION FOR USING THE D2PAK SURFACE MOUNT PACKAGE RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.33 8.38 0.08 2.032 0.42 10.66 0.24 6.096 0.04 1.016 0.12 3.05 0.63 17.02 inches mm POWER DISSIPATION FOR A SURFACE MOUNT DEVICE Although one can almost double the power dissipation with this method, one will be giving up area on the printed circuit board which can defeat the purpose of using surface mount technology. For example, a graph of RθJA versus Collector pad area is shown in Figure 11. PD = R JA , Thermal Resistance, Junctionto Ambient (C/W) The power dissipation for a surface mount device is a function of the Collector pad size. These can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet, PD can be calculated as follows: ° TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device. For a D2PAK device, PD is calculated as follows. Board Material = 0.0625″ G-10/FR-4, 2 oz Copper 60 TA = 25°C 2.5 Watts 50 3.5 Watts 40 5 Watts 30 20 0 θ PD = 150°C – 25°C = 2.5 Watts 50°C/W 70 2 4 6 8 10 A, Area (square inches) 12 14 16 Figure 11. Thermal Resistance versus Collector Pad Area for the D2PAK Package (Typical) The 50°C/W for the D2PAK package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 2.5 Watts. There are other alternatives to achieving higher power dissipation from the surface mount packages. One is to increase the area of the Collector pad. By increasing the area of the collection pad, the power dissipation can be increased. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. http://onsemi.com 6 BUB323Z SOLDER STENCIL GUIDELINES typical stencil for the DPAK and D2PAK packages. The pattern of the opening in the stencil for the Collector pad is not critical as long as it allows approximately 50% of the pad to be covered with paste. Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. Solder stencils are used to screen the optimum amount. These stencils are typically 0.008 inches thick and may be made of brass or stainless steel. For packages such as the SC–59, SC–70/SOT–323, SOD–123, SOT–23, SOT–143, SOT–223, SO–8, SO–14, SO–16, and SMB/SMC diode packages, the stencil opening should be the same as the pad size or a 1:1 registration. This is not the case with the DPAK and D2PAK packages. If one uses a 1:1 opening to screen solder onto the Collector pad, misalignment and/or “tombstoning” may occur due to an excess of solder. For these two packages, the opening in the stencil for the paste should be approximately 50% of the tab area. The opening for the leads is still a 1:1 registration. Figure 12. shows a ÇÇ ÇÇ ÇÇ ÇÇ ÇÇ ÇÇÇ ÇÇÇ ÇÇ ÇÇÇ ÇÇÇ ÇÇ ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ SOLDER PASTE OPENINGS STENCIL Figure 12. Typical Stencil for DPAK and D2PAK Packages SOLDERING PRECAUTIONS • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. * Due to shadowing and the inability to set the wave height to incorporate other surface mount components, the D2PAK is not recommended for wave soldering. http://onsemi.com 7 BUB323Z TYPICAL SOLDER HEATING PROFILE The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177–189°C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating “profile” for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 13. shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. STEP 1 PREHEAT ZONE 1 RAMP" 200°C 150°C STEP 2 STEP 3 VENT HEATING SOAK" ZONES 2 & 5 RAMP" DESIRED CURVE FOR HIGH MASS ASSEMBLIES STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 SPIKE" SOAK" 170°C 160°C 140°C 100°C SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY) DESIRED CURVE FOR LOW MASS ASSEMBLIES TIME (3 TO 7 MINUTES TOTAL) TMAX Figure 13. Typical Solder Heating Profile http://onsemi.com 8 STEP 7 COOLING 205° TO 219°C PEAK AT SOLDER JOINT 150°C 100°C 50°C STEP 6 VENT BUB323Z PACKAGE DIMENSIONS D2PAK CASE 418B–03 ISSUE D C E V –B– 4 A 1 2 S 3 –T– SEATING PLANE K J G D M T B DIM A B C D E G H J K S V INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.035 0.045 0.055 0.100 BSC 0.080 0.110 0.018 0.025 0.090 0.110 0.575 0.625 0.045 0.055 STYLE 1: PIN 1. 2. 3. 4. H 3 PL 0.13 (0.005) NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. M http://onsemi.com 9 BASE COLLECTOR EMITTER COLLECTOR MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.89 1.14 1.40 2.54 BSC 2.03 2.79 0.46 0.64 2.29 2.79 14.60 15.88 1.14 1.40 BUB323Z Notes http://onsemi.com 10 BUB323Z Notes http://onsemi.com 11 BUB323Z Thermal Clad is a registered trademark of the Bergquist Company ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: [email protected] ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800–282–9855 Toll Free USA/Canada http://onsemi.com 12 BUB323Z/D