MC3479 Stepper Motor Driver The MC3479 is designed to drive a two−phase stepper motor in the bipolar mode. The circuit consists of four input sections, a logic decoding/sequencing section, two driver−stages for the motor coils, and an output to indicate the Phase A drive state. http://onsemi.com Features • • • • • • • • • • Single Supply Operation: 7.2 to 16.5 V 350 mA/Coil Drive Capability Clamp Diodes Provided for Back−EMF Suppression Selectable CW/CCW and Full/Half Step Operation Selectable High/Low Output Impedance (Half Step Mode) TTL/CMOS Compatible Inputs Input Hysteresis: 400 mV Minimum Phase Logic Can Be Initialized to Phase A Phase A Output Drive State Indication (Open−Collector) Pb−Free Package is Available* PDIP−16 P SUFFIX CASE 648C MARKING DIAGRAM 16 VM MC3479P AWLYYWWG Clk 1 L1 Clock Driver A WL YY WW G L2 CW/CCW CW/CCW Logic VD L3 Full/Half Step F/H Step Driver L4 OIC PIN CONNECTIONS OIC Phase A Bias/Set VD 1 16 VM L2 2 15 L3 L1 3 14 L4 4 13 5 12 GND GND Figure 1. Representative Block Diagram Operating Temperature Range MC3479P MC3479PG 6 11 Phase A Clk 7 10 CW/CCW OIC 8 9 Full/Half Step (Top View) Package INPUT TRUTH TABLE Shipping Input Low PDIP−16 TA = 0° to +70°C GND Bias/Set ORDERING INFORMATION Device = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package PDIP−16 (Pb−Free) 25 Units / Rail CW/CCW Full/Half Step OIC Clk Input High CW CCW Full Step Half Step Hi Z Low Z Positive Edge Triggered *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 7 1 Publication Order Number: MC3479/D MC3479 MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage VM + 18 Vdc Clamp Diode Cathode Voltage (Pin 1) VD VM + 5.0 Vdc Driver Output Voltage VOD VM + 6.0 Vdc Drive Output Current/Coil IOD ± 500 mA Input Voltage (Logic Controls) Vin − 0.5 to + 7.0 Vdc Bias/Set Current IBS − 10 mA Phase A Output Voltage VOA + 18 Vdc Phase A Sink Current IOA 20 mA Junction Temperature TJ + 150 °C Storage Temperature Range Tstg − 65 to + 150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Characteristic Symbol Min Max Unit Supply Voltage VM + 7.2 + 16.5 Vdc Clamp Diode Cathode Voltage VD VM VM + 4.5 Vdc Driver Output Current (Per Coil) (Note 1) IOD − 350 mA Input Voltage (Logic Controls) Vin 0 + 5.5 Vdc Bias/Set Current (Outputs Active) IBS −300 − 75 mA Phase A Output Voltage VOA − VM Vdc Phase A Sink Current IOA 0 8.0 mA Operating Ambient Temperature TA 0 + 70 °C 1. See section on Power Dissipation in Application Information. DC ELECTRICAL CHARACTERISTICS (Specifications apply over the recommended supply voltage and temperature range, (Notes 2, 3) unless otherwise noted.) Characteristic Pins Symbol Min Typ Max Unit 7, 8, 9, 10 VTLH − − 2.0 Vdc INPUT LOGIC LEVELS Threshold Voltage (Low−to−High) Threshold Voltage (High−to−Low) Hysteresis Current: (VI = 0.4 V) (VI = 5.5 V) (VI = 2.7 V) VTHL 0.8 − − Vdc VHYS 0.4 − − Vdc IIL −100 − − − − − − + 100 + 20 mA VOHD VM −2.0 VM −1.2 − − − − Vdc VOLD − − 0.8 Vdc DRIVER OUTPUT LEVELS Output High Voltage (IBS = − 300 mA) IOD = − 350 mA IOD = − 0.1 mA 2, 3, 14, 15 Output Low Voltage (IBS = − 300 mA, IOD = 350 mA) Differential Mode Output Voltage Difference (Note 4) (IBS = − 300 mA, IOD = 350 mA) 14, 15 DVOD CVOD − − − − 0.15 0.15 Vdc Output Leakage, Hi Z State (0 v VOD v VM, IBS = − 5.0 mA) (0 v VOD v VM, IBS = − 300 mA, F/H = 2.0 V, OIC = 0.8 V) 14, 15 IOZ1 IOZ2 −100 −100 − − +100 +100 mA 1, 2, 3, 14, 15 VDF − 2.5 3.0 Vdc IDR − − 100 mA CLAMP DIODES Forward Voltage Leakage Current (Per Diode) (ID = 350 mA) (Pin 1 = 21 V; Outputs = 0 V; IBS = 0 mA) http://onsemi.com 2 MC3479 DC ELECTRICAL CHARACTERISTICS (Specifications apply over the recommended supply voltage and temperature range, (Notes 2, 3) unless otherwise noted.) Characteristic Pins Symbol Min Typ Max Unit 11 VOLA − IOHA − − 0.4 Vdc − 100 mA PHASE A OUTPUT (IOA = 8.0 mA) Output Low Voltage Off State Leakage Current (VOHA = 16.5 V) POWER SUPPLY Power Supply Current 16 (IOD = 0 mA, IBS = − 300 mA) (L1 = VOHD, L2 = VOLD, L3 = VOHD, L4 = VOLD) (L1 = VOHD, L2 = VOLD, L3 = Hi Z, L4 = Hi Z) (L1 = VOHD, L2 = VOLD, L3 = VOHD, L4 = VOHD) mA IMW IMZ IMN − − − − − − 70 40 75 IBS − 5.0 − − BIAS/SET CURRENT 6 To Set Phase A mA 2. Algebraic convention rather than absolute values is used to designate limit values. 3. Current into a pin is designated as positive. Current out of a pin is designated as negative. 4. DVOD = ⎥VOD1,2 − VOD3,4⎥ where:VOD1,2 = (VOHD1 − VOLD2) or (VOHD2 − VOLD1), and VOD3,4 = (VOHD3 − VOLD4) or (VOHD4 − VOLD3). PACKAGE THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction−to−Ambient (No Heatsink) Symbol Min Typ Max Unit RqJA − 45 − °C/W AC SWITCHING CHARACTERISTICS (TA = + 25°C, VM = 12 V) (See Figures 2, 3, 4) (Notes 5, 6) Characteristic Pins Symbol Min Typ Max Unit Clock Frequency 7 fCK 0 − 50 kHz Clock Pulse Width (High) 7 PWCKH 10 − − ms Clock Pulse Width (Low) 7 PWCKL 10 − − ms Bias/Set Pulse Width 6 PWBS 10 − − ms Setup Time (CW/CCW and F/HS) 10−7 9−7 tsu 5.0 − − ms Hold Time (CW/CCW and F/HS) 10−7 9−7 th 10 − − ms tPCD − 8.0 − ms Propagation Delay (Clk−to−Driver Output) tPBSD − 1.0 − ms Propagation Delay (Clk−to−Phase A Low) 7−11 tPHLA − 12 − ms Propagation Delay (Clk−to−Phase A High) 7−11 tPLHA − 5.0 − ms Propagation Delay (Bias/Set−to−Driver Output) 5. Algebraic convention rather than absolute values is used to designate limit values. 6. Current into a pin is designated as positive. Current out of a pin is designated as negative. http://onsemi.com 3 MC3479 + 12 V 0.1 mF VM 16 1.0 k L2 2 1.0 k 56 k Bias/Set 6 3 MC3479P Clk 7 OIC 8 F / HS 9 CW / CCW PWBS L1 1.0 k 1.0 k L4 VM Bias/Set Input VM − 1.0 VM − 1.0 0 14 tPBSD 1.0 k L3 15 11 10 4 5 12 13 L1 − L4 Outputs 1.0 k tPBSD (High Impedance) + 12 V 4.0 k Phase A Note: tr, tf (10% to 90%) for input signals are p 25 ns. Figure 2. AC Test Circuit Figure 3. Bias/Set Timing (Refer to Figure 2) PIN FUNCTION DESCRIPTION Pin # Function Symbol Description 16 Power Supply VM 4, 5, 12, 13 Ground GND 1 Clamp Diode Voltage VD 2, 3, 14, 15 Driver Outputs L1, L2 L3, L4 High current outputs for the motor coils. L1 and L2 are connected to one coil, and L3 and L4 to the other coil. 6 Bias/Set B/S This pin is typically 0.7 volts below VM. The current out of this pin (through a resistor to ground) determines the maximum output sink current. If the pin is opened (IBS < 5.0 mA) the outputs assume a high impedance condition, while the internal logic presets to a Phase A condition. 7 Clock Clk The positive edge of the clock input switches the outputs to the next position. This input has no effect if Pin 6 is open. 9 Full/Half Step F/HS When low (Logic “0”), each clock input pulse will cause the motor to rotate one full step. When high, each clock pulse will cause the motor to rotate one−half step. See Figure 7 for sequence. 10 Clockwise/ Counterclockwise CW/CCW 8 Output Impedance Control OIC This input is relevant only in the half step mode (Pin 9 > 2.0 V). When low (Logic “0”), the two driver outputs of the non−energized coil will be in a high impedance condition. When high the same driver outputs will be at a low impedance referenced to VM. See Figure 7. 11 Phase A Ph A This open−collector output indicates (when low) that the driver outputs are in the Phase A condition (L1 = L3 = VOHD, L2 = L4 = VOLD). Power supply pin for both the logic circuit and the motor coil current. Voltage range is + 7.2 to + 16.5 V. Ground pins for the logic circuit and the motor coil current. The physical configuration of the pins aids in dissipating heat from within the IC package. This pin is used to protect the outputs where large voltage spikes may occur as the motor coils are switched. Typically a diode is connected between this pin and Pin 16. See Figure 12. This input allows reversing the rotation of the motor. See Figure 7 for sequence. http://onsemi.com 4 MC3479 APPLICATION INFORMATION General Outputs The MC3479 integrated circuit is designed to drive a stepper positioning motor in applications such as disk drives and robotics. The outputs can provide up to 350 mA to each of two coils of a two−phase motor. The outputs change state with each low−to−high transition of the clock input, with the new output state depending on the previous state, as well as the input conditions at the logic controls. The outputs (L1−L4) are high current outputs (see Figure 5), which when connected to a two−phase motor, provide two full−bridge configurations (L3 and L4 are not shown in Figure 5). The polarities applied to the motor coils depend on which transistor (QH or QL) of each output is on, which in turn depends on the inputs and the decoding circuitry. PWCLKH 3.0 V PWCLKL 1.5 V Clk 0 tPCD L1 − L4 Outputs 6.0 V tsu 3.0 V F/HS, CW/CCW Inputs 0 Note: tr, tf (10% to 90%) for input signals are p 10 ns. th 1.5 V tPHLA Phase A Output tPLHA 1.5 V Figure 4. Clock Timing (Refer to Figure 2) VD VM QH QH Motor Coil I′BS L1 B/S RB L2 QL IBS Current Drivers and Logic QL Parasitic Diodes Logic Decoding Circuit To L3, L4 Transistors CW / CCW OIC F/HS Clk Inputs Figure 5. Output Stages The maximum sink current available at the outputs is a function of the resistor connected between Pin 6 and ground (see section on Bias/Set operation). Whenever the outputs are to be in a high impedance state, both transistors (QH and QL of Figure 5) of each output are off. http://onsemi.com 5 MC3479 VD When taken to a Logic “1” (>2.0 V), the outputs change a half step with each clock cycle, with the sequence direction depending on the CW/CCW input. Eight steps (Phase A to H) result for each complete cycle of the sequencing logic. Phase A, C, E and G correspond (in polarity) to Phase A, B, C, and D, respectively, of the full step sequence. Phase B, D, F and H provide current to one motor coil, while de−energizing the other coil. The condition of the outputs of the de−energized coil depends on the OIC input, see Figure 7 timing diagram. This pin allows for provision of a current path for the motor coil current during switching, in order to suppress back−EMF voltage spikes. VD is normally connected to VM (Pin 16) through a diode (zener or regular), a resistor, or directly. The peaks instantaneous voltage at the outputs must not exceed VM by more than 6.0 V. The voltage drop across the internal clamping diodes must be included in this portion of the design (see Figure 6). Note the parasitic diodes (Figure 5) across each QL of each output provide for a complete circuit path for the switched current. OIC The output impedance control input determines the output impedance to the de−energized coil when operating in the half−step mode. When the outputs are in Phase B, D, F or H (Figure 7) and this input is at a Logic “0” (<0.8 V), the two outputs to the de−energized coil are in a high impedance condition − QL and QH of both outputs (Figure 5) are off. When this input is at a Logic “1” (>2.0 V), a low impedance output is provided to the de−energized coil as both outputs have QH on (QL off). To complete the low impedance path requires connecting VD to VM as described elsewhere in this data sheet. VF (V) 3.0 2.0 1.0 0 0 100 200 ID (mA) Bias/Set 300 This pin can be used for three functions: a) determining the maximum output sink current; b) setting the internal logic to a known state; and c) reducing power consumption. a) The maximum output sink current is determined by the base drive current supplied to the lower transistors (QLs of Figure 5) of each output, which in turn, is a function of IBS. The appropriate value of IBS can be approximated using Figure 11. Figure 6. Clamp Diode Characteristics Full/Half Step When this input is at a Logic “0” (< 0.8 V), the outputs change a full step with each clock cycle, with the sequence direction depending on the CW/CCW input. There are four steps (Phase A, B, C, D) for each complete cycle of the sequencing logic. Current flows through both motor coils during each step, as shown in Figure 7. http://onsemi.com 6 MC3479 Clk Bias/Set CW/CCW Phase A B C D A B C B D A C B L1 L2 L3 L4 Phase A Output (a) Full Step Mode A B C D E = High Impedance = Logic 0" = Don′t Care F/HS OIC F G H A B C D L1 L2 L3 L4 (b) Half Step Mode A B C D E = High Impedance = Logic 0" = Logic 1", OIC = Logic 0" CW/CCW F/HS F G H A B C D L1 L2 L3 L4 Phase A Output CW/CCW = Logic 0" = Logic 1" F/HS = Logic 1" OIC (c) Half Step Mode Figure 7. Output Sequence Power Dissipation The value of RB (between this pin and ground) is then determined by: The power dissipated by the MC3479 must be such that the junction temperature (TJ) does not exceed 150°C. The power dissipated can be expressed as: P = (VM IM) + (2 IOD) [(VM − VOHD) + VOLD] where VM = Supply voltage; IM = Supply current other than IOD; IOD = Output current to each motor coil; VOHD = Driver output high voltage; VOLD = Driver output low voltage. The power supply current (IM) is obtained from Figure 8. After the power dissipation is calculated, the junction temperature can be calculated using: TJ = (P RqJA) + TA V * 0.7 V R + M B I BS b) When this pin is opened (raised to VM) such that IBS is < 5.0 mA, the internal logic is set to the Phase A condition, and the four driver outputs are put into a high impedance state. The Phase A output (Pin 11) goes active (low), and input signals at the controls are ignored during this time. Upon re−establishing IBS, the driver outputs become active, and will be in the Phase A position (L1 = L3 = VOHD, L2 = L4 = VOLD). The circuit will then respond to the inputs at the controls. The Set function (opening this pin) can be used as a powerup reset while supply voltages are settling. A CMOS logic gate (powered by VM) can be used to control this pin as shown in Figure 12. c) Whenever the motor is not being stepped, power dissipation in the IC and in the motor may be lowered by reducing IBS, so as to reduce the output (motor) current. Setting IBS to 75 mA will reduce the motor current, but will not reset the internal logic as described above. See Figure 13 for a suggested circuit. where RqJA = Junction−to−ambient thermal resistance (52°C/W for the DIP, 72°C/W for the FN Package); TA = Ambient Temperature. http://onsemi.com 7 MC3479 0.8 VOLD (VOLTS) 70 I M (mA) 60 IOD = 0 50 40 30 0.6 0.4 0.2 20 10 0 0 50 100 150 200 250 IBS (mA) 300 350 0 100 200 300 IOD (mA) Figure 8. Power Supply Current Figure 9. Maximum Saturation Voltage − Driver Output Low TJ = (1.01 W 52°C/W) + 25°C TJ = 77.5°C This temperature is well below the maximum limit. If the calculated TJ had been higher than 150°C, a heatsink such as the Staver Co. V−7 Series, Aavid #5802, or Thermalloy #6012 could be used to reduce RqJA. In extreme cases, forced air cooling should be considered. The above calculation, and RqJA, assumes that a ground plane is provided under the MC3479 (either or both sides of the PC board) to aid in the heat dissipation. Single nominal width traces leading from the four ground pins should be avoided as this will increase TJ, as well as provide potentially disruptive ground noise and IR drops when switching the motor current. For example, assume an application where VM = 12 V, the motor requires 200 mA/coil, operating at room temperature with no heatsink on the IC. From Figure 11, IBS is determined to be 95 mA. RB is calculated: RB = (12 − 0.7) V/95 mA RB = 118.9 kW From Figure 8, IM (max) is determined to be 22 mA. From Figure 9, VOLD is 0.46 V, and from Figure 10, (VM − VOHD) is 1.4 volts. P = (12 0.022) + (2 0.2) (1.4 + 0.46) P = 1.01 W 2.0 140.00 100.00 IBS (mA) [VM − VOHD] (VOLTS) 120.00 1.5 1.0 80.00 60.00 40.00 0.5 20.00 0 0 100 200 0.00 0.00 300 50.00 100.00 150.00 200.00 250.00 300.00 IOD (mA) IOD (mA) Figure 10. Maximum Saturation Voltage − Driver Output High Figure 11. Bias/Set Current − Output Drive Current http://onsemi.com 8 MC3479 +V +V 2.0 kW Typ VM VD 16 11 Phase A L1 1 L2 2 MC3479 CW/CCW 10 Full/Half Step 9 OIC 8 Motor 3 7 Clock Digital Inputs 1N5221A (3.0 V) 15 L3 L4 4 5 12 13 6 GND 14 Bias/Set RB Set Normal Operation MC14049UB or equivalent Figure 12. Typical Applications Circuit MC3479 6 Bias/Set RB Normal Operation MC14049UB or equivalent Reduced Power − Suggested value for RB1 (VM = 12 V) is 150 kW. − RB calculation (see text) must take into account the current through RB1. Figure 13. Power Reduction http://onsemi.com 9 RB1 MC3479 PACKAGE DIMENSIONS PDIP−16 CASE 648C−04 ISSUE D A 0.005 (0.13) J 8 16X 1 L 9 B 16 M M T B B A DIM A B C D E F G J K L M N INCHES MIN MAX 0.744 0.783 0.240 0.260 0.145 0.185 0.015 0.021 0.050 BSC 0.040 0.70 0.100 BSC 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.040 MILLIMETERS MIN MAX 18.90 19.90 6.10 6.60 3.69 4.69 0.38 0.53 1.27 BSC 1.02 1.78 2.54 BSC 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01 K C N F NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. T E G 16X SEATING PLANE D 0.005 (0.13) M T A ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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