NTHS2101P Power MOSFET −8.0 V, −7.5 A P−Channel ChipFET Features • Offers an Ultra Low RDS(on) Solution in the ChipFET Package • Miniature ChipFET Package 40% Smaller Footprint than TSOP−6 • • • • • making it an Ideal Device for Applications where Board Space is at a Premium Low Profile (<1.1 mm) Allows it to Fit Easily into Extremely Thin Environments such as Portable Electronics Designed to Provide Low RDS(on) at Gate Voltage as Low as 1.8 V, the Operating Voltage used in many Logic ICs in Portable Electronics Simplifies Circuit Design since Additional Boost Circuits for Gate Voltages are not Required Operated at Standard Logic Level Gate Drive, Facilitating Future Migration to Lower Levels using the same Basic Topology Pb−Free Package is Available http://onsemi.com V(BR)DSS Ultra Low RDS(on) TYP ID MAX 19 m @ −4.5 VGS −8.0 V −7.5 A 25 m @ −2.5 VGS 34 m @ −1.8 VGS S G Applications • Optimized for Battery and Load Management Applications in • • Portable Equipment such as MP3 Players, Cell Phones, Digital Cameras, Personal Digital Assistant and other Portable Applications Charge Control in Battery Chargers Buck and Boost Converters D P−Channel MOSFET ChipFET CASE 1206A STYLE 1 MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage VDSS −8.0 Vdc Gate−to−Source Voltage − Continuous VGS 8.0 Vdc ID −5.4 −7.5 A Drain Current − Continuous − 5 seconds PD Continuous Source Current Is Thermal Resistance (Note 1) Junction−to−Ambient, 5 sec Junction−to−Ambient, Continuous Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds W 1.3 2.5 0.7 1.3 RJA TL −1.1 October, 2004 − Rev. 4 8 1 D 1 8 D 7 2 D 2 7 D 6 3 D 3 S 5 4 G 4 A 6 5 D4 = Specific Device Code M = Month Code °C/W 50 95 ORDERING INFORMATION °C 260 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq [1 oz] including traces). Semiconductor Components Industries, LLC, 2004 D D4 M Total Power Dissipation Continuous @ TA = 25°C (5 sec) @ TA = 25°C Continuous @ 85°C (5 sec) @ 85°C MARKING DIAGRAM PIN CONNECTIONS 1 Package Shipping† NTHS2101PT1 ChipFET 3000/Tape & Reel NTHS2101PT1G ChipFET (Pb−Free) 3000/Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NTHS2101P/D NTHS2101P ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Test Condition Min Typ Max Unit V(Br)DSS VGS = 0 Vdc, ID = −250 Adc −8.0 Gate−Body Leakage Current Zero IGSS VDS = 0 Vdc, VGS = 8.0 Vdc 100 nAdc Zero Gate Voltage Drain Current IDSS VDS = −6.4 Vdc, VGS = 0 Vdc VDS = −6.4 Vdc, VGS = 0 Vdc, TJ = 85°C −1.0 −5.0 Adc Gate Threshold Voltage VGS(th) VDS = VGS, ID = −250 Adc −1.5 Vdc Static Drain−to−Source On−Resistance RDS(on) VGS = −4.5 Vdc, ID = −5.4 Adc VGS = −2.5 Vdc, ID = −4.5 Adc VGS = −1.8 Vdc, ID = −2.0 Adc 19 25 34 25 36 48 m Forward Transconductance gFS VDS = −5.0 Vdc, ID = −5.2 Adc 20 Diode Forward Voltage VSD IS = −1.1 Adc, VGS = 0 Vdc −0.62 Input Capacitance Ciss Coss VDS = −6.4 Vdc VGS = 0 V f = 1.0 1 0 MHz 2400 Output Capacitance Transfer Capacitance Crss OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (Note 2) Temperature Coefficient (Positive) Vdc ON CHARACTERISTICS (Note 2) −0.45 S −1.2 V DYNAMIC CHARACTERISTIC pF 550 420 SWITCHING CHARACTERISTICS (Note 3) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Gate Charge VDD = −6.4 Vdc VGS = −4.5 Vdc ID = −5 −5.4 4 Adc RG = 2.0 (Note 2) td(on) tr td(off) tf 28 73 60 QG 15 4.0 QGD VGS = −4.5 Vdc ID = −5.4 Adc VDS = −6.4 Vdc Trr IF = −1.1 A, di/dt = 100 A/s 90 QGS Source−Drain Reverse Recovery Time ns 7.0 2. Pulse Test: Pulse Width = 250 s, Duty Cycle = 2%. 3. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 30 nC 8.0 ns NTHS2101P VGS = −8 thru −2.4 V 16 −2 V −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) TYPICAL ELECTRICAL CHARACTERISTICS TJ = 25°C 12 −1.8 V 8 −1.6 V 4 −1.4 V 16 12 8 TJ = 100°C 4 TJ = −55°C 0 0 0 1 2 3 4 5 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0 6 0.5 1.0 1.5 2.0 2.5 −VGS, GATE−TO−SOURCE VOLTAGE (V) 0.10 VGS = −1.8 V 0.08 0.06 0.04 VGS = −2.5 V 0.02 VGS = −4.5 V 0 4 6 8 10 12 14 16 −ID, DRAIN CURRENT (A) 18 20 1.6 VGS = −4.5 V 1.4 1.2 1.0 0.8 0.6 −50 Figure 3. On−Resistance versus Drain Current and Gate Voltage −25 0 25 50 125 75 100 TJ, JUNCTION TEMPERATURE (°C) 150 Figure 4. On−Resistance Variation with Temperature 10,000 5000 TJ = 125°C 4500 TJ = 100°C 1000 C, CAPACITANCE (pF) −IDSS, LEAKAGE (nA) 3.0 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) RDS(on), DRAIN−TO−SOURCE RESISTANCE () Figure 1. On−Region Characteristics 2 TJ = 25°C 100 VGS = 0 V 10 Ciss TJ = 25°C Crss Ciss 4000 3500 3000 2500 2000 1500 1000 1 Coss Crss 500 0 0 2 4 6 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 8 8 6 4 2 0 2 4 6 8 −VGS −VDS GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. Drain−to−Source Leakage Current vs. Voltage Figure 6. Capacitance Variation http://onsemi.com 3 NTHS2101P 8 QT 7 4 6 −VGS 3 5 4 Q1 2 Q2 3 2 1 ID = 5.4 A TJ = 25°C 1 0 0 12 3 6 9 QG, TOTAL GATE CHARGE (nC) 0 15 1000 VDD = −6.4 V ID = −5.4 A VGS = −4.5 V t, TIME (ns) 5 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS td(off) tf tr 100 td(on) 10 1 1 Figure 7. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 10 RG, GATE RESISTANCE () 100 Figure 8. Resistive Switching Time Variation vs. Gate Resistance −IS, SOURCE CURRENT (AMPS) 5 VGS = 0 V TJ = 25°C 4 3 2 1 0 0.4 0.5 0.6 0.7 −VSD, SOURCE−TO−DRAIN VOLTAGE (V) 0.8 NORMALIZED EFFECTIVE TRANSIENT THERMAL IMPEDANCE Figure 9. Diode Forward Voltage vs. Current 2 1 Duty Cycle = 0.5 Notes: 0.2 PDM t1 0.1 t2 0.1 t1 1. Duty Cycle, D = t 2 2. Per Unit Base = RthJA = 80°C/W 3. TJM − TA = PDMZthJA(t) 4. Surface Mounted 0.05 0.02 0.01 10−4 Single Pulse 10−3 10−2 10 −1 1 SQUARE WAVE PULSE DURATION (sec) 10 Figure 10. Normalized Thermal Transient Impedance, Junction−to−Ambient http://onsemi.com 4 100 600 NTHS2101P PACKAGE DIMENSIONS ChipFET CASE 1206A−03 ISSUE E A 8 M 7 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE. 4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL AND VERTICAL SHALL NOT EXCEED 0.08 MM. 5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS. 6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD SURFACE. 7. 1206A−01 AND 1206A−02 OBSOLETE. NEW STANDARD IS 1206A−03. K 5 S 5 6 7 8 4 3 2 1 B 1 2 3 4 L D J G C 0.05 (0.002) STYLE 1: PIN 1. 2. 3. 4. 5. 6. 7. 8. DIM A B C D G J K L M S DRAIN DRAIN DRAIN GATE SOURCE DRAIN DRAIN DRAIN MILLIMETERS MIN MAX 2.95 3.10 1.55 1.70 1.00 1.10 0.25 0.35 0.65 BSC 0.10 0.20 0.28 0.42 0.55 BSC 5 ° NOM 1.80 2.00 INCHES MIN MAX 0.116 0.122 0.061 0.067 0.039 0.043 0.010 0.014 0.025 BSC 0.004 0.008 0.011 0.017 0.022 BSC 5 ° NOM 0.072 0.080 SOLDERING FOOTPRINTS* 2.032 0.08 2.032 0.08 0.457 0.018 0.635 0.025 1.727 0.068 0.457 0.018 0.711 0.028 0.66 0.026 SCALE 20:1 0.178 0.007 0.711 0.028 mm inches 0.66 0.026 Basic Style 1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 mm inches NTHS2101P ChipFET is a trademark of Vishay Siliconix. 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