ONSEMI NB6L11DR2

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The NB6L11 is an enhanced differential 1:2 clock or data fanout
buffer/translator. The device has the same pinout and is functionally
equivalent to the LVEL11, EP11, LVEP11 devices. Moreover, the
device is optimized for the systems that require LOW skew, LOW
jitter and LOW power consumption.
Differential input can be configured to accept single−ended signal
by applying an external reference voltage to unused complimentary
input pin. Input accept LVNECL, LVPECL, LVTTL, LVCMOS,
CML, or LVDS. The outputs are 800 mV ECL signals.
• Maximum Input Clock Frequency w 6 GHz Typical
• Maximum Input Data Rate w 6 Gb/s Typical
• Low 14 mA Typical Power Supply Current
• 150 ps Typical Propagation Delay
• 5 ps Typical Within Device Skew
• 75 ps Typical Rise/Fall Times
• PECL Mode Operating Range: VCC = 2.375 V to 3.465 V
with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V
with VEE = −2.375 V to −3.465 V
• Open Input Default State
• Q Outputs Will Default LOW with Inputs Open or at VEE
• LVDS, LVPECL, LVNECL, LCMOS, LVTTL and CML Input
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MARKING DIAGRAMS*
8
8
6L11
ALYW
1
SO−8
D SUFFIX
CASE 751
1
8
8
6L11
ALYW
1
TSSOP−8
DT SUFFIX
CASE 948R
A
L
Y
W
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
*For additional marking information, refer to
Application Note AND8002/D.
Compatible
ORDERING INFORMATION
Package
SO−8
Shipping†
98 Units/Rail
NB6L11DR2
SO−8
2500/
Tape & Reel
NB6L11DT**
TSSOP−8
100 Units/Rail
NB6L11DTR2**
TSSOP−8
2500/
Tape & Reel
Device
NB6L11D
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
**Future Product − Contact factory for availability.
 Semiconductor Components Industries, LLC, 2004
April, 2004 − Rev. 2
1
Publication Order Number:
NB6L11/D
NB6L11
Q0
1
Q0
2
R2
8
VCC
7
D
6
D
5
VEE
R1
Q1
R1
3
R2
Q1
4
Figure 1. Pinout (Top View) and Logic Diagram
Table 1. PIN DESCRIPTION
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Pin
Name
I/O
Default State
Description
1
Q0
ECL Output
−
2
Q0
ECL Output
−
3
Q1
ECL Output
−
Non−inverted differential clock/data output 1. Typically
terminated with 50 W resistor to VTT = VCC − 2 V.
4
Q1
ECL Output
−
Inverted differential clock/data output 1. Typically terminated with 50 W resistor to VTT = VCC − 2 V.
5
VEE
−
−
Negative power supply voltage
6
D
LVDS, CML, LVPECL,
LVNECL, LVCMOS,
LVTTL Input
HIGH
Inverted differential clock/data input. Internal 37.5 kW to
VCC and 75 kW to VEE.
7
D
LVDS, CML, LVPECL,
LVNECL, LVCMOS,
LVTTL Input
LOW
Non−inverted differential clock/data input. Internal
75 kW to VCC and 37.5 kW to VEE.
8
VCC
−
−
Non−inverted differential clock/data output 0. Typically
terminated with 50 W Resistor to VTT = VCC − 2 V.
Inverted differential clock/data output 0. Typically terminated with 50 W resistor to VTT = VCC − 2 V.
Positive power supply voltage
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Default State Resistor
(R1)
37.5 kW
Internal Input Default State Resistor
(R2)
75 kW
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
> 2 kV
> 100 V
> 1 kV
Level 1
UL 94 V−0 @ 0.125 in
167
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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2
NB6L11
Table 3. MAXIMUM RATINGS
Symbol
Rating
Unit
VCC
Positive Power Supply
Parameter
VEE = 0 V
Condition 1
3.6
V
VEE
Negative Power Supply
VCC = 0 V
−3.6
V
VI
Positive Input Voltage
Negative Input Voltage
VEE = 0 V
VCC = 0 V
3.6
−3.6
V
V
VINPP
Differential Input Voltage
2.8
|VCC − VEE|
V
Iout
Output Current
25
50
mA
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
SOIC−8
SOIC−8
190
130
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
SOIC−8
41 to 44
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
TSSOP−8
41 to 44
°C/W
Tsol
Wave Solder
< 2 to 3 sec @ 248°C
265
°C
|D − D|
Condition 2
VI v VCC
VI w VEE
VCC − VEE w 2.8 V
VCC − VEE t 2.8 V
Continuous
Surge
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
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3
NB6L11
Table 4. DC CHARACTERISTICS, PECL VCC = 2.5 V, VEE = 0 V (Note 4)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
5
14
20
5
14
20
5
14
20
mA
IEE
Negative Power Supply Current (Note 5)
VOH
Output HIGH Voltage (Note 6)
1350
1450
1550
1400
1500
1600
1450
1550
1650
mV
VOL
Output LOW Voltage (Note 6)
630
750
870
680
800
920
730
850
970
mV
DIFFERENTIAL INPUT DRIVEN SINGLE−ENDED (Figures 10, 12)
Vth
Input Threshold Reference Voltage Range
(Note 2)
1125
VCC
−75
1125
VCC
−75
1125
VCC
−75
mV
VIH
Single−Ended Input HIGH Voltage
Vth
+75
VCC
Vth
+75
VCC
Vth
+75
VCC
mV
VIL
Single−Ended Input LOW Voltage
VEE
Vth
−75
VEE
Vth
−75
VEE
Vth
−75
mV
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 11, 13)
VIHD
Differential Input HIGH Voltage
1200
VCC
1200
VCC
1200
VCC
mV
VILD
Differential Input LOW Voltage
VEE
VCC
−75
VEE
VCC
−75
VEE
VCC
−75
mV
VCMR
Input Common Mode Range
(Differential Cross−Point Voltage) (Note 3)
1163
VCC
−38
1163
VCC
−38
1163
VCC
−38
mV
VID
Differential Input Voltage (VIHD − VILD)
75
2500
75
2500
75
2500
mV
IIH
Input HIGH Current
D
D
150
150
mA
IIL
Input LOW Current
D
D
50
10
−150
−150
150
150
−5
−30
50
10
−150
−150
−5
−30
150
150
50
10
−150
−150
−5
−30
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
2. Vth is applied to the complementary input when operating in single−ended mode.
3. VCMR minimum varies 1:1 with VEE, VCMR maximum varies 1:1 with VCC.
4. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to −1.3 V.
5. All input and output pins left open.
6. All loading with 50 W to VCC − 2.0 V.
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4
NB6L11
Table 5. DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 9)
−40°C
25°C
85°C
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IEE
Negative Power Supply Current (Note 10)
5
14
20
5
14
20
5
14
20
mA
VOH
Output HIGH Voltage (Note 11)
2150
2250
2350
2200
2300
2400
2250
2350
2450
mV
VOL
Output LOW Voltage (Note 11)
1430
1550
1670
1480
1600
1720
1530
1650
1770
mV
Symbol
DIFFERENTIAL INPUT DRIVEN SINGLE−ENDED (Figures 10, 12)
Vth
Input Threshold Reference Voltage Range
(Note 7)
1125
VCC
−75
1125
VCC
−75
1125
VCC
−75
mV
VIH
Single−Ended Input HIGH Voltage
Vth
+75
VCC
Vth
+75
VCC
Vth
+75
VCC
mV
VIL
Single−Ended Input LOW Voltage
VEE
Vth
−75
VEE
Vth
−75
VEE
Vth
−75
mV
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 11, 13)
VIHD
Differential Input HIGH Voltage
1200
VCC
1200
VCC
1200
VCC
mV
VILD
Differential Input LOW Voltage
VEE
VCC
−75
VEE
VCC
−75
VEE
VCC
−75
mV
VCMR
Input Common Mode Range
(Differential Cross−Point Voltage) (Note 8)
1163
VCC
−38
1163
VCC
−38
1163
VCC
−38
mV
VID
Differential Input Voltage (VIHD − VILD)
75
2500
75
2500
75
2500
mV
IIH
Input HIGH Current
D
D
150
150
mA
IIL
Input LOW Current
D
D
50
10
−150
−150
150
150
−5
−30
50
10
−150
−150
−5
−30
150
150
50
10
−150
−150
−5
−30
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
7. Vth is applied to the complementary input when operating in single−ended mode.
8. VCMR minimum varies 1:1 with VEE, VCMR maximum varies 1:1 with VCC.
9. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
10. All input and output pins left open.
11. All loading with 50 W to VCC − 2.0 V.
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NB6L11
Table 6. DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −3.465 V to −2.375 V (Note 14)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IEE
Negative Power Supply Current
(Note 15)
5
14
20
5
14
20
5
14
20
mA
VOH
Output HIGH Voltage (Note 16)
−1150
−1050
−950
−1100
−1000
−900
−1050
−950
−850
mV
VOL
Output LOW Voltage (Note 16)
−1870
−1750
−1630
−1820
−1700
−1580
−1770
−1650
−1530
mV
DIFFERENTIAL INPUT DRIVEN SINGLE−ENDED (Figures 10, 12)
Vth
Input Threshold Reference Voltage
Range (Note 12)
VEE
+1125
VCC
−75
VEE
+1125
VCC
−75
VEE
+1125
VCC
−75
mV
VIH
Single−Ended Input HIGH Voltage
Vth
+75
VCC
Vth
+75
VCC
Vth
+75
VCC
mV
VIL
Single−Ended Input LOW Voltage
VEE
Vth
−75
VEE
Vth
−75
VEE
Vth
−75
mV
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 11, 13)
VIHD
Differential Input HIGH Voltage
VEE
+1200
VCC
VEE
+1200
VCC
VEE
+1200
VCC
mV
VILD
Differential Input LOW Voltage
VEE
VCC
−75
VEE
VCC
−75
VEE
VCC
−75
mV
VCMR
Input Common Mode Range
(Differential Cross−Point Voltage)
(Note 13)
VEE
+1163
VCC
−38
VEE
+1163
VCC
−38
VEE
+1163
VCC
−38
mV
VID
Differential Input Voltage (VIHD −
VILD)
75
2500
75
2500
75
2500
mV
IIH
Input HIGH Current
D
D
150
150
mA
IIL
Input LOW Current
D
D
50
10
−150
−150
150
150
−5
−30
50
10
−150
−150
−5
−30
150
150
50
10
−150
−150
−5
−30
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
12. Vth is applied to the complementary input when operating in single−ended mode.
13. VCMR minimum varies 1:1 with VEE, VCMR maximum varies 1:1 with VCC
14. Input and output parameters vary 1:1 with VCC.
15. Input and output pins left open.
16. All loading with 50 W to VCC − 2.0 V.
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NB6L11
Table 7. AC CHARACTERISTICS VCC = 0 V; VEE = −3.465 V to −2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V (Note 17)
−40°C
Symbol
Output Voltage Amplitude
(See Figures 2 & 3)
tPLH,
tPHL
Propagation Delay to
Output Differential @ 1 GHz
tSKEW
Duty Cycle Skew
Within Device Skew
Device−to−Device Skew
tJITTER
Typ
fin v 3 GHz
fin v 6 GHz
480
270
700
300
D to Q, Q
110
150
190
2
5
15
Characteristic
VOUTPP
25°C
Min
Max
85°C
Min
Typ
Max
Min
Typ
480
270
700
300
110
150
200
10
15
60
2
5
15
0.2
1
2
12
75
700
2500
30
75
120
Max
480
270
700
300
120
160
220
10
15
60
2
5
15
10
15
60
0.2
1
0.2
1
2
12
2
12
75
700
2500
75
700
2500
mV
30
75
120
30
75
120
ps
Unit
mV
ps
(Note 18)
RMS Random Clock Jitter
(Note 19)
fin v 6 GHz
Peak−to−Peak Data Dependent Jitter
(Note 20)
fin v 6 Gb/s
VINPP
Input Voltage Swing / Sensitivity
(Differential Configuration) (Note 21)
tr
tf
Output Rise/Fall Times @ 1 GHz
(20% − 80%)
Q, Q
ps
ps
0.8
OUTPUT VOLTAGE AMPLITUDE (V)
OUTPUT VOLTAGE AMPLITUDE (V)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
17. Measured using a 800 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V. Input edge rates 40 ps (20% − 80%).
18. See Figure 9 tskew = |tPLH − tPHL| for a nominal 50% differential clock input waveform. Skew is measured between outputs under identical
transitions and conditions @ 1 GHz.
19. Additive RMS jitter with 50% duty cycle clock signal at 6 GHz.
20. Additive Peak−to−Peak data dependent jitter with NRZ PRBS 223−1 data rate at 6 Gb/s.
21. VINPP(max) cannot exceed VCC − VEE (applicable only when VCC − VEE < 2500 mV). Input voltage swing is a single−ended measurement
operating in differential mode
0.7
0.6
0.5
−40°C
0.4
25°C
0.3
0.2
85°C
0.1
0.0
0.8
0.7
0.6
−40°C
0.5
0.4
25°C
0.3
0.2
85°C
0.1
0.0
1
2
3
4
5
6
INPUT CLOCK FREQUENCY (GHz)
7
8
1
Figure 2. Output Voltage Amplitude (VOUTPP)
versus Input Clock Frequency (fIN) and
Temperature at VCC − VEE = 3.3 V
2
3
4
5
6
INPUT CLOCK FREQUENCY (GHz)
7
Figure 3. Output Voltage Amplitude (VOUTPP)
versus Input Clock Frequency (fIN) and
Temperature at VCC − VEE = 2.5 V
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7
8
OUTPUT VOLTAGE AMPLITUDE
(100 mV/div)
OUTPUT VOLTAGE AMPLITUDE
(100 mV/div)
NB6L11
TIME (64 ps/div)
TIME (32 ps/div)
Figure 4. Typical Output Waveform at
2.488 Gb/s with PRBS 223−1 (Total System
Pk−Pk Jitter is 17 ps. Device Pk−Pk Jitter
Contribution is 4 ps)
Figure 5. Typical Output Waveform at
6.125 Gb/s with PRBS 223−1 (Total System
Pk−Pk Jitter is 20 ps. Device Pk−Pk Jitter
Contribution is 5 ps)
NOTE:
VCC − VEE = 3.3 V; VIN = 700 mV; TA = 25°C.
210
120
RISE/FALL TIME (ps)
190
85°C
170
150
−40°C
25°C
130
100
90
85°C
80
70
60
25°C
−40°C
50
40
110
30
2.375
2.5
3.3
3.465
2.375
2.5
3.3
3.465
POWER SUPPLY VOLTAGE (V)
POWER SUPPLY VOLTAGE (V)
Figure 6. Propagation Delay versus Power
Supply Voltage and Temperature
Figure 7. Rise/Fall Time versus Power Supply
Voltage and Temperature
20
17
IEE CURRENT (mA)
PROPAGATION DELAY (ps)
110
VCC − VEE = −3.465 V
14
11
VCC − VEE = −2.375 V
8
5
−40
25
85
TEMPERATURE (°C)
Figure 8. IEE Current versus Temperature and
Power Supply Voltage
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8
NB6L11
D
VINPP(D) = VIH(D) − VIL(D)
VINPP(D) = VIH(D) − VIL(D)
D
Q
VOUTPP(Q) = VOH(Q) − VOL(Q)
VOUTPP(Q) = VOH(Q) − VOL(Q)
Q
tPHL
tPLH
Figure 9. AC Reference Measurement
Vth
D
D
D
D
Vth
Figure 10. Differential Input Driven
Single−Ended
VCC
Vthmax
Figure 11. Differential Inputs Driven
Differentially
VCC
VCMmax
VIHmax
VIHDmax
VILDmax
VID = VIHD − VILD
VIHDtyp
VILmax
VIH
Vth
VIL
Vth
VCMR
VILDtyp
VIHmin
Vthmin
GND
GND
Figure 12. Vth Diagram
Q
VIHDmin
VILDmin
VCMmax
VILmin
Figure 13. VCMR Diagram
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
Zo = 50 W
D
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 14. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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NB6L11
Resource Reference of Application Notes
AN1405
−
ECL Clock Distribution Techniques
AN1568
−
Interfacing Between LVDS and ECL
AN1650
−
Using Wire−OR Ties in ECLinPS Designs
AN1672
−
The ECL Translator Guide
AND8001
−
Odd Number Counters Design
AND8002
−
Marking and Date Codes
AND8003
−
Storage and Handling of Drypack Surface Mount Device
AND8020
−
Termination of ECL Logic Devices
AND8072
−
Thermal Analysis and Reliability of
Wire Bonded ECL
AND8066
−
Interfacing with ECLinPS
AND8090
−
AC Characteristics of ECL Devices
For an updated list of Application Notes, please
see our website at http://onsemi.com.
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10
NB6L11
PACKAGE DIMENSIONS
SOIC−8
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751−07
ISSUE AB
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
−X−
A
8
5
S
B
1
4
K
−Y−
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
H
D
M
J
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
SO−8
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11
mm Ǔ
ǒinches
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
NB6L11
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
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