MC74AC299, MC74ACT299 8−Input Universal Shift/ Storage Register with Common Parallel I/O Pins The MC74AC299/74ACT299 is an 8−bit universal shift/storage register with 3−state outputs. Four modes of operation are possible: hold (store), shift left, shift right and load data. The parallel load inputs and flip−flop outputs are multiplexed to reduce the total number of package pins. Additional outputs are provided for flip−flops Q0, Q7 to allow easy serial cascading. A separate active LOW Master Reset is used to reset the register. • • • • • • Common Parallel I/O for Reduced Pin Count Additional Serial Inputs and Outputs for Expansion Four Operating Modes: Shift Left, Shift Right, Load and Store 3−State Outputs for Bus−Oriented Applications Outputs Source/Sink 24 mA ′ACT299 Has TTL Compatible Inputs VCC S1 DS7 Q7 I/O7 I/O5 I/O3 I/O1 CP DS0 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 S0 OE1 OE2 I/O6 I/O4 I/O2 I/O0 Q0 MR GND http://onsemi.com PDIP−20 N SUFFIX CASE 738 20 1 SO−20 DW SUFFIX CASE 751 20 1 ORDERING INFORMATION Figure 1. Pinout: 20−Lead Packages Conductors (Top View) Device Package Shipping MC74AC299N PDIP−20 18 Units/Rail MC74ACT299N PDIP−20 18 Units/Rail MC74AC299DW SOIC−20 38 Units/Rail MC74AC299DWR2 SOIC−20 1000 Tape & Reel MC74ACT299DW SOIC−20 38 Units/Rail MC74ACT299DWR2 SOIC−20 1000 Tape & Reel DEVICE MARKING INFORMATION See general marking information in the device marking section on page 9 of this data sheet. PIN ASSIGNMENT PIN FUNCTION CP Clock Pulse Input DS0 Serial Data Input for Right Shift DS7 Serial Data Input for Left Shift S0, S1 Mode Select Inputs MR Asynchronous Master Reset OE1, OE2 3−State Output Enable Inputs I/O0−I/O7 Parallel Data Inputs or 3−State Parallel Outputs Q 0 , Q7 Serial Outputs Semiconductor Components Industries, LLC, 2003 April, 2003 − Rev. 6 1 Publication Order Number: MC74AC299/D MC74AC299, MC74ACT299 DS7 S0 DS0 Q7 DS7 S1 Q7 CP D Q CD I/O7 OE MR Q I/O I/O I/O I/O I/O I/O I/O I/O 0 0 1 2 3 4 5 6 7 CP D Q CD Figure 2. Logic Symbol I/O6 CP D Q CD I/O5 CP D Q CD I/O4 CP D Q CD I/O3 CP D Q CD I/O2 CP D Q CD I/O1 CP D Q CD I/O0 S0 S1 DS0 NOTE: CP OE1 Q0 MR That this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 3. Logic Diagram http://onsemi.com 2 OE2 MC74AC299, MC74ACT299 FUNCTIONAL DESCRIPTION The MC74AC299/74ACT299 contains eight edge−triggered D−type flip−flops and the interstage logic necessary to perform synchronous shift left, shift right, parallel load and hold operations. The type of operation is determined by S0 and S1, as shown in the Truth Table. All flip−flop outputs are brought out through 3−state buffers to separate I/O pins that also serve as data inputs in the parallel load mode. Q0 and Q7 are also brought out on other pins for expansion in serial shifting of longer words. A LOW signal on MR overrides the Select and CP inputs and resets the flip−flops. All other state changes are initiated by the rising edge of the clock. Inputs can change when the clock is in either state provided only that the recommended setup and hold times, relative to the rising edge of CP, are observed. A HIGH signal on either OE1 or OE2 disables the 3-state buffers and puts the I/O pins in the high impedance state. In this condition the shift, hold, load and reset operations can still occur. The 3−state buffers are also disabled by HIGH signals on both S0 and S1 in preparation for a parallel load operation. TRUTH TABLE Inputs Response MR S1 S0 CP L H H H H X H L H L X H H L L X X Asynchronous Reset; Q0−Q7 = LOW Parallel Load; I/On → Qn Shift Rights; DS0 → Q0, Q0 → Q1, etc. Shift Left; DS7 → Q7, Q7 → Q6, etc. Hold H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Transition MAXIMUM RATINGS* Symbol Parameter Value Unit −0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) −0.5 to VCC +0.5 V VOUT DC Output Voltage (Referenced to GND) −0.5 to VCC +0.5 V IIN DC Input Current, per Pin ±20 mA IOUT DC Output Sink/Source Current, per Pin ±50 mA ICC DC VCC or GND Current per Output Pin ±50 mA Tstg Storage Temperature −65 to +150 °C *Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC Supply Voltage VIN, VOUT DC Input Voltage, Output Voltage (Ref. to GND) tr, tf Input Rise and Fall Time (Note 1) ′AC Devices except Schmitt Inputs Min Typ Max Unit ′AC 2.0 5.0 6.0 ′ACT 4.5 5.0 5.5 0 − VCC VCC @ 3.0 V − 150 − VCC @ 4.5 V − 40 − VCC @ 5.5 V − 25 − VCC @ 4.5 V − 10 − VCC @ 5.5 V − 8.0 − − − 140 °C −40 25 85 °C V V ns/V tr, tf Input In ut Rise and Fall Time (Note 2) ′ACT Devices except Schmitt Inputs TJ Junction Temperature (PDIP) TA Operating Ambient Temperature Range IOH Output Current − High − − −24 mA IOL Output Current − Low − − 24 mA ns/V 1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. http://onsemi.com 3 MC74AC299, MC74ACT299 DC CHARACTERISTICS Symbol Parameter VCC (V) 74AC 74AC TA = +25°C TA = −40°C to +85°C Typ VIH VIL VOH VOL 1.5 2.25 2.75 2.1 3.15 3.85 2.1 3.15 3.85 V VOUT = 0.1 V or VCC − 0.1 V Maximum a u Low o Level e e Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 0.9 1.35 1.65 0.9 1.35 1.65 V VOUT = 0.1 V or VCC − 0.1 V Minimum u High g Level e e Output Voltage 3.0 4.5 5.5 2.99 4.49 5.49 2.9 4.4 5.4 2.9 4.4 5.4 V 3.0 4.5 5.5 − − − 2.56 3.86 4.86 2.46 3.76 4.76 3.0 4.5 5.5 0.002 0.001 0.001 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 5.5 − − − 0.36 0.36 0.36 0.44 0.44 0.44 55 5.5 − ±0 1 ±0.1 55 5.5 − 5.5 Maximum a u Low o Level e e Output Voltage IOZT Maximum 3−State Current ICC Guaranteed Limits 3.0 4.5 5.5 Maximum a u Input u Leakage Current IOHD Conditions Minimum u High g Level e e Input Voltage IIN IOLD Unit †Minimum Dynamic O t t Current Output C t Maximum a u Quiescent Qu esce Supply Current IOUT = −50 µA *VIN = VIL or VIH −12 mA IOH −24 mA −24 mA V IOUT = 50 µA V V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA ±1 0 ±1.0 µA VI = VCC, GND ±0 6 ±0.6 ±6 0 ±6.0 µA VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND − − 75 mA VOLD = 1.65 V Max 5.5 − − −75 mA VOHD = 3.85 V Min 55 5.5 − 80 8.0 80 µA VIN = VCC or GND *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol VCC* (V) Parameter 74AC 74AC TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Min Typ Max Min Max Unit Fig. No. fmax Maximum Input Frequency 3.3 5.0 90 130 − − − − 80 105 − − MHz 3−3 tPLH Propagation Delay CP to Q0 or Q7 3.3 5.0 8.5 5.5 − − 20.5 14 7.0 4.5 22 15 ns 3−6 tPHL Propagation Delay CP to Q0 or Q7 3.3 5.0 8.5 5.5 − − 21.5 14.5 7.0 5.0 23 16 ns 3−6 *Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. http://onsemi.com 4 MC74AC299, MC74ACT299 AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) VCC* (V) Parameter Symbol 74AC 74AC TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Min Typ Max Min Max Unit Fig. No. tPLH Propagation Delay CP to I/On 3.3 5.0 9.0 6.0 − − 20.5 14.5 7.5 5.0 22.5 16 ns 3−6 tPHL Propagation Delay CP to I/On 3.3 5.0 10 6.5 − − 23 16 8.5 6.0 24.5 17.5 ns 3−6 tPHL Propagation Delay MR to Q0 or Q7 3.3 5.0 9.0 5.5 − − 22.5 15.5 7.5 5.0 25.0 17.0 ns 3−6 tPHL Propagation Delay MR to I/On 3.3 5.0 9.0 5.5 − − 21.5 15.0 7.5 5.0 24.0 16.5 ns 3−6 tPZH Output Enable Time OE to I/On 3.3 5.0 7.0 4.5 − − 18 12.5 6.0 4.0 19.5 13.5 ns 3−7 tPZL Output Enable Time OE to I/On 3.3 5.0 7.0 5.0 − − 18 12.5 6.0 4.0 20.5 14 ns 3−8 tPHZ Output Disable Time OE to I/On 3.3 5.0 6.5 3.5 − − 18.5 14 5.5 3.0 19.5 15 ns 3−7 tPLZ Output Disable Time OE to I/On 3.3 5.0 5.5 3.5 − − 17 12.5 4.5 2.0 19 13.5 ns 3−8 Unit Fig. No. *Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. AC OPERATING REQUIREMENTS Symbol VCC* (V) Parameter Typ 74AC 74AC TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Guaranteed Minimum ts Setup Time, HIGH or LOW S0 or S1 to CP 3.3 5.0 − − 8.0 5.0 8.5 5.5 ns 3−9 th Hold Time, HIGH or LOW S0 or S1 to CP 3.3 5.0 − − 0.5 1.0 0.5 1.0 ns 3−9 ts Setup Time, HIGH or LOW I/On to CP 3.3 5.0 − − 5.5 3.5 6.0 4.0 ns 3−9 th Hold Time, HIGH or LOW I/On to CP 3.3 5.0 − − 0 1.0 0 1.0 ns 3−9 ts Setup Time, HIGH or LOW DS0 or DS7 to CP 3.3 5.0 − − 6.5 4.0 7.0 4.5 ns 3−6 th Hold Time, HIGH or LOW DS0 or DS7 to CP 3.3 5.0 − − 0 1.0 0.5 1.0 ns 3−6 tw CP Pulse Width, Width LOW 3.3 5.0 − − 4.5 3.5 5.0 3.5 ns 3−6 tw MR Pulse Width Width, LOW 3.3 5.0 − − 4.5 3.5 5.0 3.5 ns 3−9 trec Recovery TIme MR to CP 3.3 5.0 − − 1.5 1.5 1.5 1.5 ns 3−9 *Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. http://onsemi.com 5 MC74AC299, MC74ACT299 DC CHARACTERISTICS Symbol Parameter VCC (V) 74ACT 74ACT TA = +25°C TA = −40°C to +85°C Typ Guaranteed Limits Unit Conditions VIH Minimum u High g Level e e Input Voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 V VOUT = 0.1 V or VCC − 0.1 V VIL Maximum a u Low o Level e e Input Voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 V VOUT = 0.1 V or VCC − 0.1 V VOH Minimum u High g Level e e Output Voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 V 4.5 5.5 − − 3.86 4.86 3.76 4.76 4.5 5.5 0.001 0.001 0.1 0.1 0.1 0.1 4.5 5.5 − − 0.36 0.36 0.44 0.44 V *VIN = VIL or VIH 24 mA IOL 24 mA 55 5.5 − ±0 1 ±0.1 ±1 0 ±1.0 µA VI = VCC, GND VOL Maximum a u Low o Level e e Output Voltage V V IOUT = −50 µA *VIN = VIL or VIH −24 mA IOH −24 mA IOUT = 50 µA IIN Maximum a u Input u Leakage Current IOZT Maximum 3-State Current 55 5.5 − ±0 6 ±0.6 ±6 0 ±6.0 µA VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND ∆ICCT Additional Max. ICC/Input 5.5 0.6 − 1.5 mA VI = VCC − 2.1 V IOLD †Minimum Dynamic O t t Current Output C t 5.5 − − 75 mA VOLD = 1.65 V Max 5.5 − − −75 mA VOHD = 3.85 V Min 55 5.5 − 80 8.0 80 µA VIN = VCC or GND IOHD ICC Maximum a u Quiescent Qu esce Supply Current *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. http://onsemi.com 6 MC74AC299, MC74ACT299 AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol VCC* (V) Parameter 74ACT 74ACT TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Min Typ Max Min Max Unit Fig. No. fmax Maximum In Input ut Frequency 50 5.0 120 − − 110 − MHz 3−3 tPLH Propagation Pro agation Delay CP to Q0 or Q7 50 5.0 40 4.0 − 12 5 12.5 30 3.0 14 ns 3−6 tPHL Pro agation Delay Propagation CP to Q0 or Q7 50 5.0 40 4.0 − 13 5 13.5 35 3.5 15 ns 3−6 tPLH Pro agation Delay Propagation CP to I/On 50 5.0 45 4.5 − 12 5 12.5 45 4.5 13 5 13.5 ns 3−6 tPHL Pro agation Delay Propagation CP to I/On 50 5.0 50 5.0 − 15 45 4.5 16 5 16.5 ns 3−6 tPHL Pro agation Delay Propagation MR to Q0 or Q7 50 5.0 40 4.0 − 15 40 4.0 18 ns 3−6 tPHL Propagation Pro agation Delay MR to I/On 50 5.0 40 4.0 − 14 5 14.5 35 3.5 17 5 17.5 ns 3−6 tPZH Out ut Enable Time Output OE to I/On 50 5.0 25 2.5 − 12 15 1.5 13 ns 3−7 tPZL Output Out ut Enable Time OE to I/On 50 5.0 20 2.0 − 12 15 1.5 13 5 13.5 ns 3−8 tPHZ Out ut Disable Time Output OE to I/On 50 5.0 20 2.0 − 12 5 12.5 20 2.0 13 5 13.5 ns 3−7 tPLZ Out ut Disable Time Output OE to I/On 50 5.0 25 2.5 − 11 5 11.5 20 2.0 12 5 12.5 ns 3−8 *Voltage Range 5.0 V is 5.0 V ±0.5 V. http://onsemi.com 7 MC74AC299, MC74ACT299 AC OPERATING REQUIREMENTS Symbol VCC* (V) Parameter 74ACT 74ACT TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Typ Unit Fig. No. Guaranteed Minimum ts Setu Time, HIGH or LOW Setup S0 or S1 to CP 50 5.0 − 50 5.0 55 5.5 ns 3−9 th Hold Time, HIGH or LOW S0 or S1 to CP 50 5.0 − 10 1.0 10 1.0 ns 3−9 ts Setu Time, HIGH or LOW Setup I/On to CP 50 5.0 − 40 4.0 45 4.5 ns 3−9 th Hold Time, HIGH or LOW I/On to CP 50 5.0 − 10 1.0 10 1.0 ns 3−9 ts Setu Time, HIGH or LOW Setup DS0 or DS7 to CP 50 5.0 − 45 4.5 50 5.0 ns 3−6 th Hold Time, HIGH or LOW DS0 or DS7 to CP 50 5.0 − 10 1.0 10 1.0 ns 3−6 tw CP Pulse Width HIGH or LOW 50 5.0 − 40 4.0 45 4.5 ns 3−9 tw MR Pulse Width Width, LOW 50 5.0 − 35 3.5 35 3.5 ns 3−9 trec Recovery Time MR to CP 50 5.0 − 15 1.5 15 1.5 ns 3−9 *Voltage Range 5.0 V is 5.0 V ±0.5 V. CAPACITANCE Symbol Parameter Value Typ Unit Test Conditions CIN Input Capacitance 4.5 pF VCC = 5.0 V CPD Power Dissipation Capacitance 170 pF VCC = 5.0 V http://onsemi.com 8 MC74AC299, MC74ACT299 MARKING DIAGRAMS PDIP−20 SO−20 MC74AC299N AWLYYWW AC299 AWLYYWW MC74ACT299N AWLYYWW ACT299 AWLYYWW A WL, L YY, Y WW, W = Assembly Location = Wafer Lot = Year = Work Week http://onsemi.com 9 MC74AC299, MC74ACT299 PACKAGE DIMENSIONS PDIP−20 N SUFFIX 20 PIN PLASTIC DIP PACKAGE CASE 738−03 ISSUE E −A− 20 11 1 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. B L C −T− K SEATING PLANE M N E G F J D 20 PL 0.25 (0.010) 20 PL 0.25 (0.010) M T A M M T B M DIM A B C D E F G J K L M N INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0 15 0.020 0.040 MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0 15 0.51 1.01 SO−20 DW SUFFIX 20 PIN PLASTIC SOIC PACKAGE CASE 751D−05 ISSUE F A 20 X 45 h 1 10 20X B B 0.25 M T A S B S A L H M E 0.25 10X NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 18X e A1 SEATING PLANE C T http://onsemi.com 10 DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0 7 MC74AC299, MC74ACT299 Notes http://onsemi.com 11 MC74AC299, MC74ACT299 SENSEFET is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800−282−9855 Toll Free USA/Canada http://onsemi.com 12 MC74AC299/D