NTMS4704N Power MOSFET 30 V, 12.3 A, Single N−Channel, SO−8 Features • • • • Low RDS(on) Low Gate Charge Standard SO−8 Single Package Pb−Free Package is Available http://onsemi.com V(BR)DSS Applications • • • • Notebooks, Graphics Cards Synchronous Rectification High Side Switch DC−DC Converters RDS(ON) TYP 7.5 mW @ 10 V 30 V Parameter Gate−to−Source Voltage Continuous Drain Current (Note 1) Power Dissipation (Note 1) Steady State TA = 25°C N−Channel D t v 10 s TA = 25°C Steady State TA = 25°C Symbol Value Unit VDSS 30 V VGS ±20 V ID 10 A TA = 85°C Power Dissipation (Note 2) 12.3 PD 1.6 W MARKING DIAGRAM/ PIN ASSIGNMENT 2.3 TA = 25°C ID TA = 85°C TA = 25°C Pulsed Drain Current S tp = 10 ms Operating Junction and Storage Temperature A 5.4 1 PD 0.86 W IDM 37 A TJ, Tstg −55 to 150 °C IS 2.3 A EAS 200 mJ TL 260 °C Value Unit Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 V, VGS = 10 V, IL Peak = 7.5 A, L = 10 mH, RG = 25 W) 7.6 Lead Temperature for Soldering Purposes (1/8″ from case for 10 secs) THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol SO−8 CASE 751 STYLE 12 Shipping† SO−8 2500/Tape & Reel SO−8 (Pb−Free) 2500/Tape & Reel RqJA 55 NTMS4704NR2 Junction−to−Ambient – Steady State (Note 2) RqJA 145 NTMS4704NR2G 1 Top View Package Junction−to−Ambient – t v 10 s (Note 1) August, 2006 − Rev. 2 Drain Drain Drain Drain ORDERING INFORMATION 80.5 © Semiconductor Components Industries, LLC, 2006 8 Device RqJA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Surfacemounted on FR4 board using the minimum recommended pad size. 1 4704N = Device Code A = Assembly Location L = WaferLot Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) Junction−to−Ambient – Steady State (Note 1) °C/W Source Source Source Gate 4704N ALYWG G Steady State G 7.3 t v 10 s Continuous Drain Current (Note 2) 12.3 A 10 mW @ 4.5 V MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Drain−to−Source Voltage ID MAX †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTMS4704N/D NTMS4704N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 28 VGS = 0 V, VDS = 24 V mV/°C TJ = 25°C 1.0 TJ = 125°C 50 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA ±100 mA nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance RDS(on) Forward Transconductance 1.0 2.5 5.0 gFS V mV/°C VGS = 10 V, ID = 12.3 A 7.5 9.5 mW VGS = 4.5 V, ID = 10 A 10 12.5 VDS = 15 V, ID = 10 A 20 S 1225 pF CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss VGS = 0 V, f = 1.0 MHz, VDS = 20 V 580 125 QG(TOT) 12 Threshold Gate Charge QG(TH) 1.6 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 5.25 RG 1.8 W td(on) 8.2 ns tr 5.4 Gate Resistance VGS = 4.5 V, VDS = 15 V, ID = 10 A 17 nC Total Gate Charge 3.25 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(off) VGS = 10 V, VDD = 15 V, ID = 1.0 A, RG = 3.0 W tf 28.4 10.5 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD VGS = 0 V, IS = 2.3 A TJ = 25°C 0.75 TJ = 125°C 0.56 tRR 35 Charge Time ta 18 Discharge Time tb Reverse Recovery Charge VGS = 0 V, dIS/dt = 100 A/ms, IS = 2.3 A QRR http://onsemi.com 2 V ns 17 33 3. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. 1.0 nC NTMS4704N TYPICAL PERFORMANCE CURVES 5V 3.4 V 3.2 V 25 2.8 V 20 15 2.6 V 10 2.4 V 5 2.2 V 0 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 40 TJ = 25°C 3V ID, DRAIN CURRENT (AMPS) 10 V 1 2 3 4 6 5 7 9 8 30 25 20 15 10 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0.03 0.02 0.01 0 3 4 6 8 9 5 7 2 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 10 TJ = 25°C 0.015 VGS = 4.5 V 0.010 VGS = 10 V 0.005 0 2 100000 IDSS, LEAKAGE (nA) 1.2 1 4 16 14 6 10 8 12 ID, DRAIN CURRENT (AMPS) 20 VGS = 0 V TJ = 150°C 10000 1000 TJ = 100°C 0.8 0.6 −50 18 Figure 4. On−Resistance vs. Drain Current and Gate Voltage ID = 12.3 A VGS = 10 V 1.4 4 0.020 Figure 3. On−Resistance vs. Gate−to−Source Voltage RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = −55°C 1 3 3.5 0.5 1.5 2.5 2 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0.04 1.6 TJ = 25°C 5 0 TJ = 25°C ID = 12.3 A 1.8 TJ = 100°C 10 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 0.05 1 VDS ≥ 10 V 35 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (AMPS) 30 −25 0 25 50 75 100 125 150 100 3 6 9 12 15 18 21 24 27 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 30 NTMS4704N C, CAPACITANCE (pF) VDS = 0 V VGS = 0 V TJ = 25°C Ciss 1800 Ciss 1200 Crss Coss 600 0 10 Crss 5 0 VGS 5 10 15 20 25 30 5 VDS 4 1 0 ID = 10 A TJ = 25°C 0 2 td(off) td(on) 10 RG, GATE RESISTANCE (OHMS) 0 12 Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge IS, SOURCE CURRENT (AMPS) t, TIME (ns) tr 1 4 6 8 10 QG, TOTAL GATE CHARGE (nC) 4 7 tf 1 12 8 VDS VDD = 15 V ID = 12.3 A VGS = 4.5 V 10 VGS QGD 2 Figure 7. Capacitance Variation 100 16 QGS 3 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1000 20 QT V DS , DRAIN−TO−SOURCE VOLTAGE (VOLTS) 2400 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TYPICAL PERFORMANCE CURVES 6 VGS = 0 V TJ = 25°C 5 4 3 2 1 0 0.3 100 Figure 9. Resistive Switching Time Variation vs. Gate Resistance 0.6 0.9 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) 1.2 Figure 10. Diode Forward Voltage vs. Current http://onsemi.com 4 NTMS4704N PACKAGE DIMENSIONS SOIC−8 CASE 751−07 ISSUE AG −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 1 0.25 (0.010) M Y M 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− H 0.10 (0.004) D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* STYLE 12: PIN 1. 2. 3. 4. 5. 6. 7. 8. 1.52 0.060 7.0 0.275 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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