ONSEMI MJE127

Order this document
by MF122/D
SEMICONDUCTOR TECHNICAL DATA
For Isolated Package Applications
Designed for general–purpose amplifiers and switching applications, where the
mounting surface of the device is required to be electrically isolated from the heatsink
or chassis.
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COMPLEMENTARY
SILICON
POWER DARLINGTONS
5 AMPERES
100 VOLTS
30 WATTS
Electrically Similar to the Popular TIP122 and TIP127
100 VCEO(sus)
5 A Rated Collector Current
No Isolating Washers Required
Reduced System Cost
High DC Current Gain — 2000 (Min) @ IC = 3 Adc
UL Recognized, File #E69369, to 3500 VRMS Isolation
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CASE 221D–02
TO–220 TYPE
MAXIMUM RATINGS
Rating
Collector–Emitter Voltage
Symbol
Value
Unit
VCEO
100
Vdc
Collector–Base Voltage
VCB
100
Vdc
Emitter–Base Voltage
VEB
5
Vdc
VISOL
4500
3500
1500
VRMS
Collector Current — Continuous
Peak
IC
5
8
Adc
Base Current
IB
0.12
Adc
Total Power Dissipation* @ TC = 25_C
Derate above 25_C
PD
30
0.24
Watts
W/_C
Total Power Dissipation @ TA = 25_C
Derate above 25_C
PD
2
0.016
Watts
W/_C
TJ, Tstg
– 65 to + 150
IC
Symbol
Max
Unit
Thermal Resistance, Junction to Ambient
RθJA
62.5
_C/W
Thermal Resistance, Junction to Case*
RθJC
4.1
_C/W
TL
260
_C
RMS Isolation Voltage (1)
(for 1 sec, R.H. < 30%,
TA = 25_C)
Test No. 1 Per Fig. 14
Test No. 2 Per Fig. 15
Test No. 3 Per Fig. 16
Operating and Storage Junction Temperature Range
THERMAL CHARACTERISTICS
Characteristic
Lead Temperature for Soldering Purpose
* Measurement made with thermocouple contacting the bottom insulated mounting surface (in a location beneath the die), the device mounted on
a heatsink with thermal grease and a mounting torque of ≥ 6 in. lbs.
(1) Proper strike and creepage distance must be provided.
 Motorola, Inc. 1995
Motorola Bipolar Power Transistor Device Data
1
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v
v
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
VCEO(sus)
100
—
Vdc
Collector Cutoff Current
(VCE = 50 Vdc, IB = 0)
ICEO
—
10
µAdc
Collector Cutoff Current
(VCB = 100 Vdc, IE = 0)
ICBO
—
10
µAdc
Emitter Cutoff Current (VBE = 5 Vdc, IC = 0)
IEBO
—
2
mAdc
hFE
1000
2000
—
—
—
Collector–Emitter Saturation Voltage (IC = 3 Adc, IB = 12 mAdc)
Collector–Emitter Saturation Voltage (IC = 5 Adc, IB = 20 mAdc)
VCE(sat)
—
—
2
3.5
Vdc
Base–Emitter On Voltage (IC = 3 Adc, VCE = 3 Vdc)
VBE(on)
—
2.5
Vdc
hfe
4
—
—
Cob
—
—
300
200
pF
OFF CHARACTERISTICS
Collector–Emitter Sustaining Voltage (1)
(IC = 100 mAdc, IB = 0)
ON CHARACTERISTICS (1)
DC Current Gain (IC = 0.5 Adc, VCE = 3 Vdc)
DC Current Gain (IC = 3 Adc, VCE = 3 Vdc)
DYNAMIC CHARACTERISTICS
Small–Signal Current Gain (IC = 3 Adc, VCE = 4 Vdc, f = 1 MHz)
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
(1) Pulse Test: Pulse Width
MJF127
MJF122
300 µs, Duty Cycle
2%.
5
RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
D1, MUST BE FAST RECOVERY TYPES, e.g.,
1N5825 USED ABOVE IB ≈ 100 mA
MSD6100 USED BELOW IB ≈ 100 mA
51
0
25 µs
tr, tf ≤ 10 ns
DUTY CYCLE = 1%
D1
≈8k
≈ 120
FOR td AND tr, D1 IS DISCONNECTED
AND V2 = 0
FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.
tf
1
0.7
0.5
0.3
0.2
+4 V
Figure 1. Switching Times Test Circuit
2
SCOPE
RB
V1
APPROX.
–12 V
2
t, TIME ( µs)
V2
APPROX.
+8 V
RC
TUT
ts
3
VCC
– 30 V
0.1
0.07
0.05
0.1
tr
VCC = 30 V
IC/IB = 250
IB1 = IB2
TJ = 25°C
0.2
td @ VBE(off) = 0 V
PNP
NPN
3
0.5 0.7 1
2
0.3
IC, COLLECTOR CURRENT (AMP)
5
7
Figure 2. Typical Switching Times
Motorola Bipolar Power Transistor Device Data
10
PD, POWER DISSIPATION (WATTS)
TA TC
4 80
3 60
TC
2 40
TA
1 20
0
0
20
40
60
80
100
120
140
160
T, TEMPERATURE (°C)
Figure 3. Maximum Power Derating
1
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
0.5
0.3
0.2
0.1
SINGLE PULSE
RθJC(t) = r(t) RθJC
TJ(pk) – TC = P(pk) RθJC(t)
0.05
0.03
0.02
0.01
0.1
0.2 0.3
0.5
1
2
3
5
20 30
50
t, TIME (ms)
10
100
200 300
500
1K
2K 3K
5K
10K
Figure 4. Thermal Response
IC, COLLECTOR CURRENT (AMPS)
10
100 µs
5
3
1 ms
TJ = 150°C
2
dc
5 ms
1
CURRENT LIMIT
SECONDARY BREAKDOWN
LIMIT
THERMAL LIMIT @
TC = 25°C (SINGLE PULSE)
0.5
0.3
0.2
0.1
1
10
5
20 30
2
3
50
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
There are two limitations on the power handling ability of a
transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 5 is based on T J(pk) = 150_C; TC is
variable depending on conditions. Secondary breakdown
pulse limits are valid for duty cycles to 10% provided T J(pk)
< 150_C. TJ(pk) may be calculated from the data in Figure 4.
At high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by secondary breakdown.
100
Figure 5. Maximum Forward Bias
Safe Operating Area
Motorola Bipolar Power Transistor Device Data
3
300
5000
3000
2000
200
TJ = 25°C
C, CAPACITANCE (pF)
hfe , SMALL–SIGNAL CURRENT GAIN
10,000
1000
500
300
200
TC = 25°C
VCE = 4 Vdc
IC = 3 Adc
100
50
30
20
10
Cob
100
Cib
70
50
PNP
NPN
PNP
NPN
1
2
5
10
20
50 100
f, FREQUENCY (kHz)
200
30
0.1
500 1000
0.2
2
10
20
0.5
1
5
VR, REVERSE VOLTAGE (VOLTS)
Figure 6. Typical Small–Signal Current Gain
Figure 7. Typical Capacitance
NPN
MJF122
PNP
MJF127
20,000
VCE = 4 V
10,000
5000
hFE , DC CURRENT GAIN
10,000
hFE , DC CURRENT GAIN
100
20,000
VCE = 4 V
TJ = 150°C
3000
2000
25°C
1000
– 55°C
500
300
200
50
0.1
0.2
0.5 0.7
0.3
1
3
2
5
7
7000
5000
3000
2000
1000
700
500
300
200
0.1
10
TJ = 150°C
25°C
– 55°C
0.2
0.3
0.5 0.7
1
2
3
5
7
10
IC, COLLECTOR CURRENT (AMP)
IC, COLLECTOR CURRENT (AMP)
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 8. Typical DC Current Gain
3
TJ = 25°C
2.6
IC = 2 A
4A
6A
2.2
1.8
1.4
1
0.3
0.5 0.7
1
2
3
5
7
10
20
30
3
TJ = 25°C
2.6
IC = 2 A
6A
4A
2.2
1.8
1.4
1
0.3
0.5 0.7
1
2
3
5
7
10
20
IB, BASE CURRENT (mA)
IB, BASE CURRENT (mA)
Figure 9. Typical Collector Saturation Region
4
Motorola Bipolar Power Transistor Device Data
30
NPN
MJF122
PNP
MJF127
3
3
TJ = 25°C
TJ = 25°C
2.5
V, VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
2.5
2
1.5
VBE(sat) @ IC/IB = 250
VBE @ VCE = 4 V
1
0.5
0.1
2
1.5
VBE @ VCE = 4 V
VBE(sat) @ IC/IB = 250
1
VCE(sat) @ IC/IB = 250
VCE(sat) @ IC/IB = 250
0.5
0.2 0.3
0.5 0.7
2
1
3
5
7
0.1
10
0.2 0.3
IC, COLLECTOR CURRENT (AMP)
0.5 0.7
1
2
3
5
7
10
7
10
IC, COLLECTOR CURRENT (AMP)
Figure 10. Typical “On” Voltages
+5
+4
θV, TEMPERATURE COEFFICIENTS (mV/°C)
θV, TEMPERATURE COEFFICIENT (mV°C)
+5
*IC/IB ≤ hFE 3
+3
25°C to 150°C
+2
– 55°C to 25°C
+1
0
–1
*θVC FOR VCE(sat)
–2
25°C to 150°C
–3
–4
–5
0.1
θVB FOR VBE
0.2 0.3
0.5
– 55°C to 25°C
0.7
1
2
3
5
7
10
+4
*IC/IB ≤ hFE 3
+3
25°C to 150°C
+2
+1
0
–1
*θVC FOR VCE(sat)
–2
–3
–4
–5
0.1
IC, COLLECTOR CURRENT (AMP)
– 55°C to 25°C
θVB FOR VBE
– 55°C to 25°C
25°C to 150°C
0.2 0.3
0.5
1
2 3
IC, COLLECTOR CURRENT (AMP)
5
Figure 11. Typical Temperature Coefficients
105
105
FORWARD
REVERSE
IC, COLLECTOR CURRENT ( µ A)
IC, COLLECTOR CURRENT ( µ A)
REVERSE
104
VCE = 30 V
103
102
TJ = 150°C
101
100
100°C
25°C
10–1
– 0.6 – 0.4 – 0.2
0
+ 0.2
+ 0.4 + 0.6 + 0.8
+1
VBE, BASE–EMITTER VOLTAGE (VOLTS)
+ 1.2 + 1.4
FORWARD
104
VCE = 30 V
103
102
101
TJ = 150°C
100°C
100
25°C
10–1
+ 0.6 + 0.4 + 0.2
0
– 0.2 – 0.4 – 0.6 – 0.8
–1
– 1.2 – 1.4
VBE, BASE–EMITTER VOLTAGE (VOLTS)
Figure 12. Typical Collector Cut–Off Region
Motorola Bipolar Power Transistor Device Data
5
NPN
MJF122
PNP
MJF127
COLLECTOR
COLLECTOR
BASE
BASE
≈8k
≈ 120
≈8k
EMITTER
≈ 120
EMITTER
Figure 13. Darlington Schematic
TEST CONDITIONS FOR ISOLATION TESTS*
CLIP
MOUNTED
FULLY ISOLATED
PACKAGE
CLIP
LEADS
HEATSINK
MOUNTED
FULLY ISOLATED
PACKAGE
MOUNTED
FULLY ISOLATED
PACKAGE
0.107” MIN
LEADS
0.107” MIN
LEADS
HEATSINK
HEATSINK
0.110” MIN
Figure 14. Clip Mounting Position
for Isolation Test Number 1
Figure 15. Clip Mounting Position
for Isolation Test Number 2
Figure 16. Screw Mounting Position
for Isolation Test Number 3
* Measurement made between leads and heatsink with all leads shorted together
MOUNTING INFORMATION
4–40 SCREW
CLIP
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
HEATSINK
NUT
Figure 17. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw
torque of 6 to 8 in . lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a constant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4–40 screw, without washers, and applying a torque in excess of 20 in . lbs will
cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
Additional tests on slotted 4–40 screws indicate that the screw slot fails between 15 to 20 in . lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, Motorola does not recommend exceeding 10
in . lbs of mounting torque under any mounting conditions.
** For more information about mounting power semiconductors see Application Note AN1040.
6
Motorola Bipolar Power Transistor Device Data
PACKAGE DIMENSIONS
–T–
–B–
F
SEATING
PLANE
C
S
Q
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
U
A
1 2 3
H
–Y–
K
G
N
L
D
J
R
3 PL
0.25 (0.010)
M
B
M
Y
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
U
INCHES
MIN
MAX
0.621
0.629
0.394
0.402
0.181
0.189
0.026
0.034
0.121
0.129
0.100 BSC
0.123
0.129
0.018
0.025
0.500
0.562
0.045
0.060
0.200 BSC
0.126
0.134
0.107
0.111
0.096
0.104
0.259
0.267
MILLIMETERS
MIN
MAX
15.78
15.97
10.01
10.21
4.60
4.80
0.67
0.86
3.08
3.27
2.54 BSC
3.13
3.27
0.46
0.64
12.70
14.27
1.14
1.52
5.08 BSC
3.21
3.40
2.72
2.81
2.44
2.64
6.58
6.78
STYLE 2:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
CASE 221D–02
TO–220 TYPE
ISSUE D
Motorola Bipolar Power Transistor Device Data
7
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HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
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Motorola Bipolar Power Transistor Device Data
*MJF122/D*
MJF122/D