ONSEMI NTMFS4852NT3G

NTMFS4852N
Advance Information
Power MOSFET
30 V, 155 A, Single N−Channel, SO−8 FL
Features
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These are Pb−Free Device
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V(BR)DSS
Applications
•
•
•
•
Refer to Application Note AND8195/D
CPU Power Delivery
DC−DC Converters
Low Side Switching
RDS(ON) MAX
2.1 mW @ 10 V
30 V
D (5,6)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
25
A
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.31
W
Continuous Drain
Current RqJA v
10 sec
TA = 25°C
ID
40
A
Power Dissipation
RqJA, t v 10 sec
Continuous Drain
Current RqJA
(Note 2)
TA = 85°C
Steady
State
TA = 25°C
PD
5.95
W
TA = 25°C
ID
16
A
TA = 85°C
11
TA = 25°C
PD
0.90
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
ID
155
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
86.2
W
TA = 25°C
IDM
310
A
TA = 25°C
IDmaxpkg
100
A
TJ,
TSTG
−55 to
+150
°C
TC = 85°C
tp=10ms
Current limited by package
Operating Junction and Storage
Temperature
Source Current (Body Diode)
112
IS
72
A
Drain to Source dV/dt
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 V, VGS = 10 V,
IL = 49 Apk, L = 0.3 mH, RG = 25 W)
EAS
360
mJ
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
© Semiconductor Components Industries, LLC, 2009
July, 2009 − Rev. P1
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAM
29
Power Dissipation
RqJA (Note 2)
Pulsed Drain
Current
G (4)
18
TA = 85°C
155 A
3.1 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
ID MAX
1
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
S
S
S
G
4852N
AYWWG
G
D
D
D
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4852NT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4852NT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Publication Order Number:
NTMFS4852N/D
NTMFS4852N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
1.45
Junction−to−Ambient – Steady State (Note 1)
RqJA
54
Junction−to−Ambient – Steady State (Note 2)
RqJA
138.7
Junction−to−Ambient − t v 10 sec
RqJA
21
Unit
°C/W
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
17
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25°C
1
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
VGS(TH)/TJ
RDS(on)
1.8
5.9
VGS = 10 V
VGS = 4.5 V
Forward Transconductance
1.45
gFS
ID = 30 A
1.6
ID = 15 A
1.6
ID = 30 A
2.4
ID = 15 A
2.4
VDS = 1.5 V, ID = 15 A
mV/°C
2.1
3.1
47
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
427
Total Gate Charge
QG(TOT)
34.3
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
4970
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
970
4.2
13
pF
48
nC
11.3
QG(TOT)
VGS = 10 V, VDS = 15 V,
ID = 30 A
71.3
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
21.1
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
25.6
35
12
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
ns
NTMFS4852N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
12
tr
td(OFF)
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
19
ns
50
7.7
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.8
TJ = 125°C
0.61
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 30 A
1.2
V
35
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
17
ns
18
QRR
28.6
nC
Source Inductance
LS
0.65
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
TA = 25°C
0.005
1.84
1.0
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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3
2.0
W
NTMFS4852N
TYPICAL CHARACTERISTICS
160
3.4 V
100
80
3.2 V
60
40
3.0 V
20
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
3.6 V
120
120
100
80
60
1
2
3
0
2
2.5
3
3.5
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.009
0.007
0.005
0.003
3
4
5
6
7
8
9
VGS, GATE−TO−SOURCE VOLTAGE (V)
10
4
0.005
TJ = 25°C
0.004
VGS = 4.5 V
0.003
VGS = 10 V
0.002
0.001
20 30 40 50 60 70 80 90 100 110 120 130 140 150
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2
10,000
VGS = 0 V
ID = 30 A
VGS = 10 V
1.5
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
1.5
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.011
1.75
TJ = −55°C
1
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
ID = 30 A
TJ = 25°C
2
TJ = 25°C
20
4
0.013
0.001
TJ = 125°C
40
2.8 V
2.6 V
0
VDS ≥ 10 V
140
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
140
160
TJ = 25°C
VGS = 10 V to 3.8 V
TJ = 150°C
1000
1.25
1
0.75
0.5
TJ = 125°C
100
0.25
0
−50
−25
0
25
50
75
100
125
150
10
5
TJ, JUNCTION TEMPERATURE (°C)
10
15
20
25
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
30
NTMFS4852N
TYPICAL CHARACTERISTICS
C, CAPACITANCE (pF)
TJ = 25°C
VGS = 0 V
Ciss
5000
VGS, GATE−TO−SOURCE VOLTAGE (V)
6000
4000
3000
2000
Coss
1000
0
Crss
0
5
10
15
20
25
30
11
10
QT
9
8
VGS
7
6
5
Qgs
4
Qgd
VDD = 15 V
VGS = 10 V
ID = 30 A
TJ = 25°C
3
2
1
0
0
10
20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
IS, SOURCE CURRENT (A)
tf
100
t, TIME (ns)
50
60
70
80
30
td(off)
VDD = 15 V
VGS = 10 V
ID = 15 A
tr
td(on)
10
1
10
VGS = 0 V
TJ = 25°C
25
20
15
10
5
0
0.4
100
0.5
0.6
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
10 ms
100
100 ms
1 ms
10
10 ms
1
0.1
0.01
0.01
VGS = 30 V
Single Pulse
TC = 25°C
RDS(on) Limit
Thermal Limit
Package Limit
0.1
dc
1
10
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
400
1000
ID, DRAIN CURRENT (A)
40
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
1
30
Qg, TOTAL GATE CHARGE (nC)
100
ID = 49 A
300
200
100
0
25
50
75
100
125
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
150
NTMFS4852N
TYPICAL CHARACTERISTICS
100
Duty Cycle = 50%
R(t) (°C/W)
10
1
20%
10%
5%
2%
1%
0.1
0.01
0.000001
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
PULSE TIME (sec)
Figure 13. Thermal Response
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6
1
10
100
1000
NTMFS4852N
PACKAGE DIMENSIONS
DFN6 5x6, 1.27P (SO8 FL)
CASE 488AA−01
ISSUE C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
2
A
B
D1
6
2X
0.20 C
5
4X
E1
1
2
3
q
E
2
c
A1
4
TOP VIEW
C
3X
e
0.10 C
SEATING
PLANE
DETAIL A
A
0.10 C
SIDE VIEW
8X
C A B
0.05
c
3X
4X
1.270
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
e/2
L
1
4
K
0.750
4X
1.000
0.965
1.330
2X
0.905
2X
E2
L1
6
G
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
−−−
4.22
6.15 BSC
5.50
5.80
6.10
3.45
−−−
4.30
1.27 BSC
0.51
0.61
0.71
0.51
−−−
−−−
0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
−−−
12 _
SOLDERING FOOTPRINT*
DETAIL A
b
0.10
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
0.495
M
4.530
3.200
0.475
5
D2
2X
1.530
BOTTOM VIEW
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NTMFS4852N/D