ONSEMI NTMSD3P102R2

NTMSD3P102R2
FETKY
P−Channel Enhancement−Mode
Power MOSFET and Schottky Diode
Dual SO−8 Package
Features
• High Efficiency Components in a Single SO−8 Package
• High Density Power MOSFET with Low RDS(on),
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Schottky Diode with Low VF
MOSFET
−3.05 AMPERES
−20 VOLTS
0.085 @ VGS = −10 V
• Independent Pin−Outs for MOSFET and Schottky Die
Allowing for Flexibility in Application Use
• Less Component Placement for Board Space Savings
• SO−8 Surface Mount Package,
Mounting Information for SO−8 Package Provided
Applications
• DC−DC Converters
• Low Voltage Motor Control
• Power Management in Portable and Battery−Powered Products, i.e.:
SCHOTTKY DIODE
1.0 AMPERES
20 VOLTS
470 mV @ IF = 1.0 A
Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones
MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
−20
V
Gate−to−Source Voltage − Continuous
VGS
20
V
8
Thermal Resistance −
Junction−to−Ambient (Note 1.)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Pulsed Drain Current (Note 4.)
RθJA
PD
ID
ID
IDM
171
0.73
−2.34
−1.87
−8.0
°C/W
W
A
A
A
Thermal Resistance −
Junction−to−Ambient (Note 2.)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Pulsed Drain Current (Note 4.)
RθJA
PD
ID
ID
IDM
100
1.25
−3.05
−2.44
−12
°C/W
W
A
A
A
Thermal Resistance −
Junction−to−Ambient (Note 3.)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Pulsed Drain Current (Note 4.)
RθJA
PD
ID
ID
IDM
62.5
2.0
−3.86
−3.10
−15
°C/W
W
A
A
A
TJ, Tstg
−55 to
+150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C (VDD =
−20 Vdc, VGS = −4.5 Vdc, Peak IL =
−7.5 Apk, L = 5 mH, RG = 25 Ω)
EAS
140
mJ
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
TL
260
°C
Operating and Storage
Temperature Range
December, 2003 − Rev. 1
A
1
S
1
G
SO−8
CASE 751
STYLE 18
1
8
2
7
6
3
4
5
C
C
D
D
TOP VIEW
MARKING DIAGRAM
& PIN ASSIGNMENTS
Anode
Anode
Source
Gate
1
8
2
7
3
E3P102
LYWW
4
6
5
Cathode
Cathode
Drain
Drain
(Top View)
E3P102
L
Y
WW
= Device Code
= Assembly Location
= Year
= Work Week
ORDERING INFORMATION
Device
1. Minimum FR−4 or G−10 PCB, Steady State.
2. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided),
Steady State.
3. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided),
t ≤ 10 seconds.
4. Pulse Test: Pulse Width = 300 s, Duty Cycle = 2%.
 Semiconductor Components Industries, LLC, 2003
A
NTMSD3P102R2
Package
Shipping†
SO−8
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTMSD3P102R2/D
NTMSD3P102R2
SCHOTTKY MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Peak Repetitive Reverse Voltage
DC Blocking Voltage
VRRM
VR
20
V
Thermal Resistance − Junction−to−Ambient (Note 5.)
RθJA
204
°C/W
Thermal Resistance − Junction−to−Ambient (Note 6.)
RθJA
122
°C/W
Thermal Resistance − Junction−to−Ambient (Note 7.)
RθJA
83
°C/W
IO
1.0
A
Peak Repetitive Forward Current
(Note 7.) (Rated VR, Square Wave, 20 kHz, TA = 105°C)
IFRM
2.0
A
Non−Repetitive Peak Surge Current (Note 7.)
(Surge Applied at Rated Load Conditions, Half−Wave, Single Phase, 60 Hz)
IFSM
20
A
Average Forward Current (Note 7.)
(Rated VR, TA = 100°C)
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 8.)
Characteristic
Symbol
Min
Typ
Max
−20
−
−
−30
−
−
−
−
−
−
−1.0
−25
−
−
−100
−
−
100
−1.0
−
−1.7
3.6
−2.5
−
−
−
0.063
0.090
0.085
0.125
−
5.0
−
Ciss
−
518
750
Coss
−
190
350
Crss
−
70
135
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(VGS = 0 Vdc, ID = −250 µAdc)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = −20 Vdc, VGS = 0 Vdc, TJ = 25°C)
(VDS = −20 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS
Gate−Body Leakage Current
(VGS = −20 Vdc, VDS = 0 Vdc)
IGSS
Gate−Body Leakage Current
(VGS = +20 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
µAdc
nAdc
nAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = −250 µAdc)
Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−State Resistance
(VGS = −10 Vdc, ID = −3.05 Adc)
(VGS = −4.5 Vdc, ID = −1.5 Adc)
RDS(on)
Forward Transconductance
(VDS = −15 Vdc, ID = −3.05 Adc)
Vdc
Ω
gFS
Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = −16
16 Vdc,
Vd VGS = 0 Vdc,
Vd
f = 1.0 MHz)
Reverse Transfer Capacitance
5.
6.
7.
8.
Minimum FR−4 or G−10 PCB, Steady State.
Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), Steady State.
Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t ≤ 10 seconds.
Handling precautions to protect against electrostatic discharge is mandatory.
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2
pF
NTMSD3P102R2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 9.)
Characteristic
Symbol
Min
Typ
Max
Unit
td(on)
−
12
22
ns
tr
−
16
30
td(off)
−
45
80
tf
−
45
80
td(on)
−
16
−
tr
−
42
−
td(off)
−
32
−
tf
−
35
−
Qtot
−
16
25
SWITCHING CHARACTERISTICS (Notes 10. & 11.)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
(VDD = −20 Vdc, ID = −3.05 Adc,
10 Vdc
VGS = −10
Vdc,
RG = 6.0 Ω)
Fall Time
Turn−On Delay Time
(VDD = −20 Vdc, ID = −1.5 Adc,
VGS = −4.5
4 5 Vdc
Vdc,
RG = 6.0 Ω)
Rise Time
Turn−Off Delay Time
Fall Time
Total Gate Charge
(VDS = −20 Vdc,
VGS = −10 Vdc,
ID = −3.05
3 05 Adc)
Ad )
Gate−Source Charge
Gate−Drain Charge
ns
nC
Qgs
−
2.0
−
Qgd
−
4.5
−
VSD
−
−
−0.96
−0.78
−1.25
−
Vdc
trr
−
34
−
ns
ta
−
18
−
tb
−
16
−
QRR
−
0.03
−
BODY−DRAIN DIODE RATINGS (Note 10.)
Diode Forward On−Voltage
(IS = −3.05 Adc, VGS = 0 Vdc)
(IS = −3.05 Adc, VGS = 0 Vdc, TJ = 125°C)
Reverse Recovery Time
(IS = −3.05
3 05 Adc,
Ad VGS = 0 Vdc,
Vd
dIS/dt = 100 A/µs)
Reverse Recovery Stored Charge
µC
SCHOTTKY RECTIFIER ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 10.)
VF
g
Maximum Instantaneous Forward Voltage
IF = 1.0
1 0 Adc
Ad
IF = 2.0 Adc
IR
Maximum Instantaneous Reverse Current
Vd
VR = 20 Vdc
Maximum Voltage Rate of Change
VR = 20 Vdc
dV/dt
9. Handling precautions to protect against electrostatic discharge is mandatory.
10. Indicates Pulse Test: Pulse Width = 300 µs max, Duty Cycle = 2%.
11. Switching characteristics are independent of operating junction temperature.
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3
TJ = 25°C
TJ = 125°C
0.47
0.58
0.39
0.53
TJ = 25°C
TJ = 125°C
0.05
10
10,000
Volts
mA
V/s
NTMSD3P102R2
TYPICAL MOSFET ELECTRICAL CHARACTERISTICS
−ID, DRAIN CURRENT (AMPS)
VGS = −4 V
VGS = −4.6 V
VGS = −6 V
4
VGS = −4.8 V
TJ = 25°C
VGS = −3.6 V
VGS = −2.8 V
VGS = −3.2 V
VGS = −5 V
3
2
VGS = −2.6 V
VGS = −3 V
1
0
0.25
0.5
0.75
1
1.25
1.5
1.75
TJ = 25°C
2
TJ = −55°C
1
1
2
3
4
5
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.6
0.5
0.4
0.3
0.2
0.1
5
4
6
7
8
0.7
ID = −1.5 A
TJ = 25°C
0.6
0.5
0.4
0.3
0.2
0.1
0
2
4
3
5
6
7
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Gate−to−Source
Voltage
0.25
TJ = 25°C
0.2
VGS = −4.5 V
0.15
VGS = −10 V
0.1
0.05
1
TJ = 100°C
3
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
ID = −3.05 A
TJ = 25°C
3
4
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.7
0
VDS > = −10 V
5
0
2
RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω)
VGS = −4.4 V
VGS = −8 V
5
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω)
6
VGS = −10 V
2
3
4
5
6
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
−ID, DRAIN CURRENT (AMPS)
6
1.6
1.4
ID = −3.05 A
VGS = −10 V
1.2
1
0.8
0.6
−50
−25
0
25
50
75
100
125
−ID, DRAIN CURRENT (AMPS)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance vs. Drain Current and
Gate Voltage
Figure 6. On Resistance Variation with
Temperature
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4
150
NTMSD3P102R2
10000
VDS = 0 V
1200
C, CAPACITANCE (pF)
IDSS, LEAKAGE (nA)
VGS = 0 V
TJ = 150°C
1000
TJ = 125°C
100
VGS = 0 V
Ciss
1000
800
Ciss
Crss
600
Coss
400
Crss
200
TJ = 25°C
0
10
10
4
6
8
10
12
14
16
18
20
0
5
10
−VDS
15
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (VOLTS)
Figure 7. Drain−to−Source Leakage Current
vs. Voltage
Figure 8. Capacitance Variation
20
24 1000
12
QT
10
VDS = −20 V
ID = −3.05 A
VGS = −10 V
20
VDS
8
16
VGS
12
6
Q1
4
tf
tr
td(on)
4
ID = −3.05 A
TJ = 25°C
0
2
4
6
10
8
12
0
16
14
1
10
1
100
Qg, TOTAL GATE CHARGE (nC)
RG, GATE RESISTANCE (Ω)
Figure 9. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 10. Resistive Switching Time Variation
vs. Gate Resistance
3
100
tr
tf
1
10
IS, SOURCE CURRENT (AMPS)
VDS = −20 V
ID = −1.5 A
VGS = −4.5 V
10
td(off)
10
8
Q2
2
0
100
1000
t, TIME (ns)
5
−VGS
t, TIME (ns)
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
2
td(off)
td(on)
100
VGS = 0 V
TJ = 25°C
2.5
2
1.5
1
0.5
0
0.2
0.4
0.6
0.8
1
RG, GATE RESISTANCE (Ω)
−VSD, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Resistive Switching Time Variation
vs. Gate Resistance
Figure 12. Diode Forward Voltage vs. Current
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5
1.2
NTMSD3P102R2
di/dt
IS
trr
ta
tb
TIME
0.25 IS
tp
IS
Figure 13. Diode Reverse Recovery Waveform
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESPONSE
1.0
D = 0.5
0.2
0.1
0.1
Normalized to RθJA at Steady State (1″ pad)
Chip
Junction 2.32 Ω
18.5 Ω
50.9 Ω
37.1 Ω
56.8 Ω
0.05
0.02
0.0014 F
0.01
0.0073 F
0.022 F
0.105 F
0.484 F
1E−02
3.68 F
Ambient
Single Pulse
0.01
1E−03
24.4 Ω
1E−01
1E+00
1E+01
t, TIME (s)
Figure 14. FET Thermal Response
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6
1E+02
1E+03
NTMSD3P102R2
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
10
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
10
TJ = 125°C
1.0
85°C
25°C
−40°
C
0.1
TJ = 125°C
85°C
1.0
25°C
0.1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
0
1.0
0.2
VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
85°C
1E−4
1E−5
25°C
1E−6
1E−7
15
20
IR, MAXIMUM REVERSE CURRENT (AMPS)
IR , REVERSE CURRENT (AMPS)
TJ = 125°C
1E−3
10
1E−3
1E−4
25°C
1E−5
1E−6
0
5.0
IO, AVERAGE FORWARD CURRENT (AMPS)
C, CAPACITANCE (pF)
15
10
20
Figure 18. Maximum Reverse Current
TYPICAL CAPACITANCE AT 0 V = 170 pF
100
10
15
1.4
VR, REVERSE VOLTAGE (VOLTS)
1000
10
1.2
TJ = 125°C
1E−2
Figure 17. Typical Reverse Current
5.0
1.0
1E−1
VR, REVERSE VOLTAGE (VOLTS)
0
0.8
Figure 16. Maximum Forward Voltage
1E−2
5.0
0.6
VF, MAXIMUM INSTANTANEOUS
FORWARD VOLTAGE (VOLTS)
Figure 15. Typical Forward Voltage
0
0.4
20
1.6
dc
FREQ = 20 kHz
1.4
1.2
SQUARE WAVE
1.0
Ipk/Io = 0.8
Ipk/Io = 5.0
0.6
Ipk/Io = 10
0.4
Ipk/Io = 20
0.2
0
0
VR, REVERSE VOLTAGE (VOLTS)
20
40
60
80
100
120
TA, AMBIENT TEMPERATURE (°C)
Figure 19. Typical Capacitance
Figure 20. Current Derating
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7
140
160
NTMSD3P102R2
PFO, AVERAGE POWER DISSIPATION (WATTS)
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
0.7
0.6
Ipk/Io = 0.5
dc
SQUARE
WAVE
Ipk/Io = 5.0
0.4
Ipk/Io = 10
Ipk/Io = 20
0.3
0.2
0.1
0
0
0.5
1.0
1.5
2.0
IO, AVERAGE FORWARD CURRENT (AMPS)
Figure 21. Forward Power Dissipation
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1.0
D = 0.5
0.2
0.1
0.1
NORMALIZED TO RJA AT STEADY STATE (1″ PAD)
0.05
0.02
0.0031 CHIP
JUNCTION 0.0014 F
0.01
0.01
0.0154 0.1521 0.4575 0.3719 0.0082 F
0.1052 F
SINGLE PULSE
2.7041 F 158.64 F
AMBIENT
0.001
1.0E−05
1.0E−04
1.0E−03
1.0E−02
1.0E−01
t, TIME (s)
1.0E+00
Figure 22. Schottky Thermal Response
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8
1.0E+01
1.0E+02
1.0E+03
NTMSD3P102R2
PACKAGE DIMENSIONS
SO−8
CASE 751−07
ISSUE AA
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
−X−
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
−Y−
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
STYLE 18:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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9
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
ANODE
ANODE
SOURCE
GATE
DRAIN
DRAIN
CATHODE
CATHODE
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
NTMSD3P102R2
FETKY is a trademark of International Rectifier Corporation.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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For additional information, please contact your
local Sales Representative.
NTMSD3P102R2/D