HD74HC137 3-to-8-line Decoder/Demultiplexer with Address Latch REJ03D0569-0200 (Previous ADE-205-443) Rev.2.00 Oct 11, 2005 Description The HD74HC137 implements a three-to-eight line decoder with latches on the three address inputs. When GL goes from low to high, the address present at the select inputs (A, B and C) is stored in the latches. As long as GL remains high no address changes will be recognized. Output enable controls, G1 and G2, control the state of the outputs independently of the select or latch-enable inputs. All of the outputs are high unless G1 is high and G2 is low. The HD74HC137 is ideally suited for the implementation of glitchfree decoders in stored-address applications in bus oriented systems. Features • • • • • • High Speed Operation: tpd (A, B, C to Y) = 16.5 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 V to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Ordering Information Part Name Package Type HD74HC137P DILP-16 pin HD74HC137FPEL SOP-16 pin (JEITA) HD74HC137RPEL SOP-16 pin (JEDEC) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DH-B (FP-16DAV) PRSP0016DG-A (FP-16DNV) Package Abbreviation P — FP EL (2,000 pcs/reel) RP EL (2,500 pcs/reel) Note: Please consult the sales office for the above package availability. Rev.2.00, Oct 11, 2005 page 1 of 9 Taping Abbreviation (Quantity) HD74HC137 Function Table Inputs GL Enable G1 G2 X X L L L L L L L L H X L H H H H H H H H H H X L L L L L L L L L H: L: X: Outputs C Select B A Y0 X X L L L L H H H H X X X L L H H L L H H X X X L H L H L H L H X H H L H H H H H H H Y1 Y2 Y3 High level Low level Irrelevant Pin Arrangement 16 VCC A 1 B 2 B C 3 A Y0 15 Y0 C Y1 14 Y1 GL 4 GL Y2 13 Y2 G2 5 G2 Y3 12 Y3 G1 6 G1 Y4 11 Y4 Y7 7 Y7 Y5 10 Y5 Y6 GND 8 9 Y6 (Top view) Rev.2.00, Oct 11, 2005 page 2 of 9 Y4 Y5 Y6 H H H H H H H H H H H H H H H H H H L H H H H H H L H H H H H H L H H H H H H L H H H H H H L H H H H H H L H H H H H H Output Corresponding to stored address L; all Others. H Y7 H H H H H H H H H L HD74HC137 Logic Diagram Y0 A Y1 B Y2 Y3 Y4 C Y5 GL Y6 G2 Y7 G1 Absolute Maximum Ratings Item Supply voltage range Input voltage Output voltage Output current DC current drain per VCC, GND DC input diode current DC output diode current Power dissipation per package Storage temperature Symbol Rating Unit VCC VIN VOUT IOUT ICC, IGND IIK IOK PT Tstg –0.5 to +7.0 –0.5 to VCC + 0.5 –0.5 to VCC + 0.5 ±25 ±50 ±20 ±20 500 –65 to +150 V V V mA mA mA mA mW °C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Rev.2.00, Oct 11, 2005 page 3 of 9 HD74HC137 Recommended Operating Conditions Symbol Ratings Unit Supply voltage Input / Output voltage Item VCC VIN, VOUT 2 to 6 0 to VCC V V Operating temperature Ta –40 to 85 0 to 1000 °C 0 to 500 0 to 400 ns Input rise / fall time Note: *1 tr , tf Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Electrical Characteristics Ta = 25°C Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH VOL Ta = –40 to+85°C 2.0 Min 1.5 Typ — Max — Min 1.5 Max — 4.5 6.0 3.15 4.2 — — — — 3.15 4.2 — — 2.0 4.5 — — — — 0.5 1.35 — — 0.5 1.35 6.0 2.0 — 1.9 — 2.0 1.8 — — 1.9 1.8 — 4.5 6.0 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.5 6.0 4.18 5.68 — — — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 — — 0.0 — 0.1 0.26 — — 0.1 0.33 Unit Test Conditions V V V Vin = VIH or VIL IOH = –20 µA IOH = –4 mA IOH = –5.2 mA V Vin = VIH or VIL IOL = 20 µA IOL = 4 mA Input current Iin 6.0 6.0 — — — — 0.26 ±0.1 — — 0.33 ±1.0 IOL = 5.2 mA µA Vin = VCC or GND Quiescent supply current ICC 6.0 — — 4.0 — 40 µA Vin = VCC or GND, Iout = 0 µA Rev.2.00, Oct 11, 2005 page 4 of 9 HD74HC137 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Propagation delay time Symbol VCC (V) tPLH tPHL tPLH tPHL tPLH tPHl tPLH tPHL Pulse width tw Setup time tsu Hold time th Output rise/fall time Input capacitance tTLH, tTHL Cin Ta = –40 to +85°C Typ — 16 — — 17 — Max 170 34 29 240 48 41 Min — — — — — — Max 215 43 37 305 60 51 Unit 2.0 4.5 6.0 2.0 4.5 6.0 Min — — — — — — 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 — — — — — — — — — — 13 — — 14 — — 14 — 130 26 22 195 39 33 150 30 26 — — — — — — — — — 165 33 28 245 49 42 190 38 33 ns 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 — — — — — — — — — — 14 — — 17 — — 18 — 195 39 33 175 35 30 250 50 43 — — — — — — — — — 245 49 42 220 44 37 315 63 54 ns 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 — 80 16 14 100 20 17 50 10 9 — — — — — 7 — — 3 — — –3 — — 5 — 5 — — — — — — — — — 75 15 13 10 100 20 17 125 25 21 65 13 11 — — — — — — — — — — — — — 90 19 16 10 ns ns A, B or C to Y ns G2 to Y ns ns ns G1 to Y GL to Y ns ns A, B, C inputs ns A, B, C inputs ns pF Test Circuit Measurement point CL* Note: CL includes the probe and fig capacitance. Rev.2.00, Oct 11, 2005 page 5 of 9 Test Conditions HD74HC137 Waveforms • Waveform – 1 6ns 6ns Input A,B,C 90% 90% 50% 10% 10% VCC 90% 50% 10% 90% 10% tW tW tPLH 0V tPHL 90% 50% Output Y VOH 90% 50% 10% 10% tTLH VOL tTHL Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. • Waveform – 2 6ns 6ns G2 VCC 90% 50% 90% 50% 10% 10% tPHL 0V tPLH 90% 90% 50% 50% 10% Output Y 10% tTHL VOH VOL tTLH Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. • Waveform – 3 6ns 6ns 90% 50% G1 VCC 90% 50% 10% 10% tPHL tPLH 90% Output Y 0V 50% 10% tTHL 90% 50% 10% VOH VOL tTLH Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. Rev.2.00, Oct 11, 2005 page 6 of 9 HD74HC137 • Waveform – 4 6ns 6ns VCC 90% 50% 90% GL 50% 10% 50% 10% 0V tW tPHL tPLH 90% 50% Output Y VOH 90% 50% 10% 10% tTLH VOL tTHL Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. • Waveform – 5 tW Input A,B,C VCC 50% 50% 0V tsu th VCC GL 50% 0V Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. Rev.2.00, Oct 11, 2005 page 7 of 9 HD74HC137 Package Dimensions JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g D 9 E 16 1 8 b3 0.89 Z A1 A Reference Symbol L e Nom c e1 D 19.2 E 6.3 JEITA Package Code P-SOP16-3.95x9.9-1.27 RENESAS Code PRSP0016DG-A *1 Previous Code FP-16DNV 7.4 A1 0.51 b p 0.40 b 3 0.48 0.56 1.30 c 0.19 θ 0° e 2.29 0.25 0.31 2.54 2.79 15° 1.12 L 2.54 MASS[Typ.] 0.15g D NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F 16 20.32 5.06 Z ( Ni/Pd/Au plating ) Max 7.62 1 A θ bp e Dimension in Millimeters Min 9 c *2 Index mark HE E bp Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) Dimension in Millimeters Min Nom Max D 9.90 10.30 E 3.95 A2 1 Z 8 e *3 bp x A1 0.10 0.14 0.25 0.34 0.40 0.46 0.15 0.20 0.25 6.10 6.20 1.75 A M L1 bp b1 c A c A1 θ L y Detail F 1 θ 0° HE 5.80 1.27 e x 0.25 y 0.15 Z 0.635 0.40 L L Rev.2.00, Oct 11, 2005 page 8 of 9 8° 1 0.60 1.08 1.27 HD74HC137 JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV MASS[Typ.] 0.24g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. D F 16 9 c HE *2 E bp Index mark Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) 1 Z *3 bp Nom D 10.06 E 5.50 Max 10.5 A2 8 e Dimension in Millimeters Min x A1 M 0.00 0.10 0.20 0.34 0.40 0.46 0.15 0.20 0.25 7.80 8.00 2.20 A L1 bp b1 c A c A1 θ y L Detail F 1 θ 0° HE 7.50 1.27 e x 0.12 y 0.15 Z 0.80 0.50 L L Rev.2.00, Oct 11, 2005 page 9 of 9 8° 1 0.70 1.15 0.90 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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