FAIRCHILD FDZ371PZ

FDZ371PZ
tm
®
P-Channel 1.5 V Specified PowerTrench Thin WL-CSP MOSFET
-20 V, -3.7 A, 75 mΩ
Features
General Description
„ Max rDS(on) = 75 mΩ at VGS = -4.5 V, ID = -2.0 A
Designed on Fairchild's advanced 1.5 V PowerTrench® process
with state of the art "fine pitch" Thin WLCSP packaging process,
the FDZ371PZ minimizes both PCB space and rDS(on). This
advanced WLCSP MOSFET embodies a breakthrough in
packaging technology which enables the device to combine
excellent thermal transfer characteristics, ultra-low profile
packaging, low gate charge, and low rDS(on).
„ Max rDS(on) = 90 mΩ at VGS = -2.5 V, ID = -1.5 A
„ Max rDS(on) = 110 mΩ at VGS = -1.8 V, ID = -1.0 A
„ Max rDS(on) = 150 mΩ at VGS = -1.5 V, ID = -1.0 A
„ Occupies only 1.0 mm2 of PCB area.Less than 30% of the
area of 2 x 2 BGA
Applications
„ Ultra-thin package: less than 0.4 mm height when mounted to
PCB
„ Battery management
„ Load switch
„ HBM ESD protection level >4.4kV typical (Note 3)
„ Battery protection
„ RoHS Compliant
Pin 1
S
S
D
G
Pin 1
TOP
BOTTOM
WL-CSP 1.0X1.0 Thin
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
-Continuous
ID
TA = 25°C
(Note 1a)
-Pulsed
PD
TJ, TSTG
Ratings
-20
Units
V
±8
V
-3.7
-12
Power Dissipation
TA = 25°C
(Note 1a)
1.7
Power Dissipation
TA = 25°C
(Note 1b)
0.5
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
75
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
260
°C/W
Package Marking and Ordering Information
Device Marking
K
Device
FDZ371PZ
©2009 Fairchild Semiconductor Corporation
FDZ371PZ Rev.C
Package
WL-CSP 1.0X1.0 Thin
1
Reel Size
7”
Tape Width
8 mm
Quantity
5000 units
www.fairchildsemi.com
FDZ371PZ P-Channel 1.5 V Specified PowerTrench® Thin WL-CSP MOSFET
July 2009
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = -250 µA, VGS = 0 V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = -250 µA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = -16 V, VGS = 0 V
-1
µA
IGSS
Gate to Source Leakage Current
VGS = ±8 V, VDS = 0 V
±10
µA
-1.0
V
-20
V
22
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 µA
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = -250 µA, referenced to 25 °C
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
-0.35
-0.6
-4
mV/°C
VGS = -4.5 V, ID = -2.0 A
55
75
VGS = -2.5 V, ID = -1.5A
65
90
VGS = -1.8 V, ID = -1.0 A
80
110
VGS = -1.5 V, ID = -1.0 A
100
150
VGS = -4.5 V, ID = -2.0 A,
TJ =125°C
80
124
VDD = -5 V, ID = -3.3 A
14
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = -10 V, VGS = 0 V,
f = 1 MHz
750
1000
pF
110
145
pF
100
150
pF
Switching Characteristics
td(on)
Turn-On Delay Time
5.9
12
ns
tr
Rise Time
9.1
18
ns
td(off)
Turn-Off Delay Time
124
198
ns
tf
Fall Time
88
140
ns
Qg
Total Gate Charge
12
17
nC
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
VDD = -10 V, ID = -3.3 A,
VGS = -4.5 V, RGEN = 6 Ω
VGS = -4.5 V, VDD = -10 V,
ID = -3.3 A
1.1
nC
3.4
nC
Drain-Source Diode Characteristics
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -1.3 A
-1.1
(Note 2)
IF = -3.3 A, di/dt = 100 A/µs
A
-0.7
-1.2
V
61
98
ns
29
47
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 75 °C/W when mounted on
a 1 in2 pad of 2 oz copper.
b. 260 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection ESD. No gate overvoltage rating is implied.
©2009 Fairchild Semiconductor Corporation
FDZ371PZ Rev.C
2
www.fairchildsemi.com
FDZ371PZ P-Channel 1.5 V Specified PowerTrench® Thin WL-CSP MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
12
2.5
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = -3.5 V
VGS = - 4.5 V
-ID, DRAIN CURRENT (A)
VGS = - 3.0 V
9
VGS = -2.5 V
6
VGS = - 1.8 V
VGS = -1.5 V
3
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
0
0.0
0.5
1.0
1.5
2.0
VGS = -1.5 V
2.0
VGS = -1.8 V
1.5
VGS = -2.5 V
1.0
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
0
Figure 1. On-Region Characteristics
3
6
-ID, DRAIN CURRENT (A)
9
12
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6
400
ID = -2.0 A
VGS = -4.5 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
-75
-50
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = -4.5 V
0.5
2.5
-VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
300
ID = -2.0 A
200
TJ = 125 oC
100
TJ = 25 oC
0
1.0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
1.5
2.0
2.5
3.0
3.5
4.0
4.5
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
12
-IS, REVERSE DRAIN CURRENT (A)
10
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
-ID, DRAIN CURRENT (A)
VGS = -3.5 V
VGS = -3.0 V
9
VDS = -5 V
6
TJ = 150
oC
TJ = 25 oC
3
TJ = -55 oC
0
0.5
1.0
1.5
1
TJ = 150 oC
TJ = 25 oC
0.1
0.01
TJ = -55 oC
0.001
0.0
2.0
-VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2009 Fairchild Semiconductor Corporation
FDZ371PZ Rev.C
VGS = 0 V
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDZ371PZ P-Channel 1.5 V Specified PowerTrench® Thin WL-CSP MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
2000
ID = -3.3 A
Ciss
1000
VDD = -8 V
CAPACITANCE (pF)
-VGS, GATE TO SOURCE VOLTAGE (V)
4.5
3.0
VDD = -10 V
VDD = -12 V
1.5
Coss
100
0.0
0
3
6
9
12
f = 1 MHz
VGS = 0 V
50
0.1
15
1
10
20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
4
10
-Ig, GATE LEAKAGE CURRENT (A)
20
10
-ID, DRAIN CURRENT (A)
Crss
100 us
1 ms
1
THIS AREA IS
LIMITED BY rds(on)
10 ms
SINGLE PULSE
TJ = MAX RATED
0.1
100 ms
1s
10 s
DC
RθJA = 260 oC/W
TA = 25 oC
0.01
0.1
1
10
VDS = 0 V
3
10
2
10
TJ = 125 oC
10
1
-1
10
TJ = 25 oC
-2
10
-3
10
60
-VDS, DRAIN to SOURCE VOLTAGE (V)
0
3
6
9
12
15
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe
Operating Area
Figure 10. Gate Leakage Current vs
Gate to Source Voltage
200
P(PK), PEAK TRANSIENT POWER (W)
100
SINGLE PULSE
o
RθJA = 260 C/W
o
TA = 25 C
10
1
0.1
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (s)
Figure 11. Single Pulse Maximum Power Dissipation
©2009 Fairchild Semiconductor Corporation
FDZ371PZ Rev.C
4
www.fairchildsemi.com
FDZ371PZ P-Channel 1.5 V Specified PowerTrench® Thin WL-CSP MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 260 C/W
0.001
-4
10
-3
10
-2
10
-1
10
1
10
2
10
3
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
FDZ371PZ Rev.C
5
www.fairchildsemi.com
FDZ371PZ P-Channel 1.5 V Specified PowerTrench® Thin WL-CSP MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
FDZ371PZ P-Channel 1.5 V Specified PowerTrench® Thin WL-CSP MOSFET
Dimensional Outline and Pad Layout
©2009 Fairchild Semiconductor Corporation
FDZ371PZ Rev.C
6
www.fairchildsemi.com
tm
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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THEREIN, WHICH COVERS THESE PRODUCTS.
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As used herein:
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and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2.
A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I40
©2009 Fairchild Semiconductor Corporation
FDZ371PZ Rev.C
www.fairchildsemi.com
FDZ371PZ P-Channel 1.5 V Specified PowerTrench® Thin WL-CSP MOSFET
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