P-Channel PowerTrench® MOSFET -20 V, -14 A, 8.4 mΩ Features General Description Max rDS(on) = 8.4 mΩ at VGS = -4.5 V, ID = -14 A This P-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench® process that has been optimized for rDS(ON), switching performance and ruggedness. Max rDS(on) = 13 mΩ at VGS = -2.5 V, ID = -11 A High performance trench technology for extremely low rDS(on) High power and current handling capability in a widely used surface mount package Applications Termination is Lead-free and RoHS Compliant Battery Management HBM ESD capability level > 3.6 KV typical (Note 4) 8 7 6 Load Switch D D D D 5 Pin 1 1 G S S S 2 3 4 Pin 1 S D S D S D G D Bottom Top MLP 3.3x3.3 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous TC = 25 °C -Continuous TA = 25 °C ID TJ, TSTG ±12 V (Note 1a) -14 A -50 Single Pulse Avalanche Energy PD Units V -40 -Pulsed EAS Ratings -20 (Note 3) Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C 38 26 (Note 1a) Operating and Storage Junction Temperature Range 2.3 -55 to +150 mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient 4.9 (Note 1a) 53 °C/W Package Marking and Ordering Information Device Marking FDMC612PZ Device FDMC612PZ ©2013 Fairchild Semiconductor Corporation FDMC612PZ Rev.C3 Package MLP 3.3X3.3 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC612PZ P-Channel PowerTrench® MOSFET October 2013 FDMC612PZ Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V -1 μA IGSS Gate to Source Leakage Current VGS = ±12 V, VDS = 0 V ±10 μA -1.5 V -20 V -19 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C VGS = -4.5 V, ID = -14 A 5.9 8.4 rDS(on) Static Drain to Source On Resistance VGS = -2.5 V, ID = -11 A 8.2 13 VGS = -4.5 V, ID = -14 A, TJ = 125 °C 8.3 13 VDS = -5 V, ID = -14 A 85 gFS Forward Transconductance -0.6 -0.9 9 mV/°C mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = -10 V, VGS = 0 V, f = 1 MHz 5710 7995 pF 1215 1700 pF 1170 1640 pF 26 42 ns 52 83 ns 96 154 ns Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time 81 130 ns Qg Total Gate Charge 53 74 nC Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = -10 V, ID = -14 A, VGS = -4.5 V, RGEN = 6 Ω VDD = -10 V, ID = -14 A, VGS = -4.5 V 9.4 nC 18 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -14 A (Note 2) -0.8 -1.3 VGS = 0 V, IS = -2 A (Note 2) -0.7 -1.2 IF = -14 A, di/dt = 100 A/μs V 39 62 ns 17 31 nC Notes: 1: RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user’s board design. a. 53 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 125 °C/W when mounted on a minimum pad of 2 oz copper. SS SF DS DF G SS SF DS DF G 2: Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %. 3: EAS of 38 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = -16 A, VDD = -18 V, VGS = -10 V. 4: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. ©2013 Fairchild Semiconductor Corporation FDMC612PZ Rev.C3 2 www.fairchildsemi.com FDMC612PZ P-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 50 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 2.0 -ID, DRAIN CURRENT (A) VGS = -4.5 V 40 VGS = -3.5 V VGS = -3.0 V 30 VGS = -2.5 V 20 10 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.2 0.4 -VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = -3.0 V 1.0 VGS = -3.5 V 0 10 20 VGS = -4.5 V 30 40 50 -ID, DRAIN CURRENT (A) Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 25 ID = -14 A VGS = -4.5 V 1.4 rDS(on), DRAIN TO 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -75 -50 SOURCE ON-RESISTANCE (mΩ) 1.5 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = -2.5 V 1.5 0.5 0.6 Figure 1. On-Region Characteristics PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 20 ID = -14 A 15 TJ = 125 oC 10 5 TJ = 25 oC 0 1.5 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 2.0 2.5 3.0 3.5 4.0 4.5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance vs Junction Temperature Figure 4. On-Resistance vs Gate to Source Voltage 50 -IS, REVERSE DRAIN CURRENT (A) 50 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX -ID, DRAIN CURRENT (A) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 40 VDS = -5 V 30 TJ = 150 oC 20 TJ = 25 oC 10 TJ = -55 0 0.0 0.5 1.0 1.5 oC 2.0 1 TJ = 150 oC TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 2.5 0.2 0.4 0.6 0.8 1.0 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics ©2013 Fairchild Semiconductor Corporation FDMC612PZ Rev.C3 VGS = 0 V 10 Figure 6. Source to Drain Diode Forward Voltage vs Source Current 3 www.fairchildsemi.com FDMC612PZ P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted ID = -14 A Ciss VDD = -8 V VDD = -10 V CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE (V) 10000 4.5 3.0 VDD = -12 V 1.5 Coss Crss 1000 f = 1 MHz VGS = 0 V 0.0 0 20 40 500 0.1 60 1 10 20 -VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 50 50 o -IAS, AVALANCHE CURRENT (A) RθJC = 4.9 C/W -ID, DRAIN CURRENT (A) TJ = 25 oC TJ = 100 oC 10 TJ = 125 oC 1 0.001 0.01 0.1 1 10 40 VGS = -4.5 V 30 Limited by Package 20 VGS = -2.5 V 10 0 25 100 100 125 150 Figure 10. Maximum Continuous Drain Current vs Case Temperature -1 10 100 -2 VDS = 0 V 10 100 μs -3 10 -ID, DRAIN CURRENT (A) -Ig, GATE LEAKAGE CURRENT (A) 75 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability -4 10 -5 TJ = 10 125 oC -6 10 -7 10 -8 10 TJ = 25 oC 10 1 ms 10 ms 1 0.1 -9 10 THIS AREA IS LIMITED BY rDS(on) 0 6 12 0.01 0.01 18 -VGS, GATE TO SOURCE VOLTAGE (V) 1s 10 s DC RθJA = 125 oC/W 0.1 CURVE BENT TO MEASURED DATA 1 10 100 -VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Gate Leakage Current vs Gate to Source Voltage ©2013 Fairchild Semiconductor Corporation FDMC612PZ Rev.C3 100 ms SINGLE PULSE TJ = MAX RATED TA = 25 oC -10 10 50 o tAV, TIME IN AVALANCHE (ms) Figure 12. Forward Bias Safe Operating Area 4 www.fairchildsemi.com FDMC612PZ P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted P(PK), PEAK TRANSIENT POWER (W) 1000 SINGLE PULSE o RθJA = 125 C/W 100 o TA = 25 C 10 1 0.1 -4 10 -3 10 -2 10 -1 10 1 100 10 1000 t, PULSE WIDTH (sec) Figure 13. Single Pulse Maximum Power Dissipation 2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 125 C/W 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 14. Junction-to-Ambient Transient Thermal Response Curve ©2013 Fairchild Semiconductor Corporation FDMC612PZ Rev.C3 5 www.fairchildsemi.com FDMC612PZ P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted A 0.10 C 2X 8 B (3.40) 2.37 5 0.45(4X) 2.15 (1.70) (0.40) KEEP OUT AREA (0.65) PIN1 IDENT A 0.65 0.10 C TOP VIEW 0.70(4X) 1 4 0.42(8X) 1.95 2X 0.8MAX 0.10 C (0.20) 0.08 C 0.05 0.00 SIDE VIEW RECOMMENDED LAND PATTERN C SEATING PLANE 2.27+0.05 1 4 0.45+0.05 (4X) (0.40) (1.20) 2.05+0.05 0.45+0.05 (3X) A 8 0.65 5 1.95 0.32+0.05 (8X) 0.10 0.05 NOTES: A.EXCEPT AS NOTED, PACKAGE CONFORMS TO JEDEC REGISTRATION MO-240 VARIATION BA.. B.DIMENSIONS ARE IN MILLIMETERS. C.DIMENSIONS AND TOLERANCES PER ASME Y14.5M,1994. D.SEATING PLANE IS DEFINED BY TERMINAL TIPS ONLY E.BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH PROTRUSIONS NOR GATEBURRS. F.FLANGE DIMENSIONS INCLUDE INTERTERMINAL FLASH OR PROTRUSION. INTERTERMINAL FLASH OR PROTRUSION SHALL NOT EXCEED 0.25MM PER SIDE. G.IT IS RECOMMENDED TO HAVE NO TRACES OR VIA WITHIN THE KEEP OUT AREA. H.DRAWING FILENAME: MKT-MLP08Trev3. I.GENERAL RADII FOR ALL CORNERS SHALL BE 0.20MM MAX. J.FAIRCHILD SEMICONDUCTOR. C A B C BOTTOM VIEW ©2013 Fairchild Semiconductor Corporation FDMC612PZ Rev.C3 6 www.fairchildsemi.com FDMC612PZ P-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. 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Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. 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Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I66 ©2013 Fairchild Semiconductor Corporation FDMC612PZ Rev.C3 7 www.fairchildsemi.com FDMC612PZ P-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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