Revised February 2005 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. ■ Input voltage level translation from 5V to 3V ■ Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number Package Package Description Number 74LVX00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX00MX_NL (Note 1) M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX00SJ 74LVX00MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVX00MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions © 2005 Fairchild Semiconductor Corporation Pin Names Description An, Bn Inputs On Outputs DS011551 www.fairchildsemi.com 74LVX00 Low Voltage Quad 2-Input NAND Gate February 1993 74LVX00 Absolute Maximum Ratings(Note 2) Recommended Operating Conditions (Note 3) 0.5V to 7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) VI Supply Voltage (VCC) 0.5V 20 mA 0.5V to 7V DC Input Voltage (VI) VO 0V to 5.5V Output Voltage (VO) DC Output Diode Current (IOK) VO 2.0V to 3.6V Input Voltage (VI) 0V to VCC 40qC to 85qC Operating Temperature (TA) 0.5V VCC 0.5V 20 mA 20 mA 0.5V to VCC 0.5V DC Output Voltage (VO) Input Rise and Fall Time ('t/'V) Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. DC Output Source r25 mA or Sink Current (IO) DC VCC or Ground Current r50 mA 65qC to 150qC (ICC or IGND) Storage Temperature (TSTG) Power Dissipation 0 ns/V to 100 ns/V Note 3: Unused inputs must be held HIGH or LOW They may not float. 180 mW DC Electrical Characteristics Symbol VIH VIL VOH VOL Parameter TA VCC Min 25qC TA 40qC to 85qC Typ Max Min HIGH Level Input 2.0 1.5 1.5 Voltage 3.0 2.0 2.0 3.6 2.4 2.4 Max 2.0 0.5 0.5 Voltage 3.0 0.8 0.8 3.6 0.8 0.8 2.0 1.9 2.0 1.9 Voltage 3.0 2.9 3.0 2.9 3.0 2.58 Conditions V LOW Level Input HIGH Level Output Units V VIN VIL or VIH IOH 50 PA IOH 50 PA V 2.48 LOW Level Output 2.0 0.0 Voltage 3.0 0.0 IOH 0.1 0.1 0.1 0.1 3.0 0.36 0.44 VIN 50 PA IOL 50 PA IOL 4 mA V IIN Input Leakage Current 3.6 r0.1 r1.0 PA VIN 5.5V or GND ICC Quiescent Supply Current 3.6 2.0 20.0 PA VIN VCC or GND Noise Characteristics (Note 4) Symbol Parameter VCC (V) TA Typ 25qC Limit 4 mA VIL or VIH IOL Units CL (pF) VOLP Quiet Output Maximum Dynamic VOL 3.3 0.3 0.5 V 50 VOLV Quiet Output Minimum Dynamic VOL 3.3 0.3 0.5 V 50 VIHD Minimum HIGH Level Dynamic Input Voltage 3.3 2.0 V 50 VILD Maximum LOW Level Dynamic Input Voltage 3.3 0.8 V 50 Note 4: Input tr tf 3ns www.fairchildsemi.com 2 Symbol tPLH VCC Parameter (V) Propagation Delay Time TA Min 2.7 tPHL 3.3 r 0.3 25qC TA 40qC to 85qC Typ Max Min Max 5.4 10.1 1.0 12.5 7.9 13.6 1.0 16.0 4.1 6.2 1.0 7.5 9.7 1.0 11.0 6.6 tOSLH Output to Output Skew 2.7 1.5 1.5 tOSHL (Note 5) 3.3 1.5 1.5 Note 5: Parameter guaranteed by design tOSLH |tPLHm–tPLHn|, tOSHL Units CL (pF) 15 ns 50 15 50 ns 50 |tPHLm–tPHLn| Capacitance Symbol TA Parameter Min 25qC TA Typ Max 10 CIN Input Capacitance 4 CPD Power Dissipation 19 40qC to 85qC Min Units Max 10 pF pF Capacitance (Note 6) Note 6: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. 3 www.fairchildsemi.com 74LVX00 AC Electrical Characteristics 74LVX00 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 4 74LVX00 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com 74LVX00 Low Voltage Quad 2-Input NAND Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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