Revised January 1999 CD40106BC Hex Schmitt Trigger General Description Features The CD40106BC Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N and P-channel enhancement transistors. The positive and negative-going threshold voltages, VT+ and VT−, show low variation with respect to temperature (typ 0.0005V/°C at VDD = 10V), and hysteresis, VT+ − VT− ≥ 0.2 VDD is guaranteed. ■ Wide supply voltage range: All inputs are protected from damage due to static discharge by diode clamps to VDD and VSS. ■ High noise immunity: 3V to 15V 0.7 VDD (typ.) ■ Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS 0.4 VDD (typ.), ■ Hysteresis: 0.2 VDD guaranteed ■ Equivalent to MM74C14 ■ Equivalent to MC14584B Ordering Code: Package Number Package Description CD40106BCM Order Number M14A 14-Lead Small Outline integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body CD40106BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Schematic Diagram Pin Assignments for DIP and SOIC Top View © 1999 Fairchild Semiconductor Corporation DS005985.prf www.fairchildsemi.com CD40106BC Hex Schmitt Trigger October 1987 CD40106BC Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 2) (Note 2) −0.5 to +18 VDC DC Supply Voltage (VDD) Input Voltage (VIN) DC Supply Voltage (VDD) −0.5 to VDD +0.5 VDC −65°C to +150°C Storage Temperature Range (TS) 700 mW Small Outline 500 mW −40°C to +85°C Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Lead Temperature (TL) (Soldering, 10 seconds) 0 to VDD VDC Operating Temperature Range (TA) Power Dissipation (PD) Dual-In-Line 3 to 15 VDC Input Voltage (VIN) Note 2: VSS = 0V unless otherwise specified. 260°C DC Electrical Characteristics (Note 3) Symbol IDD VOL VOH VT− VT+ VH IOL IOH IIN Parameter Quiescent Device Current −40°C Conditions Min Max +25°C Min Typ +85°C Max Min Max Units VDD = 5V 4.0 4.0 30 µA VDD = 10V 8.0 8.0 60 µA VDD = 15V 16.0 16.0 120 µA LOW Level Output |IO| < 1 µA Voltage VDD = 5V 0.05 0.05 0.05 V VDD = 10V 0.05 0.05 0.05 V VDD = 15V 0.05 0.05 0.05 V HIGH Level Output |IO| < 1 µA Voltage VDD = 5V 4.95 4.95 5 4.95 V VDD = 10V 9.95 9.95 10 0.95 V VDD = 15V 14.95 14.95 15 14.95 0.7 1.4 Negative-Going Threshold VDD = 5V, VO = 4.5V Voltage 0.7 2.0 VDD = 10V, VO = 9V 1.4 4.0 1.4 VDD = 15V, VO = 13.5V 2.1 6.0 2.1 Positive-Going Threshold VDD = 5V, VO = 0.5V 3.0 4.3 Voltage VDD = 10V, VO = 1V 6.0 VDD = 15V, VO = 1.5V Hysteresis (VT+ − VT−) VDD = 5V Voltage V 2.0 0.7 2.0 V 3.2 4.0 5.0 6.0 1.4 4.0 V 2.1 6.0 3.0 3.6 V 4.3 3.0 4.3 8.6 6.0 V 6.8 8.6 6.0 8.6 V 9.0 12.9 1.0 3.6 9.0 10.0 12.9 9.0 12.9 V 1.0 2.2 3.6 1.0 3.6 VDD = 10V 2.0 V 7.2 2.0 3.6 7.2 2.0 7.2 VDD = 15V 3.0 V 10.8 3.0 5.0 10.8 3.0 10.8 V LOW Level Output VDD = 5V, VO = 0.4V 0.52 0.44 0.88 0.36 mA Current (Note 3) VDD = 10V, VO = 0.5V 1.3 1.1 2.25 0.9 mA mA VDD = 15V, VO = 1.5V 3.6 3.0 8.8 2.4 HIGH Level Output VDD = 5V, VO = 4.6V −0.52 −0.44 −0.88 −0.36 mA Current (Note 3) VDD = 10V, VO = 9.5V −1.3 −1.1 −2.25 −0.9 mA VDD = 15V, VO = 13.5V −3.6 Input Current −8.8 −2.4 mA −0.30 −10−5 −0.30 −1.0 µA VDD = 15V, VIN = 15V 0.30 10−5 0.30 1.0 µA Note 3: IOH and IOL are tested one output at a time. www.fairchildsemi.com −3.0 VDD = 15V, VIN = 0V 2 TA = 25°C, CL = 50 pF, RL = 200k, tr and tf = 20 ns, unless otherwise specified Symbol tPHL or tPLH tTHL or tTLH Typ Max Propagation Delay Time from Parameter VDD = 5V 220 400 ns Input to Output VDD = 10V 80 200 ns VDD = 15V 70 160 ns VDD = 5V 100 200 ns VDD = 10V 50 100 ns Transition Time Conditions Min Units VDD = 15V 40 80 ns CIN Average Input Capacitance Any Input 5 7.5 pF CPD Power Dissipation Capacity Any Gate (Note 5) 14 pF Note 4: AC Parameters are guaranteed by DC correlated testing. Note 5: CPD determines the no load ac power consumption of any CMOS device. For complete explanation see 74C Family Characteristics Application Note, AN-90. Switching Time Waveforms tr = tf = 20 ns Typical Applications Low Power Oscillator Note: The equations assume t1 + t2 >> tPHL + tPLH 3 www.fairchildsemi.com CD40106BC AC Electrical Characteristics (Note 4) CD40106BC Typical Performance Characteristics Guaranteed Trip Point Range Typical Transfer Characteristics Guaranteed www.fairchildsemi.com 4 CD40106BC Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body Package Number M14A 5 www.fairchildsemi.com CD40106BC Hex Schmitt Trigger Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N14A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.