November 1990 Edition 5.0 DATA SHEET MB1502 SERIAL INPUT PLL FREQUENCY SYNTHESIZER LOW POWER SERIAL INPUT PLL SYNTHESIZER WITH 1.1 GHz PRESCALER The Fujitsu MB1502, utilizing BI-CMOS technology, is a single chip serial input PLL synthesizer with pulse-swallow function. The MB1502 contains a 1.1GHz two modulus prescaler that can select of either 64/65 or 128/129 divide ratio, control signal generator, 16-bit shift register, 15-bit latch, programmable reference divider (binary 14-bit programmable reference counter), 1-bit switch counter, phase comparator with phase conversion function, charge pump, crystal oscillator, 19-bit shift register, 18-bit latch, programmable divider (binary 7-bit swallow counter and binary 11-bit programmable counter) and analog switch to speed up lock up time. It operates supply voltage of 5V typ. and achieves very low supply current of 8mA typ. realized through the use of Fujitsu Advanced Process Technology. Plastic Package DIP-16P-M04 FEATURES • High operating frequency: fIN MAX=1.1GHz (VIN MIN=10dBm) • Pulse swallow function: 64/65 or 128/129 • Low supply current: ICC=8mA typ. • Serial input 18-bit programmable divider consisting of: — Binary 7-bit swallow counter: 0 to 127 — Binary 11-bit programmable counter: 16 to 2047 Plastic Package FPT-16P–M06 • Serial input 15-bit programmable reference divider consisting of: — Binary 14-bit programmable reference counter: 8 to 16383 — 1-bit switch counter (SW) sets divide ratio of prescaler • On-chip analog switch achieves fast lock up time • 2 types of phase detector output — On-chip charge pump (Bipolar type) — Output for external charge pump Pin Assignment • Wide operating temperature: –40C to +85C • 16-pin Plastic DIP Package (Suffix: —P) 16-pin Plastic Flat Package (Suffix: —PF) ABSOLUTE MAXIMUM RATINGS (See NOTE) RatIng OSCIN 1 OSCOUT 2 16 ∅R 15 ∅P VP 3 14 13 BiSW 12 FC Value Unit VCC 4 VCC –0.5 to +7.0 V 5 VP VCC to 10.0 V DO GND 6 11 LE 7 10 Data 8 Power Supply Voltage Output Voltage VOUT –0.5 to VCC +0.5 V LD Open-drain Voltage VOOP –0.5 to 0.8 V fIN Output Current IOUT ± 10 mA Storage Temperature TSTG –55 to +125 C NOTE: fOUT Symbol Permanent device damage may occur if the above Absolute Maximum RatIngs are exceeded.Functional operation should be restricted to the condItions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. (TOP VIEW) 9 Clock This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. MB1502 MB1502 Block Diagram VCC 16-Bit Shift Register 4 16-Bit Shift Register GND 6 15-Bit Latch LE 15-Bit Latch 11 Programmable Reference Divider OSCIN 1 OSCOUT 2 Crystal Oscillator Circuit 1-bit Binary 14-Bit Reference Counter SW Phase Comparator 13 BiSW 12 FC 7 LD 16 ∅R 15 ∅P 3 VP 5 DO 14 fOUT 19-Bit Shift Register 19-Bit Shift Register fin 8 Prescaler Circuit 18-Bit Latch 7-Bit Latch 11-Bit Latch Programmable Divider Data 10 Clock 9 Control 1-Bit Latch Binary 7-Bit Swallow Counter Binary 11-Bit Programmable Counter Control Circuit 2 Charge Pump MB1502 PIN DESCRIPTION Pin No. Pin Name I/O 1 2 OSCIN OSCOUT I O Oscillator input. Oscillator output. A crystal is placed between OSCIN and OSCOUT. 3 VP — Power supply input for charge pump and analog switch. 4 VCC — Power supply voltage input. 5 DO O Charge pump output. The characteristics of charge pump is reversed depending upon FC input. 6 GND — Ground 7 LD O Phase comparator output. Normally this pin outputs high level. While the phase difference of fr, and fp exists, this pin outputs low level. 8 fIN l Prescaler input. The connection with an external VCO should be AC connection. 9 Clock I Clock input for 19-bit shift register and 16-bit shift register. On rising edge of the clock shifts one bit of data into the shift registers. 10 Data l Binary serial data input. The last bit of the data is a control bit which specified destination of shift registers. When this bit is high level and LE is high level, the data stored in shift register is transferred to 15-bit latch. When this bit is low level and LE is high level, the data is transferred to 18-bit latch. Description 11 LE I Load enable input (with internal pull up resistor). When LE is high or open, the data stored in shift register is transferred into latch depending upon the control bit. At the time, internal charge pump output to be connected to BISW pin because internal analog switch becomes ON state. 12 FC l Phase select input of phase comparator (with internal pull up resistor). When FC is low level, the characteristics of charge pump, phase comparator is reversed. FC input signal is also used to control fOUT pin (test pin) output level for fr or fp. 13 BISW O Analog switch output. Usually BISW pin is set high-impedance state. When internal analog switch is ON (LE pin is high level), this pin outputs internal charge pump state. 14 fOUT O Monitor pin of phase comparator input. fOUT pin outputs either programmable reference divider output (fr) or programmable divider output (fp) depending upon FC pin input level. 15 16 ∅P ∅R O O Outputs for external charge pump. The characteristics are reversed according to FC input. ∅P pin is N-channel open drain output. 3 MB1502 FUNCTIONAL DESCRIPTIONS SERIAL DATA INPUT Serial data input is achieved by three inputs, such as Data pin, Clock pin and LE pin. Serial data input controls 15-bit programmable reference divider and 18-bit programmable divider, respectively. Binary serial data is input to Data pin. On rising edge of clock shifts one bit of serial data into the internal shift registers and when load enable pin is high level or open, stored data is transferred into latch depending upon the control bit. Control data “H” data is transferred into 15-bit latch. Control data “L” data is transferred into 18-bit latch. PROGRAMMABLE REFERENCE DIVIDER Programmable reference divider consists of 16-bit shift register, 15-bit latch and 14-bit reference counter. Serial 16-bit data format is shown below. Control bit LSB C Divide ratio of prescaler setting bit MSB S S S S S S S S S S S S S S S 1 2 3 4 5 6 7 8 9 10 11 12 13 14 W Divide ratio of programmable reference counter setting bit 14-BIT PROGRAMMABLE REFERENCE COUNTER DIVIDE RATIO Divide Ratio R S S S S S S S S S S S S S S 14 13 12 11 10 9 8 7 6 5 4 3 2 1 8 0 0 0 0 0 0 0 0 0 0 1 0 0 0 9 0 0 0 0 0 0 0 0 0 0 1 0 0 1 • • • • • • • • • • • • • • • 16383 1 1 1 1 1 1 1 1 1 1 1 1 1 1 NOTES: Divide ratio less than 8 is prohibited. Divide ratio: 8 to 16383 SW: This bit selects divide ratio of prescaler. SW=H : 64 SW=L :128 S1 to S14: These bits select divide ratio of programmable reference divider. C: Control bit (sets as high level). Data is input from MSB side. PROGRAMMABLE DIVIDER Programmable divider consists of 19-bit shift register, 18-bit latch, 7-bit swallow counter and 11-bit programmable counter. Serial 19-bit data format is shown on following page. 4 MB1502 Control bit LSB C MSB S S S S S S S S S 1 2 3 4 5 6 7 8 9 S S S S S S S S S 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 Divide ratio of swallow counter setting bit Divide ratio of programmable counter setting bit 7-BIT SWALLOW COUNTER DIVIDE RATIO Divide Ratio A S S S S S S S 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 • • • • • • • • 127 1 1 1 1 1 1 1 NOTE: Divide ratio: 0 to 127 11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO S S S S S S S S S S S 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 16 0 0 0 0 0 0 1 0 0 0 1 17 0 0 0 0 0 0 1 0 0 0 1 • • • • • • • • • • • • 2047 1 1 1 1 1 1 1 1 1 1 1 Divide Ratio N NOTES: Divide ratio less than 16 is prohibited. Divide ratio: 16 to 2047 S1 to S7: Swallow counter divide ratio setting bit. (0 to 127) S8 to S18: Programmable counter divide ratio setting bit. (16 to 2047) C: Control bit (sets as low level). Data is input from MSB side. PULSE SWALLOW FUNCTION fvco = fVCO: N: A: fOSC: R: P: [(PxN)+A] x fosc ÷ R Output frequency of external voltage controlled oscillator (VCO) Preset divide ratio of binary 11-bit programmable counter (16 to 2047) Preset divide ratio of binary 7-bit swallow counter (0≤A≤127, A<N) Output frequency of the external reference frequency oscillator Preset divide ratio of binary 14-bit programmable reference counter (8 to 16383) Preset modulus of external dual modulus prescaler (64 or 128) 5 MB1502 Serial Data Input Timing Data S18=MSB *(SW) S17 S10 S9 S1=LSB (C: Control bit) (S14) (S8) (S7) (S1) (C: Control bit) Clock LE t2 t1 t3 t5 t1 – t5 ≥ 1µs t4 NOTES: Parenthesis data is used for setting divide ratio of programmable reference divider. On rising edge of clock shifts one bit of data in the shift register. PHASE CHARACTERISTICS FC pin is provided to change phase characteristics of phase comparator. Characteristics of internal charge pump output level (Do), phase comparator output level (∅R, ∅P) are reversed depending upon FC pin input level. Also, monitor pin (fOUT) output level of phase comparator is controlled by FC pin input level. The relation between outputs (DO, ∅R, ∅P) and FC input level are shown below. FC=H or open DO ∅R FC=L ∅P fOU T ∅R ∅P fOU T fr > fp H L L (fr) L H Z (fp) fr < fp L H Z (fr) H L L (fp) fr = fp Z L Z (fr) Z L Z (fp) Z = (High impedance) VCO OUTPUT FREQUENCY Note: 1 VCO CHARACTERISTICS Depending upon VCO characteristics, FC pin should be set accordingly: — When VCO characteristics are like1, FC should be set High or open circuit; — When VCO characteristics are like 2, FC should be set Low. 2 VCO INPUT VOLTAGE 6 DO MB1502 fr fp LD H Z L Do NOTES: Phase difference detection range: –2π to +2π Spike appearance depends on charge pump characteristics. Also, the spike is output in order to diminish dead band. When fr > fp or fr < fp, spike might not appear depending upon charge pump characteristics. ANALOG SWITCH ON/OFF of analog switch is controlled by LE input signal. When the analog switch is ON, internal charge pump output (DO) to be connected to BlSW pin. When the analog switch is OFF, BlSW pin is set to high-impedance state. LE=H (Changing the divide ratio of internal prescaler) : Analog switch=ON LE=L (Normal operating mode): Analog switch=OFF LPF time constant is decreased in order to insert a analog switch between LPF1 and LPF2 when channel of PLL is changing. Thus, lock up time is decreased, that is, fast lock up time is achieved. Do CHARGE PUMP LPF-1 VCO LPF-2 BISW ANALOG SW (CONTROL SIGNAL) RECOMMENDED OPERATING CONDITIONS Parameter Power Supply Voltage Symbol VCC Value Unit Min Typ Max 4.5 5.0 5.5 V VP VP VCC 8.0 V Input Voltage VI GND VCC V Operating Temperature TA –40 85 C 7 MB1502 ELECTRICAL CHARACTERISTICS (Vcc=4.5 to 5.5V, TA=–40 to +85oC, unless otherwise noted.) Parameter Condition ICC Note 1 fin fin Note2 OSCIN fOSC fin Vfin –10 OSCIN VOSC 0.5 Except fin and OSCIN VIH VCCx0.7 Data Clock IIH 1.0 A IIL –1.0 A OSCIN IOSC ±50 A –60 A Power Supply Current Operating Frequency Input Sensitivity High-level Input Voltage Low-level Input Voltage High-level Input Current Low-level Input Current Input Current High-level Output Current Low-level Output Current N-channel Open Drain Cutoff Current Output Current Analog Switch On Resistor NOTE: 8 Value Symbol Min Unit Typ Max 8.0 12.0 mA 1100 MHz 20 MHz 6 dBm 10 12 VPP V VIL VCCx0.3 V LE, FC ILE Except DO and OSCOUT VOH DO, ∅P IOFF Except DO and OSCOUT IOH –1.0 mA IOL 1.0 mA VCC = 5 V 4.4 V VOL VP = VCC to 8V VOOP= GND to 8V RON 1: f in = 1.1GHz, OSClN=12MHz, Vcc=5V. Inputs are grounded and outputs are open. 2: AC coupling. Minimum operating frequency is measured when a capacitor 1000pF is connected. 25 0.4 V 1.1 µA MB1502 TYPICAL CHARACTERISTICS CURVES INPUT SENSITIVITY CHARACTERISTICS 9 MB1502 INPUT IMPEDANCE CHARACTERISTICS 10 MB1502 TYPICAL APPLICATION EXAMPLE VPX(6V) OUTPUT LPF VCO 10kΩ 12kΩ Charge Pump Selection (Internal or external) 12kΩ ∅R 16 ∅P 15 FROM CONTROLLER 10kΩ fr fp 14 13 LE FC 12 Data Clock 11 10 9 6 7 8 47kΩ 47kΩ MB1502 1 2 OSCIN 3 OSCOUT 4 VP 5 VCC X’tal GND LD fin 1000pF 6V C1 DO VCC (5V) 100kΩ 5V C2 0.1µF 33kΩ 0.01µF LOCK DET 10kΩ Vpx : 8V max C1, C2 : Depends on crystal oscillator LE, FC : With internal pull up resistor ∅P : Open drain output Vp, 11 MB1502 PACKAGE DIMENSIONS 16–Lead Plastic Dual In–Line Package (Case No.: DIP–16P–M04) 15°MAX .770 +.008 (19.55 +0.20 ) –.012 –0.30 INDEX-1 .244±.010 (6.20±0.25) .300(7.62) TYP INDEX-2 .039 +.012 –0 (0.99 +0.30 ) –0 .060 +.012 –0 (1.52 +0.30 ) –0 .010±.002 (0.25±0.05) .172(4.36)MAX .118(3.00)MIN .100(2.54) TYP .050(1.27) MAX 1991 FUJITSU LIMITED D16033S-2C 12 .020(0.51)MIN .018±.003 (0.46±0.08) Dimensions in inches (millimeters) MB1502 16–Lead Plastic Flat Package (Case No.: FPT–16P–M06) .089(2.25)MAX (MOUNTING HEIGHT) .400 +.010 (10.15+0.25 ) –.008 –0.20 .002(0.05)MIN (STAND OFF HEIGHT) .307±.016 (7.80±0.40) INDEX “B” .268 +.016 (6.80 +0.40 ) –.008 –0.20 .209±.012 (5.30±0.30) .020±.008 (0.50±0.20) .050(1.27) TYP .018±.004 (0.45±0.10) “A” ∅.005(0.13) .006 +.002 (0.15 +0.05 ) –.001 –0.02 M Details of “A” part .016(0.40) .004(0.10) .350(8.89) REF 1991 FUJITSU LIMITED F16015S-2C .008(0.20) .007(0.18) MAX .027(0.68) MAX Details of “B” part .006(0.15) .008(0.20) .007(0.18) MAX .027(0.68) MAX Dimensions in inches (millimeters) 13 MB1502 All Rights Reserved. Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Complete Information sufficient for construction purposes is not necessarily given. The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu assumes no responsibility for inaccuracies. The information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu. Fujitsu reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu. 14 MB1502 FUJITSU LIMITED For further information, please contact: Japan FUJITSU LIMITED Semiconductor Marketing Furukawa Sogo Bldg. 6-1,Marunouchi 2-chome Chiyoda-ku, Tokyo 100 Japan Tel: (03)3216-3211 Telex: 781-2224361 FAX: (03)3216-9771 North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804 USA Tel: (408)922-9000 FAX: (408)432-9044 Europe FUJITSU MIKROELEKTRONIK GmbH Arabella Centre 9.OG Lyoner Strasse 44-48 D-6000 Frankfurt 71 F.R. Germany Tel: (069) 66320 Telex: 411963 FAX: (069) 6632122 Asia FUJITSU MICROELECTRONICS ASIA PTE LIMITED 51 Bras Basah Road Plaza by the Park #06-04/07 Singapore 0718 Tel: 336-1600 Telex: 55373 FAX: 336-1609 1990 FUJITSU LIMITED Printed in Japan JV0123-90YA3 15