ATJ2085 DATA SHEET Actions ATJ 2085 PRODUCT DATA SHEET (Version 1.5 08/2004) Actions Semiconductor Co., Ltd Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 0 WWW.MP3JS.COM.C 8/18/2004 ATJ2085 DATA SHEET Actions Declaration All contents of this document are protected by copyright law and reproduction in whole or in part is prohibited without the prior written consent of Actions Semiconductor Co., Ltd. Other product names used in this publication are for identification purposes only and may be trademarks or registered trademarks of their respective companies. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable. Actions Semiconductor Co., Ltd. reserves the right to make changes to specifications and product descriptions at any time without notice, and to discontinue or make changes to its products at any time without notice. Actions Semiconductor Co., Ltd. specifically disclaims any and all liability for any consequence of the application or use of any product or circuit. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Actions Semiconductor Co., Ltd. is one of Licensee of Thomson Licensing S.A. and is approved to distribute these semiconductor devices using MPEG Layer-3 (“mp3”) coding technology (“mp3 decoder chips”) by Thomson Licensing S.A. Supply of this product does not convey a license nor imply any right to distribute content created with this product in revenue-generating broadcast systems (terrestrial, satellite, cable and/or other distribution channels), streaming applications (via Internet, intranets and/or other networks), other content distribution systems (pay-audio or audio-on-demand applications and the like) or on physical media (compact discs, digital versatile discs, semiconductor chips, hard drives, memory cards and the like). An independent license for such use is required. For details, please visit http://mp3licensing.com. Actions Semiconductor Co., Ltd. is one of Licensee of Microsoft Licensing, GP. Actions Semiconductor Co., Ltd. is approved to distribute these semiconductor devices using Windows Media Audio (“wma”) coding technology (“wma codec chips”) by Microsoft Licensing, GP. This product includes technology owned by Microsoft Corporation and cannot be used or distributed without a license from Microsoft Licensing, GP. ADDITIONAL SUPPORT Additional product and company information can be obtained by going to the Actions website at: www.actions.com.cn. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 1 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions CONTENTS Declaration ................................................................................................................................................1 CONTENTS...............................................................................................................................................2 1. Description ............................................................................................................................................4 2. Features ................................................................................................................................................4 3. Pin Description ......................................................................................................................................6 3.1 Pin Sort by Number .....................................................................................................................6 4. Function Description ...........................................................................................................................10 4.1 Functional Block Diagram..........................................................................................................10 4.2 MCU Core .................................................................................................................................. 11 4.3 DSP Core................................................................................................................................... 11 4.4 DMA Controller .......................................................................................................................... 11 4.5 General Purpose IO Ports ......................................................................................................... 11 4.6 RTC/CTC/Watch Dog Timer......................................................................................................13 4.7 Oscillator/PLL.............................................................................................................................13 4.8 Power Management Unit (PMU)................................................................................................14 4.9 ADC............................................................................................................................................15 4.10 DAC..........................................................................................................................................16 4.11 Headphone Driver ....................................................................................................................17 4.13 External Memory Interface ......................................................................................................17 4.14 I2C Interface ............................................................................................................................18 4.15 USB 2.0(FS) SIE......................................................................................................................19 4.15.1 Hard Core ......................................................................................................................20 4.15.2 Interrupts........................................................................................................................20 4.16 FM Interface.............................................................................................................................20 5. Electrical Characteristics.....................................................................................................................20 5.1 Absolute Maximum Ratings .......................................................................................................20 5.2 Capacitance ...............................................................................................................................21 5.3 DC Characteristics.....................................................................................................................21 5.4 AC Characteristics .....................................................................................................................22 5.4.1 AC test input waveform ...................................................................................................22 Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 2 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 5.4.2 AC test output measuring points .....................................................................................22 5.4.3 Reset Parameter .............................................................................................................22 5.4.4 Initialization Parameter....................................................................................................22 5.4.5 GPIO Interface Parameter...............................................................................................23 5.4.6 Ordinary ROM Parameter ...............................................................................................23 5.4.7 External System Bus Parameter .....................................................................................24 5.4.8 Bus Operation..................................................................................................................25 5.4.9 A/D Converter Characteristics .........................................................................................27 5.4.10 Headphone Driver Characteristics Table.......................................................................27 5.4.11 LCM Driver Parameter...................................................................................................29 6. MCU/DSP Dissipation (IVDD VS. Frequency)....................................................................................30 6.1 MCU Dissipation ........................................................................................................................30 6.2 DSP Dissipation .........................................................................................................................30 7. Recommended Soldering Conditions .................................................................................................31 7.1 Soldering Conditions..................................................................................................................31 7.2 Precaution against ESD for Semiconductors ............................................................................31 7.3 Handling of Unused Input Pins for CMOS.................................................................................31 7.4 Status before Initialization of MOS Devices ..............................................................................32 8. Package Drawings ..............................................................................................................................33 Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 3 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 1. Description ATJ2085 is a single-chip for flash-based digital music player. It includes an audio decoder with a high performance DSP, ADPCM record capabilities and USB interface for downloading music and uploading voice recordings. ATJ2085 also provides an interface to flash memory, LED, button and switch inputs, headphone, and microphone, and FM radio input and control. ATJ2085’s programmable architecture supports the MP3, WMA and other digital audio standards. For devices like USB-Disk, ATJ2085 can act as a USB mass storage slave device to personal computer system. Its low power consumption allows a long battery life, and an efficient flexible on-chip DC-DC converter allows many different battery configurations, including 1xAA, 1xAAA, 2xAA, 2xAAA and Li-Ion. Built-in Sigma-Delta DAC & a headphone driver to directly drive low impedance headphones. The ADC includes inputs for both Microphone and Analog Audio in to support voice recording and FM radio integration features. Thus, the ATJ2085 provides a true ‘ALL-IN-ONE’ solution that is ideally suited for highly optimized digital audio players with mass storage function. 2. Features ¾ MPEG1/2/2.5 Audio Layer 1, 2, 3 decoder ¾ Support WMA Decoder ¾ Digital Voice Recording with Actions Speech Algorithm ¾ 24 bits DSP Core with memory and on-chip Debug Support Unit (DSU) ¾ Integrated 8-bit MCU with DSU ¾ External up to 2(cs) x 64M/128M/256M/512M/1G/2G bytes Nand type Flash accessed by MCU or DMA ¾ Built-in DMA, CTC (Counter/Timer Controller) and interrupt controller for MCU ¾ Energy saving dynamic power management (PMU) ¾ Support USB 2.0（FS）, Write speed(Max): 955k byte/s; Read speed(Max): 1033k byte/s ¾ Build in Stereo 18-bit Sigma-Delta DAC ¾ Build in Key Scan Circuit (3*3) and GPIO ¾ I²C interface supports Master/Slave mode, with changeable slave address ¾ Support external 8080 Interface LCM driver ¾ Support FM Radio input and 32 levels volume control ¾ Support Stereo 16-bit Sigma-Delta ADC for Microphone/FM Input, sample Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 4 WWW.MP3JS.COM.CN 8/18/2004 rate at ATJ2085 DATA SHEET Actions 8/12/16/22/24/32/48KHz ¾ MCU run at 24.576MHz(TYP), up to 60MHz ¾ SNR: 90dB (DAC TYP) ¾ Headphone driver output 2x11mW @16 Ohm(TYP) ¾ Operating Voltage: IO: 3.0V(TYP), Core: 2.0V(TYP) ¾ Standby Leakage Current: VCC: [email protected](TYP) , VDD: [email protected](TYP) ¾ Low Power Consumption, designed for greater than 15 (TYP) hours of operation on a single battery life. (<65mW at typical MP3 decoder solution; <90mW at typical WMA decoder solution) ¾ 64-pin (10x10mm) LQFP package Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 5 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 3. Pin Description 3.1 Pin Sort by Number Pin Pin Name I/O Type 1 GPIO_G0 BI 2 RESET- I 3 VCC PWR 4 GND 5 No. Driver 1.9mA Reset Short Description Default Z Bit0 of General purpose I/O port G H System reset input (active low) / / Digital power PWR / / Digital ground USBD- A / H USB data minus 6 USBD+ A / H USB data plus 7 PAVCC PWR / / Power supply for power amplifier(two bypass Driver SCU Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 6 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions capacitors are 47uF and 0.1uF) 8 AOUTR AO / / Int. DAC right channel analog output 9 AOUTL AO / / Int. DAC left channel analog output 10 PAGND PWR / / Power amplifier ground 11 VRDA AO / / Bypass capacitor (typ 0.47uF) 12 MICIN AI / / Microphone pre-amplifier input (0.8V-2.2V) 13 VMIC AO / / Power supply for microphone, 2.2V output 14 FMINL AI / / Left channel of FM line input 15 FMINR AI / / Right channel of FM line input 16 AGND PWR / / Analog ground 17 AVCC PWR / / Analog power 18 VREFI AI / / Voltage reference input (1.5V) 19 AVDD PWR / / Analog power 20 VDDIO PWR / / 21 VP PWR / / 22 LRADC AI / / Low resolution ADC input, 0.8--2.2V, 8Bit ADC 23 HOSCI AI / / High frequency crystal OSC input 24 HOSCO AO / / High frequency crystal OSC output 25 BATSEL I / / 26 DCDIS I / L GPIO_B0 BI 1.9mA Z Bit0 of General purpose I/O port B KEYI0 I Driver / Bit0 of key scan circuit input GPIO_C2 BI L Bit2 of General purpose I/O port C GPIO_B1 BI 1.9mA Z Bit1 of General purpose I/O port B KEYI1 I Driver / Bit1 of key scan circuit input 30 GND PWR / / Ground 31 BAT AI / / Battery monitor pin 32 LXVDD AO / / VDD DC-DC pin 27 28 29 1.9mA Driver Power output (connect to VDD through a 4.7 Ohm (typ) resistance) Power pin (When 2 Batteries mode, connect to BAT. Others mode Connect to VCC) Battery select. L：One Battery H：Two Batteries Int. DC-DC control pin. H: Disable DC-DC. L: Enable DC-DC. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 7 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 33 NGND PWR / / NMOS ground 34 LXVCC AO / / VCC DC-DC pin GPIO_B2 BI 1.9mA Z Bit2 of General purpose I/O port B KEYI2 I Driver / Bit2 of key scan circuit input 36 CE3- O / H 8080 interface LCM chip enable 37 CE2- O / H Nand Flash chip enable (optional) 38 CE1- O / H 39 VDD PWR / / Digital power GPIO_B4 BI 1.9mA Z Bit4 of General purpose I/O port B KEYO0 O Driver / Bit0 of key scan circuit output GPIO_B5 BI 1.9mA Z Bit5 of General purpose I/O port B KEYO1 O Driver / Bit1 of key scan circuit output GPIO_B6 BI 1.9mA Z Bit6 of General purpose I/O port B KEYO2 O Driver / Bit2 of key scan circuit output GPO_A1 O 3.5mA L Bit1 of General purpose output port A ICECK I Driver / Clock input to DSU for debug GPO_A2 O 3.5mA Z Bit2 of General purpose output port A ICEDO O Driver / Data output from DSU for debug GPO_A0 O 3.5mA H Bit0 of General purpose output port A ICEDI I Driver / Data input to DSU for debug 46 ICEEN- I SCU H DSU enable (active low) 47 ICERST- I SCU H DSU reset (active low) 48 VCC PWR / / Digital power 49 GND PWR / / Ground 50 D7 BI / L Bit7 of ext. memory data bus 51 D6 BI / L Bit6 of ext. memory data bus 52 D5 BI / L Bit5 of ext. memory data bus 53 D4 BI / L Bit4 of ext. memory data bus 54 D3 BI / L Bit3 of ext. memory data bus 55 D2 BI / L Bit2 of ext. memory data bus 56 D1 BI / L Bit1 of ext. memory data bus 57 D0 BI / L Bit0 of ext. memory data bus 35 40 41 42 43 44 45 Boot up Nand Flash chip enable (must be connected to Nand Flash) Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 8 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 58 MWR- O / H Ext. memory write strobe 59 MRD- O / H Ext. memory read strobe 60 CLE O / L Command latch enable for NAND type flash 61 ALE O / L Address latch enable for NAND type flash GPIO_C1 BI H Bit1 of General purpose I/O port C I²C_SDA BI / I²C Serial data (Open drain) SIRQ- I / Ext. interrupt request input GPIO_C0 BI 1.9mA H Bit0 of General purpose I/O port C I²C_SCL BI Driver / I²C serial clock (Open drain) VDD PWR / / Digital power 62 63 64 1.9mA Driver Notes: 1: PWR----Power Supply 2: AI----Analog Input 3: AO----Analog Output 4: O----Output 5: I----Input 6: BI----Bi-direction 7. SCU----SCHIMITCU Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 9 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 4. Function Description 4.1 Functional Block Diagram Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 10 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 4.2 MCU Core ATJ2085 integrates 8-bit MCU with on-chip ICE support. Instruction set is compatible with Z80. Process capability is controlled by software Up to 60 MHz. ATJ2085 includes 116 Kbytes of on-chip SRAM and 29Kbytes on-chip ROM. See the following flag for on chip memory mapping. 4.3 DSP Core 24-bit Harvard architecture DSP with on-chip ICE support is built in. It works with a memory word length of 24 bits. ATJ2085 has 16KB*24bit Program Memory (PM) and (16KB-256)*24bit Data Memory (DM). Memory-Mapped Register includes DAC interface. Process capability is controlled by software Up to 72 MIPS. 4.4 DMA Controller ATJ2085 supports 3 kinds of DMA channels. DMA1/2 support Data exchange in Memory or IO. The last DMA is USB DMA. 4.5 General Purpose IO Ports ATJ2085 has GPOA, GPIOB, GPIOC, and GPIOG. They have different functions in different modes. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 11 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Function GPIO 0 GPOA 1 2 Actions F1 F2 (Default) (Function 2) When ICE is used, GPO_A[2~0] Pins are ICEDO, ICECK and ICEDI; Otherwise GPO_A[2~0] is used for output function. 0 GPIOB 1 When choosing Keyboard function, GPIOB[2~0] Pins are KEYI[2~0], and 2 GPIOB[6~4] 4 GPIOB[6-4:2-0]；When keyboard function enables, while some Key in [2~0] is used 5 as GPIOB, the relative Key in should be masked. are KEYO[2~0]; when not choosing Keyboard function, as 6 When I2C function enables, it is used as I2C_SCL. When as 0 IO, it is GPIO_C0, then I2C can not be enabled simultaneously GPIOC 1 Only used as GPIOC When I2C function enables, it is used as I2C_SDA. When [3~0] external interrupt enables, it is SIRQ-; and when as IO, it is GPIO_C, multiple functions can not be enabled simultaneously. when as IO, it is GPIO_C2 2 GPIOG 0 GPIOG[0] Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 12 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 4.6 RTC/CTC/Watch Dog Timer RTC is a 24-bit counter with the following function: ¾ Time ¾ Alarm ¾ Timer CTC is a counter whose clock source is different with RTC’s. Watchdog can be set from 176-milisecond to 180-second with different step. 4.7 Oscillator/PLL ATJ2085 supports 24.576MHz crystal, which is the system clock source. A low jitter PLL referenced to 24.576MHz is used to generate clock for DSP and for serial communication protocols such as USB, UART, etc. The clock used in serial communications is 48MHz so the PLL generates frequency at multiple of 48MHz to support DSP and serial communication simultaneously. Another PLL referenced to 24.576MHz is used to generate 22.5792MHz for sample rate 44.1K/22.05KHz/11.025KHz. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 13 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 4.8 Power Management Unit (PMU) PMU consists of DC-DC converter, regulator and battery monitor. In ATJ2085, there are two DC/DC converters and one liner regulator. One DC/DC converter is for VCC power supply and another is for VDD. The liner regulator is for VDD power supply when two battery mode or other conditions where need less external components. In ATJ2085, the default value of VCC is 3.0V and VDD is 2.0V. The regulator’s default output is 2.0V; all three values can be controlled by Registers. The VCC is from 2.8V to 3.3V; VDD is from 1.6V to 2.3V; the regulator is the same as VDD. ATJ2085 supports one-battery mode, two-battery mode, USB power supply or DC power line-in. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 14 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions There are two pins for mode configurations. One is “DCDIS”; the other is “BATSEL”, the truth table as follow: DCDIS BATSEL DC/DC1(VDD) DC/DC2(VCC) Regulator 0 0 Yes Yes No 0 1 No Yes Yes 1 0 No Yes Yes 1 1 No No Yes Mode descriptions One battery with more external components, but more efficiency Two battery One battery with less external components, but less efficiency USB power or DC power line-in The pin of “DCDIS” has an on-chip pull down resistor. There is a built-in super low speed and low resolution ADC for battery monitor in ATJ2085. The level of minimum battery voltage warning can be configured by registers; the range is from 0.98V to 1.22V. The voltage level of resetting system can be controlled by register; the range is from 0.9V to 1.14V. DF_7 ~ 6 DF _ 5 ~ 4 4.9 ADC There are 3 Analog-to-Digital Converters integrated in ATJ2085: 16-bit Σ-∆ ADC is for MIC/FM Input/Line Input, 8-bit SAR ADC for Line Controller, and 4-bit ADC for Battery Monitor Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 15 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions The internal microphone amplifier has gain for recording. The VMIC pin is the power supply (2.2V) for microphone. The audio ADC is an 18 bits sigma delta Analog-to-Digital Converter. Its input source can be selected from MIC amplifier or external FM or line-in, and it has two FIFO. ATJ2085 has an 8-bit switched-capacitor SAR Analog-to-Digital Converter (SARADC). Its input source is LRADC pin（for remote control）, input range is 0.8-2.2V, and its FS can be 8K, 4K, 2K, 1K. In remote control，only the most significant 8 bits are used。 4.10 DAC ATJ2085’s DAC3 is an on-chip Sigma-Delta Modulator, composed by a high performance DAC. And the DAC analog block refers to the following diagram. The DAC interface supports 4-level play back FIFO (8 x 20-bit PCM data for L/R channel) and variable sample rates, such as 48K/ 44.1K / 32K/ 24K/ 22.05K/ 16K/ 12K/ 11.025K/ 8KHz. An on-chip PLL2 is used to generate 22.5792MHz from 24.576MHz to support 44.1K/2 2.05 K/ 11.025KHz with 256xFS clock for over-sampling, while 24.576MHz supports 48K/ 32K/ 24K/ 16K/ 12K/ 8KHz with 256XFS for over-sampling. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 16 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 4.11 Headphone Driver The output power of ATJ2085’s amplifier is 13mW(each channel). 4.12 Key Scan Interface When key scan circuit is enabled, ATJ2085 will scan the keyboard periodically. It drives pin Key out N scan pulse in turn. When any key is pressed, the corresponding Key out N will send out the scan pulse. When a key is pressed, pin Key in N connecting the key will be found low level. There are 12 internal 8-bit registers for key value latch per scan. But only another one register (Key Scan Data Register) for MCU may access key value. Those 12 internal registers are mapped into this register, and an internal pointer is used to point to the current register to return scan data when read. Any IO write to this register will clear the internal register, and the pointer will increase by 1 and point to the next register after read is performed. 4.13 External Memory Interface ATJ2085 can support NAND type flash from 32M to 1G bytes. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 17 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions See the following for NAND flash Read/Write timing. Read: Write: 4.14 I2C Interface ATJ2085’s I2C can be configured as either a master or slave device. In master mode it generates the clock (I2C_SCL) and initiates transactions on the data line (I2C_SDA). Data on the I2C bus is byte oriented. Multi-Master mode, 10-bit address and Hi-speed mode are not supported. See the I2C_Bus_Specification_1995 for detailed information. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 18 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Parameter Symbol SCL period Actions Typical Unit fSCL 100 KHZ Clock low time tLOW 5 us Clock high time tHIGH 4.5 us Clock rise time tr 500 ns Clock fall time tf 20 ns data setup time tSU:DAT 4.5 us data hold time tHD:DAT 50 ns 4.15 USB 2.0(FS) SIE Communications with the host can be made via speed-programmable USB interface (compliant with USB SPEC 2.0（FS）). Such communications, including file downloading or uploading, audio/video data transferring, etc., depend on different implementations to meet different requirements. 4 endpoints are provided. Endpoint 1 and endpoint 2 are capable of isochronous transfer mode, and in this case, the maximum packet size can be 1023, according to USB SPEC. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 19 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions These two endpoints employ two independent FIFO for bulk or isochronous transfers. Endpoint 0 and endpoint 3 have 8 bytes maximum packet size. There are 4 interrupt requests for each endpoint respectively. Generally, this setting should be satisfying for most practical needs. 4.15.1 Hard Core The USB block includes a USB function with one upstream port. The USB port interfaces to the micro-controller through a programmable-speed serial interface engine (SIE). The SIE allows the micro-controller to communicate with the USB host. 4.15.2 Interrupts Two groups of interrupt requests are used to notify the micro-controller that there is some USB event pending to be handled. One is Global Interrupt group, and the other is Endpoint Interrupt group. Whenever an interrupt is generated, the SIE will send a low pulse to the micro-controller. The IRQ will not be invalidated until all the pending interrupts are cleared. 4.16 FM Interface ATJ2085 can be used as a controller with Philips FM5767 module. 2-wire or 3-wire also can be used to control the module. 5. Electrical Characteristics 5.1 Absolute Maximum Ratings Parameter Supply voltage Input voltage Storage temperature Symbol Typical Rating Unit VDD 2.0V -0.5 to +2.7 V VCC 3.0V -0.5 to +3.6 V VCC >= 3.3 -0.5 to +3.9 V VCC < 3.3 -0.5 to VCC+0.6 V -65 to +150 ℃ Vi Tstg Note: 1. TO = 25℃ (Operating Temperature) 2. Do not short-circuit two or more output pins simultaneously. 3. If even one of the above parameters exceeds the absolute maximum ratings even momentarily, the quality of the product may be degraded. The absolute maximum ratings, therefore, specify Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 20 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions the value exceeding which the product may be physically damaged. Use the product well within these ratings. 4. The specifications and conditions shown in DC Characteristics and AC characteristics are the ranges for normal operation and quality assurance of the product. 5.2 Capacitance Parameter Symbol Condition Input capacitance CI fC = 1 MHz I/O capacitance CIO MIN. Unmeasured pins returned to 0 V MAX. Unit 15 pF 15 pF Note: TO = 25℃, VCC = 0 V. 5.3 DC Characteristics Parameter Symbol Condition MIN. TYP. MAX Unit VOH IOH = -2 mA 2.4 / / V VOL IOL = 2 mA / / 0.4 V High-level input voltage VIH / 0.7*VCC / VCC + 0.6 V Low-level input voltage VIL / -0.3 / 0.4VCC V Input leakage current ILI VCC = 3.6 V, VI = VCC, 0 V / / ±10 uA Output leakage current ILO VCC = 3.6 V, VI = VCC, 0 V / / ±5 uA Idrive1 GPOA0,GPOA1,GPOA2 / 2.60 / mA Idrive2 Other GPIO / 1.25 / mA / 40 60 mA 50 110 350 uA 9 16 40 mA 25 35 70 uA High-level output voltage Low-level output voltage GPIO Drive In Full speed mode (MCU IVDD run 24.576MHz in internal SRAM, DSP run 36MIPS) Supply Current In Standby mode (Two battery mode) In Full speed mode (MCU Ivcc run 24.576MHz in internal SRAM, DSP run 36MIPS) In Standby mode Notes： Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 21 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 1. TA = -10℃ to +70℃, VDD = 2.0 V, VCC = 3.0 V 2. IVDD is the total power supply current for 2.0 V power supply. IVDD is applied to the LOGIC, PLL and OSC blocks. 3. IVCC is the total power supply current for 3.0 V power supply. IVCC is applied to the USB, IO, TP and AD blocks. 5.4 AC Characteristics (TA = -10℃to +70℃, VDD = 1.8 to 2.7 V, VCC = 2.7 to 3.6 V) 5.4.1 AC test input waveform 5.4.2 AC test output measuring points 5.4.3 Reset Parameter Parameter Symbol Condition MIN. Reset input low-level width tWRSL RESET# pin 160 MAX. Unit us 5.4.4 Initialization Parameter Parameter Symbol Data sampling time (from RESET#) tSS Output delay time (from RESET# ) tOD Condition MIN. 61.04 MAX. Unit 61.04 us us Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 22 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 5.4.5 GPIO Interface Parameter Parameter Symbol Condition MIN. MAX. Unit Input level width tGPIN Normal operation 11/ fMCUCLK GPIO input rise time tGPRISE 200 ns GPIO input fall time tGPFALL 200 ns Output level width tGPOUT s 11/ fMCUCLK s Notes: fMCUclk is the frequency that MCU is running upon. Input level width Input rise/fall time Output level width 5.4.6 Ordinary ROM Parameter Parameter Symbol Note Condition MIN. MAX. Unit tACC HOSC=24.576MHz 102 ns Data access time (from CEx# ) tCE HOSC=24.576MHz 82 ns Data input setup time tDS HOSC=24.576MHz 0 ns Data input hold time tDH HOSC=24.576MHz 0 ns Data access time (from address) Note Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 23 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 5.4.7 External System Bus Parameter Parameter Address setup time (to command signal)Note 1, 2 Symbol Condition MIN. MAX. Unit tXAS Memory Read 0.5T ns tXAS Memory Write 1.5T ns 0.5T ns Address hold time (from command signal)Note 1, 2 tXAH Data output setup time (to command signal)Note 1 tWXDS 0 T ns Data output hold time(from command signal)Note 1 tWXDH 3 0.5T ns Data input setup time (to command signal)Note 1 tRXDS 0 2T ns Data input hold time(from command signal)Note 1 tRXDH 0 ns Notes: 1. MRD#, MWR# are called the command signals for the External System Bus Interface. 2. T (ns) = 1 / fMCUCLK Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 24 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 5.4.8 Bus Operation Instruction Fetch Timing Memory Read Timing Memory Write Timing Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 25 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions IO Read Timing IO Write Timing DMA1/2 Timing Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 26 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions DSP Read/Write Timing 5.4.9 A/D Converter Characteristics (TA = -10 - +70℃, VDD = 2.0 V, VCC = 3.0V, Sample Rate=32KHz) Characteristics Min Typ. Dynamic range Max 60 Total Harmonic Distortion + Noise 50 dB 53 Frequency Response (20-13KHz) Full Scale Input Voltage(Gain=0dB) Unit 55 dB ±1 dB 800 mVpp Note: 1. TA = -10℃ to +70℃, VDD = 2.0 V, VCC = 3.0V. 2. Sample Rate=32 KHz 5.4.10 Headphone Driver Characteristics Table Characteristics Min Dynamic Range –60 dBFS Input Typ Max 87 Total Harmonic Distortion + Noise 70 73 Frequency Response 20-20KHz Unit dB 75 dB ±0.6 dB Output Common Mode Voltage 1.5 V Full Scale Output Voltage 1.6 Inter channel Isolation (1KHz) 91 dB Inter channel Gain Mismatch(1KHz) 0.025 dB 2.4 Vpp Note:1. TA =-10 - +70℃, VDD = 2.0 V, VCC = 3.0 V. 2. Sample Rate=32 KHz. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 27 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 3. Bias Current=26uA. 4. Volume Level=0x1F. Frequency Response Diagram of Headphone Driver Actions Semiconductor PAFrequencyResponse(linein->PA)@1Vpp 02/09/04 14:24:58 +4 +2 +0 d B r -2 -4 -6 -8 -10 20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k Hz Sweep Trace Color 1 2 1 1 LineStyle Thick Data Magenta Solid Blue Solid 1 1 Axis Comment Anlr.Ampl Left Load=100uF*100Kohm Anlr.Ampl Left Load=100uF*32ohm Untitled1 THD + N Amplitude Diagram of Headphone Driver Actions Semiconductor PA THD+N vs Amplitude (linein->PA)@1KHz Load=32ohm 02/09/04 10:19:46 +0 -10 -20 -30 -40 d B -50 -60 -70 -80 -90 -100 200m 400m 600m 800m 1 1.2 1.4 1.6 1.8 2 2.2 Vpp Sweep Trace Color 1 2 1 1 Line Style Thick Data Magenta Solid Blue Solid 1 1 Axis Comment Anlr.THD+N Ratio Left Anlr.THD+N Ratio Left Right Channel Left Channel Untitled1 Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 28 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 5.4.11 LCM Driver Parameter Parameter Symbol Condition Typ Unit Data access time(write) tPW80(W) HOSC=24.576mHZ 29 ns Data access time (Read) tPW80(R) HOSC=24.576mHZ 67 ns Write cycle time tCY80(W) HOSC=24.576mHZ 407 ns Read cycle time tCY80(R) HOSC=24.576mHZ 284 ns Data setup time tDS80 HOSC=24.576mHZ 79 ns Data hold time tDH80 HOSC=24.576mHZ 8 ns Address setup time tAS80 HOSC=24.576mHZ 11 ns Address hold time tAH80 HOSC=24.576mHZ 11 ns Read access time tACC80 HOSC=24.576mHZ 13 ns Data input hold time tOD80 HOSC=24.576mHZ 8 ns Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 29 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 6. MCU/DSP Dissipation (IVDD VS. Frequency) 6.1 MCU Dissipation (VBAT=1.5V, DSP under reset, VDD=2.0V, MCU runs in internal SRAM) Clock Source 32.768KHZ 24.576MHz Divisor factor IVDD(Max) /(1—1024) 350uA /1 5.9mA /2 3.3mA /4 1.9mA /8 1.2mA /16 1.9mA /32 0.7mA /64 0.6mA /128 0.58mA /256 0.56mA /512 0.55mA /1024 0.54mA 6.2 DSP Dissipation (VBAT=1.5V, MCU run LOSC, VDD=2.0V, Vcc =3.0V) DSP Speed (MIPS) IVDD (Max) 6 3.49mA @ VDD=2.0V 12 6.52mA @ VDD=2.0V 24 11.24mA @ VDD=2.0V 36 16.24mA @ VDD=2.0V 48 21.08mA @ VDD=2.0V 60 28.5mA @ VDD=2.3V 72 33.6mA @ VDD=2.3V 84 38.7mA @ VDD=2.3V Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 30 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 7. Recommended Soldering Conditions 7.1 Soldering Conditions Soldering Conditions for Surface-Mount Devices Soldering Process Soldering Conditions Peak package’s surface temperature: 235℃ Infrared ray reflow Reflow time: 30 seconds or less (210℃or more) Maximum allowable number of reflow processes: 2 Exposure limit: 3 days (10 hours of pre-baking is required at 125℃ afterward). Partial heating method Terminal temperature: 300℃ or less Heat time: 3 seconds or less (for one side of a device) Note: Maximum number of days during which the product can be stored at the temperature of 25℃ and relative humidity of 65% or less after dry-pack package is opened. Caution: Do not apply two or more different soldering methods to one chip (except for partial heating method for terminal sections). 7.2 Precaution against ESD for Semiconductors Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 7.3 Handling of Unused Input Pins for CMOS No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 31 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 7.4 Status before Initialization of MOS Devices Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function. Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 32 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions 8. Package Drawings Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 33 WWW.MP3JS.COM.CN 8/18/2004 ATJ2085 DATA SHEET Actions Actions Semiconductor Co., Ltd. Address: 15-1, NO.1, HIT Road, Tangjia, Zhuhai, Guangdong, China Tel: +86-756-3392353 Fax: +86-756-3392251, 3392252, 3392253 Post code: 519085 http:// www.actions.com.cn Business Email: [email protected] Technical Service Email: [email protected] Copyright © 2004 Actions Semiconductor Co., Ltd. All rights reserved. VER 1.5 Page 34 WWW.MP3JS.COM.CN 8/18/2004