MICREL MIC2594-1BM

MIC2588/MIC2594
Micrel
MIC2588/MIC2594
Single-Channel, Negative High-Voltage Hot
Swap Power Controllers
General Description
Features
The MIC2588 and the MIC2594 are single-channel, negative-voltage hot swap controllers designed to address the
need for safe insertion and removal of circuit boards into “live”
high-voltage system backplanes, while using very few external components. The MIC2588 and the MIC2594 are each
available in an 8-pin SOIC package and work in conjunction
with an external N-Channel MOSFET for which the gate drive
is controlled to provide inrush current limiting and output
voltage slew-rate control. Overcurrent fault protection is also
provided for which the overcurrent threshold is programmable. During an output overload condition, a constantcurrent regulation loop is engaged to ensure that the system
power supply maintains regulation. If a fault condition exceeds a built-in 400µs nuisance-trip delay, the MIC2588 and
the MIC2594 will latch the circuit breaker’s output off and will
remain in the off state until reset by cycling either the UV/OFF
pin or the power to the IC. A master Power-Good signal is
provided to indicate that the output voltage of the soft-start
circuit is within its valid output range. This signal can be used
to enable one or more DC-DC converter modules.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
• MIC2588:
Pin-for-pin functional equivalent to the
LT1640/LT1640A/LT4250
• Provides safe insertion and removal from live –48V
(nominal) backplanes
• Operates from –19V to –80V
• Electronic circuit breaker function
• Built-in 400µs “nuisance-trip” delay (tFLT)
• Regulated maximum output current into faults
• Programmable inrush current limiting
• Fast response to short circuit conditions (< 1µs)
• Programmable undervoltage and overvoltage lockouts
(MIC2588-xBM)
• Programmable UVLO hysteresis (MIC2594-xBM)
• Fault reporting:
Active-HIGH (-1BM) and Active-LOW
(-2BM) Power-Good signal output
Applications
• Central office switching
• –48V power distribution
• Distributed power systems
Typical Application
–48V
RETURN
(Long Pin)
–48V
RETURN
(Short Pin)
MIC2588-2BM
R1
698kΩ
1%
VDD
IN+
3
R2
11.8kΩ
1%
UV
/PWRGD
OV
DRAIN
1
SENSE
4
OUT+
+5VOUT
/ON/OFF
IN–
2
VEE
R3
12.4kΩ
1%
DC-DC Converter
8
7
OUT–
5V
RETURN
GATE
5
6
CFDBK
RFDBK
CGATE
R4
M1
–48V
INPUT
(Long Pin)
0.1µF
100µF
RSENSE
Input Overvoltage = 71.2V
Input Undervoltage = 36.5V
(See "Functional Description" for more detail)
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com
December 2003
1
M9999-122303
MIC2588/MIC2594
Micrel
Ordering Information
Part Number
PWRGD
Polarity
Lockout Functions
Circuit Breaker
Function
Package
MIC2588-1BM
Active-High
Undervoltage and Overvoltage
Latched Off
8-pin SOIC
MIC2588-2BM
Active-Low
Undervoltage and Overvoltage
Latched Off
8-pin SOIC
MIC2594-1BM
Active-High
Programmable UVLO Hysteresis
Latched Off
8-pin SOIC
MIC2594-2BM
Active-Low
Programmable UVLO Hysteresis
Latched Off
8-pin SOIC
Pin Configuration
PWRGD 1
8 VDD
/PWRGD 1
OV 2
7 DRAIN
OV 2
7 DRAIN
UV 3
6 GATE
UV 3
6 GATE
VEE 4
5 SENSE
VEE 4
8-Pin SOIC (M)
MIC2588-1BM
PWRGD 1
5 SENSE
8-Pin SOIC (M)
MIC2588-2BM
8 VDD
/PWRGD 1
8 VDD
ON 2
7 DRAIN
ON 2
7 DRAIN
OFF 3
6 GATE
OFF 3
6 GATE
VEE 4
5 SENSE
VEE 4
5 SENSE
8-Pin SOIC (M)
MIC2594-1BM
M9999-122303
8 VDD
8-Pin SOIC (M)
MIC2594-2BM
2
December 2003
MIC2588/MIC2594
Micrel
Pin Description
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Pin Number
Pin Name
Pin Function
1
PWRGD
/PWRGD
Power-Good Output: Open-drain. Asserted when the voltage on the DRAIN
pin (VDRAIN) is within VPGTH of VEE, indicating that the output voltage is
within proper specifications.
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MIC2588-1 and MIC2594-1: PWRGD will be high-impedance when
VDRAIN is less than VPGTH, and will pull-down to VDRAIN when VDRAIN is
greater than VPGTH. Asserted State: Open-Drain.
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MIC2588-2 and MIC2594-2: /PWRGD will pull-down to VDRAIN when
VDRAIN is less than VPGTH, and will be high impedance when VDRAIN is
greater than VPGTH. Asserted State: Active-Low.
OV
Threshold
2
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MIC25XX-2
/PWRGD
Active-Low
1
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MIC25XX-1
PWRGD
Active-High
MIC2588: Overvoltage Threshold Input. When the voltage at the OV pin is
greater than the VOVH threshold, the GATE pin is immediately pulled low by an
internal 100µA current pull-down.
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2
ON
Turn-On Threshold
MIC2594: Turn-On Threshold. At initial system power-up or after the device
has been shut off by the OFF pin, the voltage on the ON pin must exceed
the VONH threshold in order for the MIC2594 to be enabled.
3
UV
Threshold
MIC2588: Undervoltage Threshold Input. When the voltage at the UV pin is
less than the VUVL threshold, the GATE pin is immediately pulled low by an
internal 100µA current pull-down. The UV pin is also used to cycle the device
off and on to reset the circuit breaker. Taken together, the OV and UV pins
form a window comparator which defines the limits of VEE within which the
load may safely be powered.
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3
OFF
Turn-Off Threshold
4
VEE
5
SENSE
Circuit Breaker Sense Input: The current-limit threshold is set by connecting
a resistor between this pin and VEE. When the current-limit threshold of
IR = 50mV is exceeded for an internal delay tFLT (400µs), the circuit breaker
is tripped and the GATE pin is immediately pulled low. Toggling UV or OV
will reset the circuit breaker. To disable the circuit breaker, externally
connect SENSE and VEE together.
6
GATE
Gate Drive Output: Connect to the gate of an external N-Channel MOSFET.
7
DRAIN
Drain Sense Input: Connect to the drain of an external N-Channel MOSFET.
8
VDD
December 2003
MIC2594: Turn-Off Threshold. When the voltage at the OFF pin is less than
the VOFFL threshold, the GATE pin is immediately pulled low by an internal
100µA current pull-down. The OFF pin is also used to cycle the device off and
on to reset the circuit breaker. Taken together, the ON and OFF pins provide
programmable hysteresis for the turn-on command voltage.
Negative Supply Voltage Input.
Positive Supply Input.
3
M9999-122303
MIC2588/MIC2594
Micrel
Absolute Maximum Ratings(1)
Operating Ratings(2)
(All voltages are referred to VEE)
Supply Voltage (VDD – VEE) ......................... –0.3V to 100V
DRAIN, PWRGD pins ................................... –0.3V to 100V
GATE pin ..................................................... –0.3V to 12.5V
SENSE, OV, UV, ON, OFF pins ....................... –0.3V to 6V
ESD Ratings(3)
Human Body Model ................................................... 2kV
Soldering
Vapor Phase .......................... (60 sec.) +220°C +5 ±0°C
Infrared ................................... (15 sec.) +235°C +5 ±0°C
Supply Voltage (VDD – VEE) .......................... +19V to +80V
Ambient Temperature Range (TA) ............... –40°C to 85°C
Junction Temperature (TJ) ........................................ 125°C
Package Thermal Resistance
SOIC (θJA) ......................................................... 152°C/W
DC Electrical Characteristics(4)
VDD = 48V, VEE = 0V, TA = 25°C, unless otherwise noted. Bold indicates specifications apply over the full operating temperature range of
–40°C to +85°C.
Symbol
Parameter
Condition
Min
VDD – VEE
Supply Voltage
IDD
Supply Current
VTRIP
Circuit Breaker Trip Voltage
VTRIP = VSENSE – VEE
IGATEON
GATE Pin Pull-up Current
IGATEOFF
Typ
19
Max
Units
80
3
5
mA
40
50
60
mV
VGATE = VEE to 8V
19V ≤ (VDD – VEE) ≤ 80V
30
45
60
µA
GATE Pin Sink Current
(VSENSE – VEE) = 100mV
VGATE = 2V
100
230
VGATE
GATE Drive Voltage, (VGATE – VEE)
15V ≤ (VDD – VEE) ≤ 80V
9
10
ISENSE
SENSE Pin Current
VSENSE = 50mV
VUVH
UV Pin High Threshold Voltage
Low-to-High Transition
1.213
1.243
1.272
V
VUVL
UV Pin Low Threshold Voltage
High-to-Low Transition
1.198
1.223
1.247
V
VUVHYS
UV Pin Hysteresis
VOVH
OV Pin High Threshold Voltage
Low-to-High Transition
1.198
1.223
1.247
V
VOVL
OV Pin Low Threshold Voltage
High-to-Low Transition
1.165
1.203
1.232
V
VOVHYS
OV Pin Hysteresis
VONH
ANSI ON Pin High Threshold
Voltage
Low-to-High Transition
1.198
1.223
1.247
V
VOFFH
ANSI OFF Pin Low Threshold
Voltage
High-to-Low Transition
1.198
1.223
1.247
V
ICNTRL
Input Bias Current
(OV, UV, ON, OFF Pins)
VUV = 1.25V
0.5
µA
VPGTH
Power-Good Threshold
High-to-Low Transition
(VDRAIN – VEE)
1.40
V
VOLPG
PWRGD Output Voltage
VOLPG – VDRAIN
(relative to voltage at the DRAIN pin) 0mA ≤ IPG(LOW) ≤ 1mA
ILKG(PG)
mA
11
µA
0.2
20
mV
20
1.1
1.26
V
mV
MIC25XX-1
(VDRAIN – VEE) < VPGTH
–0.25
0.8
V
MIC25XX-2
(VDRAIN – VEE) > VPGTH
–0.25
0.8
V
PWRGD Output Leakage Current
VPWRGD = VDD = 80V
1
µA
Notes:
1. Exceeding the “Absolute Maximum Ratings” may damage the devices.
2. The devices are not guaranteed to function outside the specified operating conditions.
3. Devices are ESD sensitive. Handling precautions recommended. Human body model: 1.5kΩ in series with 100pF. Machine model: 200pF, no series
resistance.
4. Specification for packaged product only.
M9999-122303
4
December 2003
MIC2588/MIC2594
Micrel
AC Electrical Characteristics(5)
Symbol
Parameter
Condition
Min
Typ
Max
Units
tFLT
Built-in Overcurrent Nuisance Trip
Time Delay (Figure 1)
Note 6
tOCSENSE
Overcurrent Sense to GATE Low
(Figure 2)
VSENSE – VEE = 100mV
tOVPHL
OV to GATE Low (Figure 3)
Note 6
1
µs
tOVPLH
OV to GATE High (Figure 3)
Note 6
1
µs
tUVPHL
UV to GATE Low (Figure 4)
Note 6
1
µs
tUVPLH
UV to GATE High (Figure 4)
Note 6
µs
400
3.5
µs
1
µs
on PWRGD = 50pF(6)
1
µs
tPGL(1)
DRAIN High to PWRGD Output Low
(-1 Version parts only)
RPULLUP = 100kΩ, CLOAD
tPGL(2)
DRAIN Low to /PWRGD Output Low
(-2 Version parts only)
RPULLUP = 100kΩ, CLOAD on /PWRGD = 50pF(6)
1
µs
tPGH(1)
DRAIN Low to PWRGD Output High
(-1 Version parts only)
RPULLUP = 100kΩ, CLOAD on PWRGD = 50pF(6)
2
µs
tPGH(2)
DRAIN High to /PWRGD Output High
(-2 Version parts only)
RPULLUP = 100kΩ, CLOAD on /PWRGD = 50pF(6)
2
µs
Notes:
5. Specification for packaged product only.
6. Not 100% production tested. Parameters are guaranteed by design.
Test Circuit
[Section under construction]
December 2003
5
M9999-122303
MIC2588/MIC2594
Micrel
Typical Characteristics
[Section under construction]
MICx xxx
vs. xxx
8
8
8
7
6
7
6
7
6
5
4
1
0
XXX (X)
10
9
3
2
5
4
3
2
0
2
4
6
XXX (X)
8
1
0
10
0
2
8
1
0
10
10
9
8
7
8
7
8
7
6
5
6
5
6
5
4
3
XXX (X)
10
9
0
4
3
2
1
0
2
4
6
XXX (X)
8
0
10
0
2
4
6
XXX (X)
8
0
10
8
7
8
7
6
5
6
5
6
5
XXX (X)
8
7
XXX (X)
10
9
2
1
4
3
2
1
4
6
XXX (X)
8
0
10
0
2
4
6
XXX (X)
8
0
10
8
7
6
5
6
5
6
5
XXX (X)
8
7
XXX (X)
8
7
4
3
2
1
M9999-122303
2
4
6
XXX (X)
8
10
0
4
6
XXX (X)
8
10
2
4
6
XXX (X)
8
10
8
10
MICx xxx
vs. xxx
10
9
0
0
MICx xxx
vs. xxx
10
9
0
2
2
1
MICx xxx
vs. xxx
2
1
10
4
3
10
9
4
3
8
MICx xxx
vs. xxx
10
9
2
0
MICx xxx
vs. xxx
4
3
4
6
XXX (X)
4
3
10
9
0
2
2
1
MICx xxx
vs. xxx
0
0
MICx xxx
vs. xxx
10
9
XXX (X)
XXX (X)
4
6
XXX (X)
MICx xxx
vs. xxx
2
1
XXX (X)
5
4
3
2
MICx xxx
vs. xxx
XXX (X)
MICx xxx
vs. xxx
10
9
XXX (X)
XXX (X)
MICx xxx
vs. xxx
10
9
4
3
2
1
0
2
4
6
XXX (X)
6
8
10
0
0
2
4
6
XXX (X)
December 2003
MIC2588/MIC2594
Micrel
Timing Diagrams
OVERCURRENT
EVENT
t ≥ tFLT
t < tFLT
ILIMIT
ILOAD
0A
Load current is regulated
at ILIMIT = 50mV/RSENSE
Output OFF
(at VDD)
VDRAIN
(at VEE)
(at VEE)
VGATE
(VEE +10V)
Reduction in VDRAIN to support
ILIMIT = 50mV/RSENSE
(at VEE)
Figure 1. Overcurrent Response
100mV
VSENSE - VEE
tOCSENSE
VGATE
1V
Figure 2. SENSE to GATE LOW Timing Response
1.223V
1.203V
VOV
tOVPLH
tOVPHL
VGATE
1V
1V
Figure 3. Overvoltage Response
December 2003
7
M9999-122303
MIC2588/MIC2594
Micrel
VUV
1.223V
1.243V
tUVPHL
tUVPLH
VGATE
1V
1V
Figure 4. Undervoltage Response
MIC2588/94-1
VDRAIN
VPGTH
VPGTH
VEE
tPGL1
tPGH1
PWRGD not asserted
PWRGD asserted - High Impedance
VPWRGD — VDRAIN = 0V
PWRGD not asserted
VPWRGD — VDRAIN = 0V
PWRGD
VEE
MIC2588/94-2
VDRAIN
VPGTH
VPGTH
VEE
tPGL2
tPGH2
/PWRGD
VEE
Figure 5. DRAIN to Power-Good Response
M9999-122303
8
December 2003
MIC2588/MIC2594
Micrel
Functional Diagram
VDD1
Internal VDD
and
Reference
Generator
VDD
VDD1
45µA
VREF1
GATE
SENSE
+
–
VEE
100µA
Current
Limit
State
50mV
VEE
VDD1
VEE
PWRGD
Nuisance
Trip Filter
(400µs)
VEE
/PWRGD
Logic +
Circuit
Breaker
–
UV
+
EN
VTH(UV/OV)
VEE
–
OV
+
–
Internal
PG
+
6V
Clamp
DRAIN
VPGTH
For Power Good circuitry only
denotes -2 option
MIC2588 Block Diagram
December 2003
9
M9999-122303
MIC2588/MIC2594
Micrel
CGATE and RFDBK prevent turn-on and hot swap current
surges which would otherwise be caused by (CFDBK +
CD-G(M1)) coupling turn-on transients from the drain to the
gate of M1. An appropriate value for CGATE may be determined using the formula for a capacitive voltage divider:
Maximum voltage on CGATE at turn-on must be less than
VTHRESHOLD of M1:
1. For a standard 10V enhancement N-Channel
MOSFET, VTHRESHOLD is about 4.25V.
2. Choose 3.5V as a safe maximum voltage to safely
avoid turn-on transients.
VG-S(M1) × [CGATE + (CFDBK + CD-G(M1))]
= [(VDD – VEE(min)) × (CFDBK + CD-G(M1))]
Functional Description
Hot Swap Insertion
When circuit boards are inserted into systems carrying live
supply voltages (“hot swapped”), high inrush currents often
result due to the charging of bulk capacitance that resides
across the circuit board’s supply pins. These current spikes
can cause the system’s supply voltages to temporarily go out
of regulation, causing data loss or system lock-up. In more
extreme cases, the transients occurring during a hot swap
event may cause permanent damage to connectors or onboard components.
The MIC2588 and the MIC2594 are designed to address
these issues by limiting the magnitude of the transient current
during hot swap events. This is achieved by controlling the
rate at which power is applied to the circuit board (di/dt and
dv/dt management). In addition, to inrush current control, the
MIC2588 and the MIC2594 incorporate input voltage supervisory functions and current limiting, thereby providing robust
protection for both the system and the circuit board.
Start-Up Cycle
When the input voltage to the IC is between the overvoltage
and undervoltage thresholds (MIC2588) or is greater than
VON (MIC2594), a start cycle is initiated. At this time, the
GATE pin of the IC applies a constant charging current
(IGATEON) to the gate of the external MOSFET (M1). CFDBK
creates a Miller integrator out of the MOSFET circuit, which
limits the slew-rate of the voltage at the drain of M1. The drain
voltage rate-of-change (dv/dt) of M1 is:
(
dv M1DRAIN
dt
VG-S(M1) × CGATE = [(VDD – VEE(min)) – VG-S(M1)] × (CFDBK + CD-G(M1))
(
 C

 FDBK 
where IGATE(+) = Gate Charging Current = IGATEON;
I GATE(–) ≅ –I GATE(+) , due to the extremely high
transconductance values of power MOSFETs; and
IGATE(–) = CFDBK ×
dv(M1DRAIN )
(
CLOAD × dv M1DRAIN
(2)
CFDBK =
)
150µF × 60µA
= 5.3nF
1.7A
where the nearest standard 5% value is 5.6nF. Substituting
5.6nF into Equation 2 from above yields:
CFDBK =
dt
I

ICHARGE = CLOAD × –  GATEON 
C
 FDBK 
| ICHARGE | =
VG-S(M1)
150µF × 45µA
= 3.97nF
1.7A
Good engineering practice suggests the use of the worstcase parameter values for IGATEON from the “DC Electrical
Characteristics” section:
dt
Relating the above to the maximum transient current into the
load capacitance to be charged upon hot swap or power-up
involves a simple extension of the same formula:
ICHARGE =
(VDD – VEE (min)) – VG-S(M1)
While the value for RFDBK is not critical, it should be chosen
to allow a maximum of several milliamperes to flow in the
gate-drain circuit of M1 during turn-on. While the final value
for RFDBK is determined empirically, initial values between
RFDBK = 15kΩ to 27kΩ for systems with a maximum value of
75V for (VDD – VEE(min)) are appropriate.
Resistor R4, in series with the MOSFETs gate, minimizes the
potential for parasitic high frequency oscillations from occurring in M1. While the exact value of R4 is not critical,
commonly used values for R4 range from 10Ω to 33Ω.
For example, let us assume a hot swap controller is required
to maintain the inrush current into a 150µF load capacitance
at 1.7A maximum, and that this circuit may operate from
supply voltages as high as (VDD – VEE) = 75V. The MOSFET
to be used with the MIC2588/94 is an IRF540NS 100V
D2PAK device which has a typical (CD-G) of 250pF.
Calculating a value for CFBDK using Equation 1 yields:
) =  IGATE(–)  = – IGATEON 
 C

 FDBK 
)
CGATE = CFDBK + CD − G(Q1) ×
CGATE = (5.6nF + 250pF) ×
CLOAD × IGATEON
(75V – 3.5V) = 0.12µF
3.5V
Finally, choosing R4 = 10Ω and RFDBK = 20kΩ will yield a
suitable, initial design for prototyping.
CFDBK
Transposing:
CFDBK =
M9999-122303
CLOAD × IGATEON
| ICHARGE |
(1)
10
December 2003
MIC2588/MIC2594
Micrel
Power-Good (PWRGD or /PWRGD) Output
For the MIC2588-1 and the MIC2594-1, the Power-Good
output signal (PWRGD) will be high impedance when VDRAIN
drops below VPGTH, and will pull down to VDRAIN when
VDRAIN is above VPGTH. For the MIC2588-2 and the
MIC2594-2, /PWRGD will pull down to the potential of the
VDRAIN pin when VDRAIN drops below VPGTH, and will be high
impedance when VDRAIN is above VPGTH. Hence, the -1 parts
have an active-high PWRGD signal and the -2 parts have an
active-low /PWRGD output. Either PWRGD or /PWRGD may
be used as an enable signal for one or more subsequent
DC/DC converter modules or for other system uses as
desired. When used as an enable signal, the time necessary
for the PWRGD (or /PWRGD) signal to pull-up (when in high
impedance state) will depend upon the load (RC) that is
present on this output.
Circuit Breaker Function
The MIC2588 and the MIC2594 employ an electronic circuit
breaker that protects the MOSFET and other system components against faults such as short circuits. The current limit
threshold is set via an external resistor, RSENSE, connected
between the VEE and SENSE pins. An internal 400µs timer
limits the length of time (tFLT) for which the circuit can draw
current in excess of its programmed threshold before the
circuit breaker is tripped. This short delay prevents nuisance
tripping of the circuit breaker due to system transients while
providing rapid protection against large-scale transient faults.
Whenever the voltage across RSENSE exceeds 50mV, two
things happen:
1. A constant-current regulation loop is engaged designed to hold the voltage across RSENSE equal to
50mV. This protects both the load and the MIC2588
circuit from excessively high currents. This loop will
engage in less than 1µs from the time at which the
overvoltage condition on RSENSE occurs.
2. The internal 400µs timer is started. If the 400µs
timeout period is exceeded, the circuit breaker trips
and the GATE pin is immediately pulled low by an
internal current pull-down. This operation turns off
the MOSFET quickly and disconnects the input from
the load.
Current Sensing
As mentioned before, the MIC2588 and the MIC2594 employ
an external low-value resistor in series with the source of the
external MOSFET to measure the current flowing into the
load. The VEE connection to the IC from the negative supply
is also one input to the part’s internal current sensing circuits
and the SENSE input is the other input.
To accommodate worst-case tolerances in the sense resistor
(for a ±1% initial tolerance, allow ±3% tolerance for variations
over time and temperature) and circuit breaker threshold
voltages, a slightly more detailed calculation must be used to
determine the minimum and maximum hot swap load
currents.
As the MIC2588/94’s minimum current limit threshold voltage
is 40mV, the minimum hot swap load current is determined
where the sense resistor is 3% high:
IHOT_SWAP (min) =
IHOT_SWAP (max) =
)
(
60mV
61.9mV
=
0.97 × RSENSE (nom) RSENSE (nom)
)
In this case, the application circuit must be sturdy enough to
operate over a ~1.6-to-1 range in hot swap load currents. For
example, if an MIC2594 circuit must pass a minimum hot
swap load current of 4A without nuisance trips, RSENSE
38.8mV
= 9.7mΩ , and the nearest 1%
4A
standard value is 9.76mΩ. At the other tolerance extremes,
IHOT_SWAP(max) for the circuit in question is then simply
should be set to
61.9mV
= 6.3A
9.76mΩ
With a knowledge of the application circuit’s maximum hot
swap load current, the power dissipation rating of the sense
resistor can be determined using P = I2 × R. Here, the I is
IHOT_SWAP(max) = 6.3A and the R is RSENSE(min) =
(0.97)(RSENSE(nom)) = 9.47mΩ. Thus, the sense resistor’s
maximum power dissipation is:
PMAX = (6.3A)2 × (9.47mΩ) = 0.376W
A 0.5Ω sense resistor is a good choice in this application.
Undervoltage/Overvoltage Detection—MIC2588
The MIC2588 has “UV” and “OV” input pins. These pins can be
used to detect input supply rail undervoltage and overvoltage
conditions. Undervoltage lockout prevents energizing the load
until the supply input is stable and within tolerance. In a similar
fashion, overvoltage turn-off prevents damage to sensitive
circuit components should the input voltage exceed normal
operational limits. Each of these pins is internally connected to
an analog comparator with 20mV of hysteresis. When the UV
pin falls below its VUVL threshold or the OV pin is above its VOVH
threshold, the GATE pin is immediately pulled low. The GATE
pin will be held low until UV exceeds its VUVH threshold or OV
drops below its VOVL threshold. The UV and OV circuit’s
threshold trip points are programmed using the resistor divider
IHOT_SWAP (max) =
The sense resistor is nominally valued at:
VTRIP (typ)
IHOT_SWAP (nom)
where VTRIP(typ) is the nominal circuit breaker threshold
voltage (= 50mV) and IHOT_SWAP(nom) is the nominal hot
swap load current level to trip the internal circuit breaker in the
application.
December 2003
(
Keep in mind that the minimum hot swap load current should
be greater than the application circuit’s upper steady-state
load current boundary. Once the lower value of RSENSE has
been calculated, it is good practice to check the maximum hot
swap load current (IHOT_SWAP(max)) which the circuit may let
pass in the case of tolerance build-up in the opposite direction. Here, the worst-case maximum is found using a
VTRIP(max) of 60mV and a sense resistor, 3% low in value:
Sense Resistor Selection
RSENSE (nom) =
40mV
38.8mV
=
R
1.03 × RSENSE (nom)
SENSE (nom)
11
M9999-122303
MIC2588/MIC2594
Micrel
R1, R2, and R3 as shown in the “Typical Application.” The
equations to set the trip points are shown below. For the
following example, the circuit’s UV threshold is set to VUV = 37V
and the OV threshold is placed at VOV = 72V, values commonly
used in Central Office power distribution applications.
VUV = VUVL (typ) ×
VOV = VOVH (typ) ×
analog comparator with 20mV of hysteresis. The MIC2594
holds the output off until the voltage at the ON pin exceeds its
VONH threshold value given in the “Electrical Characteristics”
table. Once the output has been enabled by the ON pin, it will
remain on until the voltage at the OFF pin falls below its VOFFL
threshold value, or the part turns off due to a fault. Should either
event occur, the GATE pin is immediately pulled low and will
remain low until the ON pin once again exceeds its VONH
threshold. The circuit’s turn-on and turn-off points are set using
the resistor divider R1, R2, and R3 as shown in the “Typical
Application.” The equations to establish the trip points are
shown below. In the following example, the circuit’s ON threshold is set to VON = 40V and the circuit’s OFF threshold is VOFF
= 35V.
(R1+ R2 + R3)
(R2 + R3)
(R1+ R2 + R3)
R3
Given VUV, VOV, and any one resistor value, the remaining
two resistor values can be found. A suggested value for R3
is that which will provide approximately 100µA of current
through the voltage divider chain at VDD = VUV. This yields the
following as a starting point:
R3 =
VOVH (typ)
100µA
VON = VONH (typ) ×
= 12.23kΩ
VOFF = VOFFL (typ) ×
The closest standard 1% value for R3 = 12.4kΩ. Solving for
R2 and R1 yields:
R3
(R1+ R2 + R3)
(R2 + R3)
Given VOFF, VON, and any one resistor value, the remaining
two resistor values can be readily found. A suggested value
for R3 is that which will provide approximately 100µA of
current through the voltage divider chain at VDD = VOFF. This
yields the following as a starting point:
 V  
R2 = R3 ×  OV  – 1
 VUV  
 72V  
R2 = 12.4kΩ × 
 – 1
 37V  
R3 =
VOFFL (typ)
100µA
= 12.23kΩ
The closest standard 1% value for R3 = 12.4kΩ.
Then, solving for R2 and R1 yields:
R2 = 11.729kΩ
The closest standard 1% value for R2 = 11.8kΩ. Next, the
value for R1 is calculated:
 V
 
R2 = R3 ×  ON  – 1
 VOFF  
 V – 1.223V 
R1 = R3 ×  OV
 – R2


1.223V
 40V  
R2 = 12.4kΩ × 
 – 1
 35V  
 72V – 1.223V 
R1 = 12.4kΩ × 
 – R2

1.223V 
R2 = 1.771kΩ
The closest standard 1% value for R2 = 1.78kΩ.
R1 = 705.808kΩ
The closest standard 1% value for R1 = 698kΩ.
Using standard 1% resistor values, the circuit’s nominal
UV and OV thresholds are:
VUV = 36.5V
VOV = 71.2V
Programmable UVLO Hysteresis—MIC2594
The MIC2594 has user-programmable hysteresis by means of
the ON and OFF pins. This allows setting the part to turn on at
a voltage V1, and not turn off until a second voltage V2, where
V2 < V1. This can significantly simplify dealing with source
impedances in the supply bus while at the same time increasing
the amount of available operating time from a loosely regulated
power supply (for example, a battery supply). Similarly to the
MIC2588, each of these pins is internally connected to an
M9999-122303
(R1+ R2 + R3)
R1= R3 ×
(VON – 1.223V) – R2
R1= 12.4kΩ ×
1.223V
(40V – 1.223V) – R2
1.223V
R1= 391.380kΩ
The closest standard 1% value for R1 = 392kΩ.
Using standard 1% resistor values, the circuit’s nominal
ON and OFF thresholds are:
VON = 40.1V
VOFF = 35V
12
December 2003
MIC2588/MIC2594
Micrel
this will damage the transistor. However, the actual
avalanche voltage is unknown; all that can be
guaranteed is that it will be greater than the VBD(DS) of the MOSFET. The drain of the transistor is
connected to the DRAIN pin of the MIC2588/94,
and the resulting transient does have enough
voltage and energy and can damage this, or any,
high-voltage hot swap controller.
2. If the load’s bypass capacitance (for example, the
input filter capacitors for a set of DC-DC converter
modules) are on a board from which the board with
the MIC2589/MIC2595 and the MOSFET can be
unplugged, the same type of inductive transient
damage can occur to the MIC2588/MIC2594.
Protecting the controller and the power MOSFET from damage against these large-scale transients can take the forms
shown in Figure 7. It is not mandatory that these techniques
are used—the application environment will dictate suitability.
As protection against sudden on-card load dumps at the
DRAIN pin of the controller, a 2.2µF or larger capacitor
directly from DRAIN to VEE of the controller can be used to
serve as a charge reservoir. Alternatively, a 68V, 1W, 5%
Zener diode clamp can be installed in a similar fashion. Note
that the clamp diode’s cathode is connected to the DRAIN pin
as shown in Figure 7. To protect the hot swap controller from
large-scale transients at the card input, a 100V clamp diode
(an SMAT70A or equivalent) can be used. In either case, the
lead lengths should be short and the layout compact to
prevent unwanted transients in the protection circuit.
[Circuit drawing under construction]
Applications Information
4-Wire Kelvin Sensing
Because of the low value typically required for the sense
resistor, special care must be used to measure accurately the
voltage drop across it. Specifically, the measurement technique across each RSENSE must employ 4-wire Kelvin sensing. This is simply a means of making sure that any voltage
drops in the power traces connecting to the resistors are not
picked up by the signal conductors measuring the voltages
across the sense resistors.
Figure 6 illustrates how to implement 4-wire Kelvin sensing.
As the figure shows, all the high current in the circuit (from VEE
through RSENSE, and then to the source of the output MOSFET)
flows directly through the power PCB traces and RSENSE. The
voltage drop resulting across RSENSE is sampled in such a
way that the high currents through the power traces will not
introduce any parasitic voltage drops in the sense leads. It is
recommended to connect the hot swap controller’s sense
leads directly to the sense resistor’s metalized contact pads.
RSENSE metalized
contact pads
Power Trace
From VEE
RSENSE
Power Trace
To MOSFET Source
PCB Track Width:
0.03" per Ampere
using 1oz Cu
Signal Trace
to MIC2588/94 VEE Pin
Signal Trace
to MIC2588/94 SENSE Pin
Note: Each SENSE lead trace shall be
balanced for best performance — equal
length/equal aspect ratio.
Figure 6. 4-Wire Kelvin Sense Connections for RSENSE
Figure 7. Using Large-Scale Transient Protection
Devices Around the MIC2588/94
Protection Against Voltage Transients
In many telecom applications, it is very common for circuit
boards to encounter large-scale supply-voltage transients in
backplane environments. Because backplanes present a
complex impedance environment, these transients can be as
high as 2.5 times steady-state levels, or 120V in worst-case
situations. In addition, a sudden load dump anywhere on the
circuit card can generate a very high voltage spike at the drain
of the output MOSFET which, in turn, will appear at the
DRAIN pin of the MIC2588/MIC2594. In both cases, it is good
engineering practice to include protective measures to avoid
damaging sensitive ICs or the hot swap controller from these
large-scale transients. Two typical scenarios in which largescale transients occur are described below:
1. An output current load dump with no bypass (charge
bucket or bulk) capacitance to VEE. For example,
if LLOAD = 5µH, VIN = 56V and tOFF = 0.7µs, the
resulting peak short-circuit current prior to the
MOSFET turning off would reach:
Power buss inductance could easily result in localized highvoltage transients during a turn-off event. The potential for
overstressing the part in such a case should be kept in check
with a suitable input capacitor and/or transient clamping
diode.
Power MOSFET Selection
[Section under construction]
Power MOSFET Operating Voltage Requirements
[Section under construction]
Power MOSFET Steady-State Thermal Issues
[Section under construction]
Power MOSFET Transient Thermal Issues
[Section under construction]
(55V × 0.7µs) = 7.7A
5µH
PCB Layout Considerations
[Section under construction]
If there is no other path for this current to take when
the MOSFET turns off, it will avalanche the drainsource junction of the MOSFET. Since the total
energy represented is small relative to the sturdiness of modern power MOSFETs, it’s unlikely that
December 2003
Power MOSFET and Sense Resistor Vendors
[Section under construction]
13
M9999-122303
MIC2588/MIC2594
Micrel
Package Information
0.026 (0.65)
MAX)
PIN 1
0.157 (3.99)
0.150 (3.81)
DIMENSIONS:
INCHES (MM)
0.020 (0.51)
0.013 (0.33)
0.050 (1.27)
TYP
0.064 (1.63)
0.045 (1.14)
45°
0.0098 (0.249)
0.0040 (0.102)
0.197 (5.0)
0.189 (4.8)
0°–8°
SEATING
PLANE
0.010 (0.25)
0.007 (0.18)
0.050 (1.27)
0.016 (0.40)
0.244 (6.20)
0.228 (5.79)
8-Pin SOIC (M)
MICREL, INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 944-0970
WEB
USA
http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2003 Micrel, Incorporated.
M9999-122303
14
December 2003