MC74F544 OCTAL REGISTERED TRANSCEIVER, INVERTING, 3-STATE OCTAL REGISTERED TRANSCEIVER, INVERTING, 3-STATE The MC74F544 Octal Registered Transceivers contain two sets of D-Type latches for temporary storage of data flowing in either direction. Separate Latch Enable (LEAB, LEBA) and Enable (OEAB, OEBA) inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. The MC74F544 has an inverting data path. The A outputs are guaranteed to sink 24 mA while the B outputs are rated for 64 mA. • • • • • • • • • • • FAST SCHOTTKY TTL Combines 74F245 and 74F373 Type Functions in One Chip 8-Bit Octal Transceiver Inverting Back-to-Back Registers for Storage Separate Controls for Data Flow in Each Direction Glitchless Outputs During 3-State Power Up or Power Down Operation High Impedance Outputs in Power Off State A Outputs Sink 24 mA and Source 3.0 mA B Outputs Sink 64 mA and Source 15 mA See F543 for Noninverting Version ESD Protection > 4000 Volts N SUFFIX PLASTIC CASE 724-03 24 1 DW SUFFIX SOIC CASE 751E-03 24 1 PIN ASSIGNMENT VCC EBA 24 23 B0 B1 B2 B3 B4 B5 B6 B7 LEAB OEAB 22 21 20 19 18 17 16 15 14 13 ORDERING INFORMATION MC74FXXXN Plastic MC74FXXXDW SOIC 1 2 3 LEBA OEBA A0 4 5 6 7 8 9 10 11 A1 A2 A3 A4 A5 A6 A7 EAB GND 12 GUARANTEED OPERATING RANGES Min Typ Max Unit VCC Symbol DC Supply Voltage Parameter 74 4.5 5.0 5.5 V TA Operating Ambient Temperature Range 74 0 25 70 °C IOH Output Current — High 74 — — – 3.0 / – 15 mA IOL Output Current — Low 74 — — 24 / 64 mA FAST AND LS TTL DATA 4-216 MC74F544 FUNCTION TABLE Inputs OEXX EXX LEXX Data Outputs H X X X Z Outputs disabled Status X H X X Z Outputs disabled L L ↑ ↑ L L l h Z Z Outputs disabled Data latched L L L L ↑ ↑ l h H L Data latched L L L L L L L H H L Transparent L L H X NC Hold H = HIGH voltage level: h = HIGH state must be present one set-up time before the LOW-to-HIGH transition of LEXX or EXX (XX = AB or BA): L = LOW voltage level: l = LOW state must be present one set-up time before the LOW-to-HIGH transition of LEXX or EXX (XX = AB or BA): X = Don’t care: Z = HIGH impedance state: NC = No Change. FUNCTIONAL DESCRIPTION The MC74F544 contains two sets of eight D-type latches, with separate input and controls for each set. For data flow from A to B, for example, the A-to-B Enable (EAB) input must be LOW in order to enter data from A0 – A7 or take data from B0 – B7, as indicated in the Function Table. With EAB LOW, a LOW signal on the A-to-B latch enable (LEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With EAB and OEAB both LOW, the 3-State B output buffers are active and reflect the inverted data present at the output of the A latches. Control of data flow from B to A is similar, but using the EBA, LEBA, and OEBA inputs. DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Parameter Min Typ Max Unit Test Conditions (Note 1) VIH VIL Input HIGH Voltage 2.0 — — V Guaranteed Input HIGH Voltage Input LOW Voltage — — 0.8 V Guaranteed Input LOW Voltage VIK Input Clamp Diode Voltage V VCC = MIN, IIN = – 18 mA VCC = 4.5 V IOH = – 3.0 mA VCC = 4.75 V VOH VOL IIH Output HIGH Voltage Output LOW Voltage — – 0.73 – 1.2 2.4 — — 2.7 3.4 — A0 – A7 74 B0 – B7 74 2.0 — — V A0 – A7 74 — 0.35 0.5 V B0 – B7 74 — 0.4 0.55 V Input HIGH Current V IOH = – 15 mA IOL = 24 mA VCC = 4.5 V I/O Pins — — 1.0 mA VCC = MIN IOL = 64 mA VCC = MAX, VIN = 5.5 V Control Pins — — 100 µA VCC = MAX, VIN = 7.0 V Control Pins — — 20 µA I/O Pins — — 70 µA EAB, EBA — — – 1.2 Other Inputs — — – 0.6 IIL Input LOW Current IOZH Off-State Output Current — — IOZL Off-State Output Current, Low-Level Voltage Applied — IOS Output Short Circuit Current (Note 2) ICC Total Supply Current An Outputs Bn Outputs VCC = MAX, VIN = 2.7 V mA VCC = MAX, VIN = 0.5 V 70 µA VCC = MAX, VOUT = 2.7 V — – 600 µA VCC = MAX, VOUT = 0.5 V mA VCC = MAX, VOUT = 0 V mA VCC = MAX – 60 — –150 – 100 — –225 ICCH ICCL — 70 105 — 95 130 ICCZ — 95 125 NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable device type. 2. Not more than one output should be shorted at a time, nor for more than 1 second. FAST AND LS TTL DATA 4-217 MC74F544 AC ELECTRICAL CHARACTERISTICS Symbol Parameter 74F 74F TA = + 25°C VCC = + 5.0 V CL = 50 pF TA = 0 °C to + 70°C VCC = + 5.0 V ± 10% CL = 50 pF Min Typ Max Min Max Unit tPLH tPHL Propagation Delay Transparent Mode An to Bn or Bn to An 2.0 2.0 — — 9.5 6.5 2.0 2.0 10.5 7.5 ns tPLH tPHL Propagation Delay LEBA to An 6.0 4.0 — — 13 9.5 6.0 4.0 14.5 10.5 ns tPLH tPHL Propagation Delay LEAB to Bn 6.0 4.0 — — 13 9.5 6.0 4.0 14.5 10.5 ns tPZH tPZL Output Enable Time OEBA or OEAB to An or Bn EBA or EAB to An or Bn 3.0 4.0 — — 9.0 10.5 3.0 4.0 10 12 ns tPHZ tPLZ Output Disable Time OEBA or OEAB to An or Bn EBA or EAB to An or Bn 1.5 1.5 — — 8.0 7.5 1.5 1.5 9.0 8.5 ns AC OPERATING REQUIREMENTS 74F 74F TA = + 25°C VCC = + 5.0 V CL = 50 pF TA = 0°C to + 70°C VCC = + 5.0 V ± 10% CL = 50 pF Min Typ Max Min Typ Max Unit ts(H) ts(L) Setup Time, HIGH or LOW An or Bn to LEBA or LEAB 3.0 3.0 — — — — 3.0 3.0 — — — — ns th(H) th(L) Hold Time, HIGH or LOW An to Bn to LEBA or LEAB 3.0 3.0 — — — — 3.0 3.0 — — — — ns tw(L) Latch Enable, B to A Pulse Width, LOW 6.0 — — 7.5 — — ns Symbol Parameter FAST AND LS TTL DATA 4-218 MC74F544 LOGIC DIAGRAM DETAIL A D Q LE B0 D A0 Q LE B1 B2 A1 A2 A3 A4 A5 DETAIL A X 7 B3 B4 B5 A6 B6 A7 B7 OEBA OEAB EBA EAB LEBA LEAB NOTE: Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. FAST AND LS TTL DATA 4-219