Order this document by MGP21N60E/D SEMICONDUCTOR TECHNICAL DATA N–Channel Enhancement–Mode Silicon Gate This Insulated Gate Bipolar Transistor (IGBT) uses an advanced termination scheme to provide an enhanced and reliable high voltage–blocking capability. Its new 600 V IGBT technology is specifically suited for applications requiring both a high temperature short circuit capability and a low VCE(on). It also provides fast switching characteristics and results in efficient operation at high frequencies. This new E–series introduces an Energy–efficient, ESD protected, and short circuit rugged device. • • • • • • IGBT IN TO–220 21 A @ 90°C 31 A @ 25°C 600 VOLTS SHORT CIRCUIT RATED LOW ON–VOLTAGE Industry Standard TO–220 Package High Speed: Eoff = 65 mJ/A typical at 125°C High Voltage Short Circuit Capability – 10 ms minimum at 125°C, 400 V Low On–Voltage 2.15 V typical at 20 A, 125°C Robust High Voltage Termination ESD Protection Gate–Emitter Zener Diodes C G C G E CASE 221A–06 TO–220AB E MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Collector–Emitter Voltage VCES 600 Vdc Collector–Gate Voltage (RGE = 1.0 MΩ) VCGR 600 Vdc Gate–Emitter Voltage — Continuous VGE ±20 Vdc Collector Current — Continuous @ TC = 25°C — Continuous @ TC = 90°C — Repetitive Pulsed Current (1) IC25 IC90 ICM 31 21 42 Adc PD 140 1.12 Watts W/°C TJ, Tstg – 55 to 150 °C tsc 10 ms RθJC RθJA 0.9 65 °C/W TL 260 °C Total Power Dissipation @ TC = 25°C Derate above 25°C Operating and Storage Junction Temperature Range Short Circuit Withstand Time (VCC = 400 Vdc, VGE = 15 Vdc, TJ = 125°C, RG = 20 Ω) Thermal Resistance — Junction to Case – IGBT — Junction to Ambient Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 seconds Mounting Torque, 6–32 or M3 screw Apk 10 lbfSin (1.13 NSm) (1) Pulse width is limited by maximum junction temperature. Repetitive rating. Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves — representing boundaries on device characteristics — are given to facilitate “worst case” design. Designer’s is a trademark of Motorola, Inc. TMOS Motorola Motorola, Inc. 1997 Power MOSFET Transistor Device Data 1 MGP21N60E ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit 600 — — 870 — — mV/°C 15 — — Vdc — — — — 10 200 — — 50 — — — 1.6 1.5 2.2 2.0 — 2.5 4.0 — 6.0 10 8.0 — mV/°C gfe — 8.6 — Mhos pF OFF CHARACTERISTICS Collector–to–Emitter Breakdown Voltage (VGE = 0 Vdc, IC = 25 µAdc) Temperature Coefficient (Positive) BVCES Emitter–to–Collector Breakdown Voltage (VGE = 0 Vdc, IEC = 100 mAdc) BVECS Zero Gate Voltage Collector Current (VCE = 600 Vdc, VGE = 0 Vdc) (VCE = 600 Vdc, VGE = 0 Vdc, TJ = 125°C) ICES Gate–Body Leakage Current (VGE = ± 20 Vdc, VCE = 0 Vdc) IGES Vdc µAdc mAdc ON CHARACTERISTICS (1) Collector–to–Emitter On–State Voltage (VGE = 15 Vdc, IC = 10 Adc) (VGE = 15 Vdc, IC = 10 Adc, TJ = 125°C) (VGE = 15 Vdc, IC = 20 Adc) VCE(on) Gate Threshold Voltage (VCE = VGE, IC = 1.0 mAdc) Threshold Temperature Coefficient (Negative) VGE(th) Forward Transconductance (VCE = 10 Vdc, IC = 20 Adc) Vdc Vdc DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VCE = 25 Vdc, Vdc VGE = 0 Vdc, Vdc f = 1.0 MHz) Transfer Capacitance Cies — 1605 — Coes — 146 — Cres — 23 — td(on) — 29 — tr — 60 — td(off) — 238 — tf — 140 — Eoff — 0.8 — mJ td(on) — 28 — ns tr — 62 — td(off) — 338 — tf — 220 — Eoff — 1.3 — mJ QT — 86 — nC Q1 — 18 — Q2 — 39 — — 7.5 — SWITCHING CHARACTERISTICS (1) Turn–On Delay Time Rise Time Turn–Off Delay Time Fall Time (VCC = 360 Vdc, Vd IC = 20 Ad Adc, VGE = 15 Vdc, Vd L = 300 mH H, RG = 20 Ω, TJ = 25 25°C) C) Energy losses include “tail” Turn–Off Switching Loss Turn–On Delay Time Rise Time Turn–Off Delay Time Fall Time (VCC = 360 Vdc, Vd IC = 20 Ad Adc, Vd L = 300 mH VGE = 15 Vdc, H, RG = 20 Ω, TJ = 125°C) 125 C) Energy losses include “tail” Turn–Off Switching Loss Gate Charge (VCC = 360 Vdc, Vdc IC = 20 Adc Adc, VGE = 15 Vdc) ns INTERNAL PACKAGE INDUCTANCE Internal Emitter Inductance (Measured from the emitter lead 0.25″ from package to emitter bond pad) LE nH (1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. 2 Motorola TMOS Power MOSFET Transistor Device Data MGP21N60E 60 60 17.5 V 20 V 12.5 V 40 VGE = 10 V 20 0 4.0 20 V 12.5 V 40 VGE = 10 V 20 6.0 8.0 Figure 2. Output Characteristics, TJ = 125°C 20 TJ = 125°C 10 25°C 0 7.0 5.0 9.0 11 15 13 17 2.3 IC = 20 A 2.1 15 A 1.9 1.7 10 A VGE = 15 V 80 ms PULSE WIDTH 1.5 –50 0 –25 25 50 75 100 125 VGE, GATE–TO–EMITTER VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (°C) Figure 3. Transfer Characteristics Figure 4. Collector–To–Emitter Saturation Voltage versus Junction Temperature VGE, GATE–TO–EMITTER VOLTAGE (VOLTS) 4000 TJ = 25°C VGE = 0 3200 2400 Cies Coes 1600 VCE , COLLECTOR–TO–EMITTER VOLTAGE (VOLTS) Figure 1. Output Characteristics, TJ = 25°C 30 Cres 0 0 6.0 VCE, COLLECTOR–TO–EMITTER VOLTAGE (VOLTS) 40 800 4.0 VCE, COLLECTOR–TO–EMITTER VOLTAGE (VOLTS) VCE = 100 V 50 2.0 0 60 IC , COLLECTOR CURRENT (AMPS) 15 V 0 2.0 0 C, CAPACITANCE (pF) 17.5 V TJ = 125°C 15 V IC , COLLECTOR CURRENT (AMPS) IC , COLLECTOR CURRENT (AMPS) TJ = 25°C 5.0 10 15 20 25 20 QT 16 12 Q1 Q2 8.0 TJ = 25°C VCC = 300 V IC = 20 A 4.0 0 0 25 50 75 100 VCE, COLLECTOR–TO–EMITTER VOLTAGE (VOLTS) QG, TOTAL GATE CHARGE (nC) Figure 5. Capacitance Variation Figure 6. Gate–To–Emitter Voltage versus Total Charge Motorola TMOS Power MOSFET Transistor Device Data 150 125 3 MGP21N60E IC = 20 A 1.3 TURN–OFF ENERGY LOSSES (mJ) TURN–OFF ENERGY LOSSES (mJ) 1.5 TJ = 125°C VDD = 360 V VGE = 15 V 1.1 IC = 15 A 0.9 0.7 IC = 10 A 0.5 15 25 35 1.2 IC = 15 A IC = 10 A 0.8 0.4 45 –50 50 75 100 Figure 8. Turn–Off Losses versus Junction Temperature 0.8 0.6 0.4 0.2 0 0 25 Figure 7. Turn–Off Losses versus Gate Resistance 5.0 10 15 20 IC , COLLECTOR–TO–EMITTER CURRENT (AMPS) 1.0 0 TJ, JUNCTION TEMPERATURE (°C) TJ = 125°C VCC = 360 V VGE = 15 V RG = 20 W 1.2 –25 RG, GATE RESISTANCE (OHMS) 1.4 TURN–OFF ENERGY LOSSES (mJ) IC = 20 A 0 5.0 4 VCC = 360 V VGE = 15 V RG = 20 W 1.6 125 150 100 10 TJ = 125°C RGE = 20 W VGE = 15 V 1.0 1.0 10 100 IC, COLLECTOR–TO–EMITTER CURRENT (AMPS) VCE, COLLECTOR–TO–EMITTER VOLTAGE (VOLTS) Figure 9. Turn–Off Losses versus Collector–To–Emitter Current Figure 10. Reverse Biased Safe Operating Area 1000 Motorola TMOS Power MOSFET Transistor Device Data MGP21N60E PACKAGE DIMENSIONS –T– B SEATING PLANE C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ––– ––– 0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ––– ––– 2.04 CASE 221A–06 TO–220AB ISSUE Y Motorola TMOS Power MOSFET Transistor Device Data 5 MGP21N60E Motorola reserves the right to make changes without further notice to any products herein. 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