Order this document by MGP20N40CL/D SEMICONDUCTOR TECHNICAL DATA 20 AMPERES VOLTAGE CLAMPED N–CHANNEL IGBT VCE(on) = 1.8 VOLTS 400 VOLTS (CLAMPED) This Logic Level Insulated Gate Bipolar Transistor (IGBT) features Gate–Emitter ESD protection, Gate–Collector overvoltage protection from SMARTDISCRETES monolithic circuitry for usage as an Ignition Coil Driver. • Temperature Compensated Gate–Collector Clamp Limits Stress Applied to Load • Integrated ESD Diode Protection • Low Threshold Voltage to Interface Power Loads to Logic or Microprocessors • Low Saturation Voltage • High Pulsed Current Capability C G G C Rge E CASE 221A–09 STYLE 9 TO–220AB E MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Collector–Emitter Voltage VCES CLAMPED Vdc Collector–Gate Voltage VCGR CLAMPED Vdc VGE CLAMPED Vdc IC 20 Adc ICR 12 Apk PD 150 Watts ESD 3.5 kV TJ, Tstg – 55 to 175 °C RqJC RqJA 1.0 62.5 °C/W TL 260 °C Gate–Emitter Voltage Collector Current — Continuous @ TC = 25°C Reversed Collector Current – pulse width t 100 ms Total Power Dissipation @ TC = 25°C (TO–220) Electrostatic Voltage — Gate–Emitter Operating and Storage Temperature Range THERMAL CHARACTERISTICS Thermal Resistance — Junction to Case – (TO–220) — Junction to Ambient Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 seconds 10 lbfin (1.13 Nm) Mounting Torque, 6–32 or M3 screw UNCLAMPED INDUCTIVE SWITCHING CHARACTERISTICS Single Pulse Collector–Emitter Avalanche Energy @ Starting TJ = 25°C @ Starting TJ = 150°C EAS mJ 550 150 SMARTDISCRETES is a trademark of Motorola, Inc. This document contains information on a new product. Specifications and information herein are subject to change without notice. REV 1 TMOS Motorola Motorola, Inc. 1997 Power MOSFET Transistor Device Data 1 MGP20N40CL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max 370 405 430 — — — — 500 100 Unit OFF CHARACTERISTICS Collector–to–Emitter Breakdown Voltage (IClamp = 10 mA, TJ = –40 to 150°C) V(BR)CES Zero Gate Voltage Collector Current (VCE = 350 V, VGE = 0 V, TJ = 150°C) (VCE = 15 V, VGE = 0 V, TJ = 150°C) ICES Resistance Gate–Emitter (TJ = –40 to 150°C) RGE 10k 16k 30k Gate–Emitter Breakdown Voltage (IG = 2 mA) V(BR)GES 11 13 15 "V IECS — — 50 mA V(BR)ECS 26 40 120 V 1.0 0.75 1.7 — 2.2 1.8 — — — 1.1 1.4 1.4 1.4 1.9 1.8 gfe 10 18 — S pF Collector–Emitter Reverse Leakage (VCE = –15 V, TJ = 150°C) Collector–Emitter Reversed Breakdown Voltage (IE = 75 mA) Vdc mA W ON CHARACTERISTICS (1) Gate Threshold Voltage (VCE = VGE, IC = 1 mA) (VCE = VGE, IC = 1 mA, TJ = 150°C) VGE(th) Collector–Emitter On–Voltage (VGE = 5 V, IC = 5 A) (VGE = 5 V, IC = 10 A) (VGE = 5 V, IC = 10 Adc, TJ = 150°C) VCE(on) Forward Transconductance (VCE u 5.0 V, IC = 10 A) V V DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VCE = 25 Vdc, Vdc VGE = 0 Vdc, Vdc f = 1.0 MHz) Transfer Capacitance Cies — 2800 — Coes — 200 — Cres — 25 — SWITCHING CHARACTERISTICS (1) Total Gate Charge Gate–Emitter Charge Qg — 45 80 Qge — 8.0 — Qgc — 20 — ( CC = 320 V,, IC = 20 A,, (V L = 200 mH, RG = 1 KW) td(off) — 14 — tf — 4.0 — ((VCC = 14 V,, IC = 20 A,, L = 200 mH, RG = 1 KW) td(on) — 2.0 — tr — 6.0 — (VCC = 280 V, V IC = 20 A, A VGE = 5 V) Gate–Collector Charge Turn–Off Delay Time Fall Time Turn–On Delay Time Rise Time nC µs µs (1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. 2 Motorola TMOS Power MOSFET Transistor Device Data MGP20N40CL TYPICAL ELECTRICAL CHARACTERISTICS 40 VGE = 10 V I C , COLLECTOR CURRENT (AMPS) TJ = 25°C 30 4V 20 10 3V 0 0 2 4 6 8 I C , COLLECTOR CURRENT (AMPS) 20 3V 10 0 1 2 3 4 5 6 7 8 VCE, COLLECTOR–TO–EMITTER VOLTAGE (VOLTS) VCE, COLLECTOR–TO–EMITTER VOLTAGE (VOLTS) Figure 1. Output Characteristics Figure 2. Output Characteristics VCE = 10 V 30 20 TJ = 125°C 25°C 10 1 4V 0 40 0 TJ = 125°C 5V 30 10 VCE , COLLECTOR–TO–EMITTER VOLTAGE (VOLTS) I C , COLLECTOR CURRENT (AMPS) 40 5V VGE = 10 V 2 3 4 5 9 10 2.2 VGE = 5 V 2.0 IC = 20 A 1.8 15 A 1.6 10 A 1.4 1.2 1.0 –50 50 0 100 VGE, GATE–TO–EMITTER VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (°C) Figure 3. Transfer Characteristics Figure 4. Collector–to–Emitter Saturation Voltage versus Junction Temperature 150 10000 TJ = 25°C C, CAPACITANCE (pF) VGE = 0 V Cies 1000 Coes 100 Cres 10 1.0 0 25 50 75 100 125 150 175 200 VCE, COLLECTOR–TO–EMITTER VOLTAGE (VOLTS) Figure 5. Capacitance Variation Motorola TMOS Power MOSFET Transistor Device Data 3 20 8 Qg IL, LATCH CURRENT (AMPS) VGE, GATE–TO–EMITTER VOLTAGE (VOLTS) MGP20N40CL 6 Qge Qgc 4 2 0 TJ = 25°C IC = 20 A 0 10 20 30 12 10 mH 8 4 0 40 3 mH 16 0 25 50 75 100 125 Qg, TOTAL GATE CHARGE (nC) TEMPERATURE (°C) Figure 6. Gate–to–Emitter Voltage versus Total Charge Figure 7. Latch Current versus Temperature r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1.0 D = 0.5 0.2 0.1 0.1 P(pk) 0.05 0.02 t1 0.01 t2 DUTY CYCLE, D = t1/t2 SINGLE PULSE 0.01 1.0E – 05 1.0E – 04 1.0E – 03 1.0E – 02 1.0E – 01 RθJC(t) = r(t) RθJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) – TC = P(pk) RθJC(t) 1.0E+00 1.0E+01 t, TIME (s) Figure 8. Thermal Response 4 Motorola TMOS Power MOSFET Transistor Device Data MGP20N40CL PACKAGE DIMENSIONS –T– NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. SEATING PLANE C T S 4 A Q 1 2 3 STYLE 9: PIN 1. 2. 3. 4. U H K Z L R V J G D N GATE COLLECTOR EMITTER COLLECTOR DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ––– ––– 0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ––– ––– 2.04 CASE 221A–09 ISSUE Z Motorola reserves the right to make changes without further notice to any products herein. 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