PHILIPS PHX6NA60E

Philips Semiconductors
Objective specification
PowerMOS transistors
Low capacitance
Avalanche energy rated
PHX6NA60E
FEATURES
SYMBOL
QUICK REFERENCE DATA
d
• Repetitive Avalanche Rated
• Fast switching
• Low feedback capacitance
• Stable off-state characteristics
• High thermal cycling performance
• Low thermal resistance
VDSS = 600 V
ID = 3.9 A
g
RDS(ON) ≤ 1.2 Ω
s
GENERAL DESCRIPTION
PINNING
N-channel, enhancement mode
field-effect
power
transistor,
intended for use in off-line switched
mode power supplies, T.V. and
computer monitor power supplies,
d.c. to d.c. converters, motor control
circuits and general purpose
switching applications.
PIN
SOT186A
DESCRIPTION
case
1
gate
2
drain
3
source
case
isolated
The PHX6NA60E is supplied in the
SOT186A full pack, isolated
package.
1 2 3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDSS
VDGR
VGS
ID
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Tj = 25 ˚C to 150˚C
Tj = 25 ˚C to 150˚C; RGS = 20 kΩ
IDM
PD
Tj, Tstg
Pulsed drain current
Total dissipation
Operating junction and
storage temperature range
- 55
600
600
± 30
3.9
2.6
26
45
150
V
V
V
A
A
A
W
˚C
MIN.
MAX.
UNIT
-
570
mJ
-
9.5
6.5
mJ
A
Ths = 25 ˚C; VGS = 10 V
Ths = 100 ˚C; VGS = 10 V
Ths = 25 ˚C
Ths = 25 ˚C
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
EAS
Single pulse avalanche
energy
EAR
IAS, IAR
Repetitive avalanche energy1
Avalanche current
Unclamped inductive load, ID = 6.5A;
VDD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω;
VGS = 10 V
1 pulse width and repetition rate limited by Tj max.
January 1998
1
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistors
Low capacitance
Avalanche energy rated
PHX6NA60E
ISOLATION LIMITING VALUE & CHARACTERISTIC
Ths = 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
Visol
R.M.S. isolation voltage from all
three terminals to external
heatsink
f = 50-60 Hz; sinusoidal
waveform;
R.H. ≤ 65% ; clean and dustfree
Cisol
Capacitance from T2 to external f = 1 MHz
heatsink
MIN.
TYP.
-
-
10
MAX.
UNIT
2500
V
-
pF
THERMAL RESISTANCES
SYMBOL PARAMETER
Rth j-hs
Rth j-a
Thermal resistance junction
to heatsink
Thermal resistance junction
to ambient
CONDITIONS
MIN.
with heatsink compound
TYP. MAX. UNIT
-
-
2.78
K/W
-
60
-
K/W
ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN.
V(BR)DSS
VGS = 0 V; ID = 0.25 mA
600
-
-
V
VDS = VGS; ID = 0.25 mA
-
0.1
-
%/K
2.0
3
-
3.0
4.5
2
50
10
1.2
4.0
100
500
200
Ω
V
S
µA
µA
nA
Drain-source breakdown
voltage
∆V(BR)DSS / Drain-source breakdown
∆Tj
voltage temperature
coefficient
Drain-source on resistance
RDS(ON)
VGS(TO)
Gate threshold voltage
gfs
Forward transconductance
IDSS
Drain-source leakage current
TYP. MAX. UNIT
IGSS
VGS = 10 V; ID = 3.25 A
VDS = VGS; ID = 0.25 mA
VDS = 30 V; ID = 3.25 A
VDS = 600 V; VGS = 0 V
VDS = 480 V; VGS = 0 V; Tj = 125 ˚C
Gate-source leakage current VGS = ±30 V; VDS = 0 V
Qg(tot)
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
ID = 6.5 A; VDD = 480 V; VGS = 10 V
-
7
23
75
-
nC
nC
nC
td(on)
tr
td(off)
tf
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 300 V; RD = 56 Ω;
RG = 9.1 Ω
-
-
50
125
110
30
ns
ns
ns
ns
Ld
Ls
Internal drain inductance
Internal source inductance
Measured from drain lead to centre of die
Measured from source lead to source
bond pad
-
3.5
7.5
-
nH
nH
Ciss
Coss
Crss
Input capacitance
Output capacitance
Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
-
140
40
1550
-
pF
pF
pF
January 1998
2
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistors
Low capacitance
Avalanche energy rated
PHX6NA60E
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
IS
Ths = 25˚C
-
-
6.5
A
Ths = 25˚C
-
-
26
A
VSD
Continuous source current
(body diode)
Pulsed source current (body
diode)
Diode forward voltage
IS = 6.5 A; VGS = 0 V
-
-
1.2
V
trr
Qrr
Reverse recovery time
Reverse recovery charge
IS = 6.5 A; VGS = 0 V; dI/dt = 100 A/µs
-
530
6.7
-
ns
µC
ISM
January 1998
MIN.
3
TYP. MAX. UNIT
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistors
Low capacitance
Avalanche energy rated
PHX6NA60E
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
10.3
max
4.6
max
3.2
3.0
2.9 max
2.8
Recesses (2x)
2.5
0.8 max. depth
6.4
15.8
19
max. max.
15.8
max
seating
plane
3 max.
not tinned
3
2.5
13.5
min.
1
0.4
2
3
M
1.0 (2x)
0.6
2.54
0.9
0.7
0.5
2.5
5.08
1.3
Fig.1. SOT186A; The seating plane is electrically isolated from all terminals.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for F-pack envelopes.
3. Epoxy meets UL94 V0 at 1/8".
January 1998
4
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistors
Low capacitance
Avalanche energy rated
PHX6NA60E
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
 Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
January 1998
5
Rev 1.000