SAMSUNG KS0068B

KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTRODUCTION
100 QFP
The KS0068B is a dot matrix LCD driver & controller LSl which is
fabricated by low power CMOS technology.
FUNCTION
• Character type dot matrix LCD driver & controller
• Internal driver: 16 common and 60 segment signal output.
• Display character format; 5 7 dots + cursor, 5 10 dots + cursor
• Easy interface with a 4-bit or 8-bit MPU
• Display character pattern:
5 7 dots format: 192 kinds, 5 10 dots format: 32kinds
• The special character pattern can be programmable by
Character Generator RAM directly.
• A customer character pattern can be programmable by mask
option (KS0068B-00; Standard type)
KS0068B-00
English, Japanese
Numberal
• Automatic power on reset function.
• It can drive a maximum 80 characters by using the kS0065B
or KS0063B, KS0068B externally.
• It is possible to read both Character Generator and Display
Data RAM from MPU.
FEATURES
• Internal Memory
- Character Generator ROM: 8320bits
- Character Generator RAM: 512 bits
- Display Data RAM: 80 8bits for 80 digits.
• Power Supply Voltage; +5Vä10%, +3Vä10%
• Supply voltage for display: 0~-5V(V5)
• CMOS process
• 1/8 duty, 1/11 duty or 1/16 duty: selectable
(1/8 duty; 5 7 dots format 1 line, 1/11 duly; 5 x 10 dots format I line,
1/16 duty: 5 7 dots format 2 line)
• 100 QFP or bare chip available.
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BLOCK DIAGRAM
Power
V1
Parallel/Serial
supply
V2
Data conversion
for
V3
LCD
V4
Drive
V5
DB0 ~ DB3
Circuit
5
5
Busy
Charater
Character
Cursor
Flag
Generator
Generator
Blink
ROM
RAM
Control
( CG ROM )
( CG RAM )
Circuit
8320 bits
512 bits
4
segment
4
8
DB4 ~ DB 7
Input
signal
8
8
Data
Register
Output
Shift
Latch
( S1 - S60 )
Segment 60
Signal
Register
Circuit
Driver
60 - bit
( DR )
8
Buffer
60
60 - bit
60
7
R/W
Display
RS
7
8
Instruction
E
8
Register
( IR )
80
Decoder
( ID )
Data RAM
( DD RAM )
Instruction
38 bits
D
7
7
Address
7
Counter
( AC )
7
OSC 1
16 - bit
Common
Signal
Register
Driver
Timing
16
CLK1
Generation
OSC 2
16
Shift
CLK2
Circuit
M
VDD
GND
Fig. 1. KS0068 functional block diagram.
common
signal
( C 1 - C16 )
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S 47
S 48
S 49
S 50
S 51
S 52
S 53
S 54
S 55
S 56
S 57
S 58
S 59
S 60
C 16
C 15
C 14
C 13
C 12
C 11
C 10
C9
C8
C7
C6
C5
C4
C3
C2
C1
PIN CONFIGURATION
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
S 46
81
50
DB 7
S 45
82
49
DB 6
S 44
83
48
DB 5
S 43
84
47
DB 4
S 42
85
46
DB 3
S 41
86
45
DB 2
S 40
87
44
DB 1
S 39
88
43
DB 0
S 38
89
42
V DD
S 37
90
41
E
S 36
91
40
R/W
S 35
92
39
RS
S 34
93
38
D
S 33
94
37
M
S 32
95
36
CLK 2
S 31
96
35
CLK 1
S 30
97
34
V5
S 29
98
33
V4
S 28
99
32
V3
S 27
100
31
V2
KS0068B
Fig2. 100QFP Top View
Fig2. 100QFP Top View
22
23
24
25
26
27
28
29
30
V1
21
OSC1
20
OSC2
19
VSS
18
S1
S18
17
S2
S19
16
S3
S20
15
S4
S21
14
S5
S22
13
S6
S23
12
S7
S24
11
S8
S25
10
S9
9
S10
8
S11
7
S12
6
S13
5
S14
4
S15
3
S16
2
S17
1
S26
KS0068
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN DESCRIPTION
PIN(No).
VDD(42)
VSS(GND) (27)
V1-V5(30-34)
INPUT/OUTPUT
S1-S60
(1-26, 67-100)
C1-C16
(51-66)
OSC1, OSC2
(29) (28)
Output
Output
Common output
Input (OSC1)
Output (OSC2)
Oscillator
CLK1 (35)
Output
Data latch clock
Power
NAME
DESCRIPTION
Operating Voltage for logical circuit (2.7V ~ 5.5V)
0V (GND)
Negative Supply Bias voltage level for LCD driving
Voltage
Segment output Segent signal output for LCD driving
CLK2 (36)
Data shift clock
M (37)
Alternated
signal for LCD
driver output
Display data
interface
D (38)
Common signal output for LCD driving
Both pin connected to Rf resistor or ceramic
resonator for internal oscillator circuit. In case of
external frequency use only, the frequency is input
to OSC1 terminal.
Clock output terminal for the serially
transfered data to be latched to the driver.
Input
Enable
Read/Write
Register select
Data interface
Read mode
Write mode
register selection input
Low
Input/Output
Resistor or
Ceramic
Resonator
KS0065B
or
KS0063B
Selection
Non selection
Start enable signal to read or write the data
R/W signal input is used to select the read/write
mode
High
DB0-DB7
(43-50)
LCD
Character pattern data, which is corresponding to
each common signal, is supplied to driver serially.
High
Low
RS (39)
LCD
Clock output terminal used when D terminal data
output shifts the inside of the driver.
The alternating signal to convert LCD
drive waveform to AC
High
Low
E(41)
R/W(40)
INTERFACE
Power
Supply
Data register
(for read and write)
Instruction register (for write),
Busy flag, address counter
(for read)
Used for data transfer between the MPU and
KS0068. These terminals are for data bus with
bidirectional three-state.
Initial 4 bit (DB0-DB3) are not used during 4-bit
operation (DB7 can be used as a busy flag)
MPU
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Internal logic of input/output terminal
Input/Output
Input
Logic diagram
No
Pull
up
with
pull
up
Applicable pin
E
RS, R/W
Output
CLK1, CLK2
M,D
Input
Output
DB0-DB7
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
MAXIMUM ABSOLUTE LIMIT (Ta=25Î)
Characteristic
Operating Voltage
Driver Supply Voltage
Input Voltage
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
VDD
VLCD
VIN
PD
T OPR
T STG
Value
-0.3~+7.0
VDD-11.5~VDD+0.3
-0.3 ~ VDD+0.3
500
-30~+85
-55~+125
Unit
V
V
V
mW
Î
Î
( ( ( ( (
~ Voltage greater than above may damage to the circuit (VDD V1 V2 V3 V4 V5)
ELECTRICAL CHARACTERISTICS
ä10%, V
DC Characteristics (VDD=+5V
Characteristic
Operating Voltage
Operating Current (*1)
IDD2
Input Voltage 1
Input Voltage 2
Output Voltage 1
Output Voltage 2
Voltage Drop (*2)
SS =0V,
Symbol
VDD
IDD1
High
Low
High
VIH1
VIL1
VIH2
Low
High
Low
High
VIL2
VOH1
VOL1
VOH2
Low
COM
SEG
VOL2
VdCOM
VdSEG
ILKG
IIN
fEC
duty
tR
tF
fOSC1
fOSC2
Input Leakage Current
Input Low Current
External Clock
Frequency(*3)
Duty
Rise time
Fall time
Internal Clock Frequency(*3)
Ceramic Resonator OSC Frequency
(*3)
LCD driving voltage(*4)
Î)
Ta=-30 ~ +85
Test condition
Ceramic resonator
fosc=250KHz
Resistor oscillation
external clock operation
fosc=270KHz
IOH=-0.205mA
IOL=1.2mA
À
I =40À
IO=-40
O
IO=ä0.1mA
VIN=0 or VDD
VDD=5V (test pull up R)
-
`ä2%
Rf=91K
Min
4.5
-
Typ
0.65
Max
5.5
0.9
-
0.45
0.7
2.2
-0.3
VDD
-1.0
-0.2
2.4
0.9VDD
-
VDD
0.6
VDD
-
1.0
0.4
-
-1
-50
125
45
190
245
-125
250
50
270
250
0.1VDD
1
1
1
-250
350
55
0.2
0.2
350
255
Unit
V
mA
Applicable Pin
V
E, DB0-DB7,
R/W, RS
OSC1
DB0-DB7
CLK1, CLK2,
M, D
À
KHz
%
¶
¶
KHz
C1-C16
S1-S60
E
RS,R/W
OSC1
OSC1, OSC2
VLCD1
VDD-V5
1/5 bias
3.0
10.0
V
V1-V5
VLCD2
1/6 bias
3.0
10.0
Note: *1) Applies to the current value flown in terminal VDD when power is input as follows; VDD=5V, GND=0V, V1=3.4V,
V2=1.8V, V3=0.2V, V4=-1.4V and V5=-3V.
*2) Applied to the voltage drop occuring from terminals VDD, V1, V4 and V5 to each common terminal (C1-C16) when
0.1mA is flown in or out to and from all COM and SEG terminals, and also to voltage drop occuring from terminals
VDD, V2, V3 and V5 to each SEG terminal (S1-S60). When the output level is at VDD, V1 or V2 level, 0.1mA is flown
out, while 0.1mA flow in when the output level is at V3, V4 or V5 level. This occurs when 5V or -5V is input to VDD, V1
and V3 or to V2, V4, and V5 respectively.
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Î
DC Characteristics (VDD=+3Vä10%, VSS=0V, T a=-30 ~ +85 )
Characteristic
Symbol
Test condition
Min
Typ
Max
Unit Applicable Pin
Operating Voltage
VDD
2.7
3.0
3.3
V
Operating Current (*1)
IDD1
Ceramic resonator
0.3
0.5
mA
fosc=250KHz
IDD2
Resistor oscillation
0.17
0.3
external clock operation
fosc=270KHz
Input Voltage 1
High
VIH1
1.9
VDD
V
E, DB0-DB7,
Low
VIL1
-0.3
0.4
R/W, RS
Input Voltage 2
High
VIH2
0.7VDD
VDD
OSC1
Low
VIL2
0.2VDD
Output Voltage 1
High
VOH1
IOH=-0.1mA
2.0
DB0-DB7
Low
VOL1
IOL=0.1mA
0.4
Output Voltage 2
High
VOH2
CLK1, CLK2,
0.8VDD
IO=-40
Low
VOL2
M, D
0.2VDD
IO=40
Voltage Drop (*2)
COM
VdCOM
1
C1-C16
IO=ä0.05mA
SEG
VdSEG
1.5
S1-S60
Input leakage current
ILKG
VIN=0 or VDD
-1
1
E
Input Low Current
IIN
VDD=3V (test pull up R)
-10
-50
-120
RS,R/W
External Clock
Frequency
fEC
125
250
350
KHz
OSC1
(*3)
Duty
duty
45
50
55
%
Rise time
tR
0.2
Fall time
tF
0.2
Internal clock Frequency(*3)
fOSC
190
270
350
KHz
OSC1, OSC2
Rf=75K ä2%
LCD Driving Voltage(*4)
VLCD1
VDD-V5
1/5 bias
3.0
10.0
V
V1-V5
VLCD2
1/4 bias
3.0
10.0
Note: *1) : The supply current value from VDD when power condition is as follows
VDD = 5V, VSS = 0V, V5 = -2V
VDD = 3V, VSS = 0V, V5 = -2V
*2) : The voltage drop from LCD bias terminals VDD, V1, V4 and V5 to each common terminal (C1-C16)
and also to voltage drop LCD bias terminals VDD, V2, V3 and V5 to each segment terminal (S1-S80)
*3) and *4) : Refer to oscillator circuit and input the voltage listed in the table bellow to v1 ~ v5.
À
À
À
`
¶
¶
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
*3) Oscillator circuit
Resistor circuit
External clock cirucit
*4) Input the voltage listed in the table below to V1-V5
Power supply
Duty
1/8, 1/11
1/16
Bias
1/4
1/5
V1
VDD-VLCD/4
VDD-VLCD/5
V2
VDD-VLCD/2
VDD-2VLCD/5
V3
VDD-VLCD/2
VDD-3VLCD/5
V4
VDD-3VLCD/4
VDD-4VLCD/5
V5
VDD-VLCD
VDD-VLCD
~VLCD is the LCD driving voltage, refer to the initial set of the instruction code.
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics (VDD=5V
10%, V
SS=0V,
Š)
Ta=-30 ~ +85
(1) Write mode (Writing data from Micom to KS0068B)
Characteristic
Symbol
Min
E Cycle Time
tc
500
E Rise Time
tR
E Fall Time
tF
E Pulse Width (High, Low)
tW
220
R/W And RS Set-Up Time
tSU1
40
R/W And RS Hold Time
tH1
10
Data Set-Up Time
tSU2
60
Data Hold Time
tH2
10
RS
Typ
-
Max
25
25
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Test pin
E
E
E
E
R/W, RS
R/W, RS
DB0~DB7
DB0~DB7
VIH1
VIH1
VIL1
VIL1
tH1
tSU1
R/W
VIL1
VIL1
tw
E
VIH1
VIH1
VIL1
VIL1
tR
DB0 - DB7
tH1
tSU2
VIH1
VIL1
VIL1
tF
tH2
Valid Data
tC
VIH1
VIL1
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(2) Read mode (Reading data from KS0068B to Micom)
Characteristic
Symbol
Min
E Cycle Time
tc
500
E Rise Time
tR
E Fall Time
tF
E Pulse Width (High, Low)
tW
220
R/W And RS Set-Up Time
tSU
40
R/W And RS Hold Time
tH
10
Data Output Delay Time
tD
Data Hold Time
tDH
20
RS
Typ
-
Max
25
25
120
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Test pin
E
E
E
E
R/W, RS
R/W, RS
DB0~DB7
DB0~DB7
V IH 1
V IH 1
V IL1
V IL1
tH
tSU
R/W
V IL1
tw
tF
tH
V IH 1
E
V IL1
V IL1
V IL1
tR
t DH
tD
DB 0 - DB 7
V IH 1
V IL1
V alid Da ta
tC
V IH 1
V IL1
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(3) Interface mode with KS0065B, KS0063B
Characteristic
Clock Pulse Width High
Clock Pulse Width Low
Data Set-Up Time
Data Hold Time
Clock Set-Up Time
M Delay Time
Symbol
tWCKH
tWCKL
tSU
tDH
tCSU
tDM
0 .9 V
Min
800
800
300
300
500
-1000
D D
Typ
-
0 .9 V
C LK 1
tW
CKH
tW
Max
1000
Unit
ns
ns
ns
ns
ns
ns
D D
CKH
tC S U
C LK 2
0 .9 V
0 .1 V
0 .9 V
0 .1 V
0 .1 V
D D
tC S U
D
M
D D
D D
D D
tW
CKL
0 .9 V D D
0 .1 V D D
0 .9 V D D
0 .1 V D D
tS U
tD H
0 .9 V
tD M
D D
D D
Test pin
CLK
CLK
D
D
CLK
M
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics (VDD=3V
10%, V
SS=0V,
Š)
Ta=-30 ~ +85
(1) Write mode (Writing data from Micon to KS0068B)
Characteristic
Symbol
Min
E Cycle Time
tc
1400
E Rise Time
tR
E Fall Time
tF
E Pulse Width (High, Low)
tW
400
R/W And RS Set-Up Time
tSU1
60
R/W And RS Hold Time
tH1
20
Data Set-Up Time
tSU2
140
Data Hold Time
tH2
10
Typ
-
Max
25
25
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Test pin
E
E
E
E
R/W, RS
R/W, RS
DB0~DB7
DB0~DB7
Min
1400
400
60
20
5
Typ
-
Max
25
25
360
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Test pin
E
E
E
E
R/W, RS
R/W, RS
DB0~DB7
DB0~DB7
(3) Interface mode with KS0065B, KS0063B
Characteristic
Symbol
Min
Clock Pulse Width High
tWCKH
800
Clock Pulse Width Low
tWCKL
800
Data Set-Up Time
tSU
300
Data Hold Time
tDH
300
Clock Set-Up Time
tCSU
500
M Delay Time
tDM
-1000
Typ
-
Max
1000
Unit
ns
ns
ns
ns
ns
ns
Test pin
CLK
CLK
D
D
CLK
M
(2) Read mode (Reading data from KS0068B to Micom)
Characteristic
E Cycle Time
E Rise Time
E Fall Time
E Pulse Width (High, Low)
R/W And RS Set-Up Time
R/W And RS Hold Time
Data Output Delay Time
Data Hold Time
Symbol
tc
tR
tF
tW
tSU
tH
tD
tDH
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CONTROL and DISPLAY COMMAND
Command
DISPLAY CLEAR
RETURN HOME
ENTRY MODE
SET
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
I/D
H
X
SH
Excution
Remark
time
(fosc=250KHz)
1.64ms
1.64ms
cursor move to first digit
•I/D; set cursor move direction
40
¶
I/D
H
Increase
L
Decrease
•SH: Specifies shift of display
SH
DISPLAY
ON/OFF
L
L
L
L
L
L
H
D
C
B
¶
40
H
display is shifted
L
display is not
shifted
•Display
D
H
Display on
L
Display off
H
Cursor on
L
Cursor off
•Cursor
C
•Blinking
B
SHIFT
L
L
L
L
L
H
S/C R/L
X
X
¶
40
SC
R/L
SET
FUNCTION
L
L
L
L
H
DL
N
F
X
X
H
L
¶
40
F
Table 1.
Blinking off
Display shift
H
L
Cursor move
H
Right shift
L
Left shift
H
8 bits interface
L
4 bits interface
H
2 line display
L
1 line display
H
5
L
5
DL
N
Blinking on
10 dots
7 dots
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CONTROL and DISPLAY COMMAND(continued)
Command
SET CG RAM
ADDRESS
SET DD RAM
ADDRESS
READ BUSY
FLAG &
ADDRESS
WRITE DATA
READ DATA
Excution
Remark
time
(fosc=250KHz)
CG RAM address
CG RAM Data is sent and
40
(corresponds to cursor address)
received after this setting
DD RAM Data is sent and
DD RAM address
40
recevied after this setting
Address Counter used for
0
BF H
F
Busy
Both DD & CG RAM address
L
Ready
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
L
L
L
L
L
H
L
H
BF
H
H
L
H
H
¶
¶
¶
Write Data
Read Data
¶
¶
46
46
- Reads BF indication
internal operating is being
performed.
- reads address counter
contents
Write data into DD or CGRAM
Read data from DD or CGRAM
X : Don’t care
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
APPLICATION INFORMATION ACCORDING TO LCD PANEL
1 line, character format; 5
7 dots + 1 cursor line (1/4 bias, 1/8 duty)
C1
C8
S1
KS0068
S 60
2) LCD Panel: 12 character
1 line, character format; 5
10 dots + 1 cursor line (1/4 bias, 1/11 duty)
C1
C11
KS0068
S1
S60
~ ~
~~
~~
~~
~~
~~
~~
~
~
1) LCD Pandel: 12 character
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
3) LCD Panel : 12 character
2 line character format; 5
7 dots + 1 cursor line (1/5 bias, 1/16 duty)
C1
C8
C9
C 16
K S 0 0 68
S1
S 60
4) LCD Panel : 24 character
C1
C8
KS0068
S1
S60
C9
C16
1 line, character format; 5 7 dots + 1 dots + 1 cursor line (1/5 bias, 1/16 duty)
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
5) LCD Panel : 6 character
2 line character format; 5
7 dots + 1 cursor line (1/4
bias, 1/8 duty)
S1
S30
C1
C8
KS0068
S31
S60
BIAS VOLTAGE DIVIDE CIRCUIT
KS0068
VDD
V1
V2
V3
KS0068
V4
V5
VDD
VDD
V1
V2
V3
V4
V5
VDD
R
R
R
( 1/4 bias, 1/8 or 1/11 duty )
APPLICATION CIRCUIT
R
R
-5V or GND
R
R
R
( 1/5 bias, 1/16 duty )
R
-5V or GND
C1 ~ C16
KS0068
DB0 ~ DB7
SC1 ~ SC40
DL1
SHL1
DL2
DR1
DL2
DR1
LCD Panel
SC1 ~ SC40
CL1
DR2
SHL1
FCS
DL1
SC1 ~ SC40
CL2
CL1
DR2
SHL1
FCS
DL1
DL2
DR1
CL2
CL1
DR2
SHL2
M
V SS
VDD
V6 V5 V4 V3 V2 V1 VEE
KS0065B
CL2
SHL2
M
VSS
VDD
V6 V5 V4 V3 V2 V1 VEE
KS0065B
FCS
SHL2
M
VSS
VDD
V6 V5 V4 V3 V2 V1 VEE
KS0065B
S1 ~ S60
D
OSC1
OSC2
VSS
M
CLK1
CLK2
VDD
V1
V2
V3
V4
V5
To MPU
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
KS0068B
APPLICATION CIRCUIT
VDD
V1
V2
V3
V4
V5
GND or
Other voltage
VLCD ( 1/5 bias )
When KS0065B is externally connected to the KS0068, you can increase the number of display digits up to 80 characters.
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD DIAGRAM
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
2
78
3
77
4
76
5
75
6
74
KS0068B
1
7
8
9
73
72
71
Y
10
70
11
69
12
68
13
67
X
(0,0)
14
66
15
65
16
64
17
63
3 4980
PAD SIZE : 100 3 100
UNIT
: œm
18
62
CHIP SIZE : 5770
19
20
61
60
21
59
22
58
23
57
24
56
25
55
26
54
27
53
28
52
29
51
30
31
32
33
34
35
36
37
38
39
* KS0068B Marking : easy to find the PAD No.72,81
40
41
42
43
44
45
46
47
48
49
50
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
sm)
PAD LOCATION
UNIT (
PAD
NUMBER
PAD
NAME
PAD
NUMBER
PAD
NAME
1686
35
CLK1
-453
X
Y
-2358
69
SEG58
1684
436
-1684
1560
36
CLK2
-328
-2358
SEG24
-1684
1436
37
70
SEG57
1684
560
M
-203
-2358
71
SEG56
1684
4
SEG23
-1684
1310
686
38
D
-78
-2358
72
SEG55
1684
5
SEG22
-1684
810
1186
39
RS
47
-2358
73
SEG54
1684
6
SEG21
936
-1684
1060
40
R/W
172
-2358
74
SEG53
1684
1060
7
8
SEG20
-1684
936
41
E
297
-2358
75
SEG52
1684
1186
SEG19
-1684
810
42
VDD
422
-2358
76
SEG51
1684
1310
9
SEG18
-1684
686
43
DB0
547
-2358
77
SEG50
1684
1436
10
SEG17
-1684
560
44
DB1
672
-2358
78
SEG49
1684
1560
11
SEG16
-1684
436
45
DB2
797
-2358
79
SEG48
1684
1686
12
SEG15
-1684
310
46
DB3
922
-2358
80
SEG47
1249
2358
13
SEG14
-1684
186
47
DB4
1047
-2358
81
SEG46
1124
2358
14
SEG13
-1684
60
48
DB5
1172
-2358
82
SEG45
999
2358
15
SEG12
-1684
-64
49
DB6
1297
-2358
83
SEG44
874
2358
16
SEG11
-1684
-190
50
DB7
1422
-2358
84
SEG43
749
2358
17
SEG10
-1684
-314
51
COM1
1684
-1814
85
SEG42
624
2358
18
SEG9
-1684
-440
52
COM2
1684
-1690
86
SEG41
499
2358
19
SEG8
-1684
-564
53
COM3
1684
-1564
87
SEG40
374
2358
20
SEG7
-1684
-690
54
COM4
1684
-1440
88
SEG39
249
2358
21
SEG6
-1684
-814
55
COM5
1684
-1314
89
SEG38
124
2358
22
SEG5
-1684
-940
56
COM6
1684
-1190
90
SEG37
-1
2358
23
SEG4
-1684
-1064
57
COM7
1684
-1064
91
SEG36
-126
2358
24
SEG3
-1684
-1190
58
COM8
1684
-940
92
SEG35
-251
2358
25
SEG2
-1684
-1314
59
COM9
1684
-814
93
SEG34
-376
2358
26
SEG1
-1684
-1440
60
COM10
1684
-690
94
SEG33
-501
2358
27
VSS
-1684
-1702
61
COM11
1684
-564
95
SEG32
-626
2358
28
OSC2
-1684
-1868
62
COM12
1684
-440
96
SEG31
-751
2358
29
OSC1
-1684
-1994
63
COM13
1684
-314
97
SEG30
-876
2358
30
V1
-1078
-2358
64
COM14
1684
-190
98
SEG29
-1001
2358
31
V2
-953
-2358
65
COM15
1684
-64
99
SEG28
-1126
2358
32
V3
-828
-2358
66
COM16
1684
60
100
SEG27
-1251
2358
33
V4
-703
-2358
67
SEG60
1684
186
34
V5
-578
-2358
68
SEG59
1684
310
COORDINATE
PAD
NUMBER
PAD
NAME
X
Y
1
SEG26
-1684
2
SEG25
3
COORDINATE
X
Y
COORDINATE
KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Standard Character Pattern (KS0068B-00)