KS0105 32 CH COMMON DRIVER FOR DOT MATRIX LCD _ INTRODUCTION 64 QFP KS0105 is a LCD driver LSI which is fabricated by low power CMOS high voltage process technology. This device consists of timing generator circuit, 32 bit shift register and 32 bit driver. FUNCTION • Dot matrix LCD common driver with 32 channel output • Input /Output signal - Input: bias voltage (V1, V2, V5, V6, VEE) - Output; 32 channel waveform for LCD driving and segment driver control pulse. FEATURE • Power supply voltage: +5V±10% • Supply voltage for display: 0~-5.5V(VEE) • Applicable LCD duty; selectable 7 kinds (1/8, 1/12, 1/16, 1/24, 1/32, 1/48, 1/64) • Interface COMMON Other KS0105 SEGMENT KS0106 • Oscillator frequency can be set by adjusting external capacitor and resistor • 64 QFP or bare chip available. BLOCK DIAGRAM C 1 C2 C 31 C 32 VDD V SS V1 V EE V2 32 bit LCD driver V5 V6 32 bit shift register DL DR SHL M OSCR OSC O S C IN fO S C CL Timing generator circuit circuit FRM CLK1 OSCC CLK2 M/S TEST F0 F1 DD0 DD1 DD2 Fig 1. KS0105 Functional block diagram KS0105 32 CH COMMON DRIVER FOR DOT MATRIX LCD VEE 32 V1 31 33 V2 34 V5 35 V6 36 C32 37 C31 38 C30 39 C29 40 C28 41 C27 42 C26 43 C25 44 C24 45 C23 46 C22 47 C21 48 C20 49 C19 PIN CONFIGURATION C18 50 30 NC C17 51 29 DR C16 52 28 CL C15 53 27 NC C14 54 26 M 25 NC C12 56 24 VDD C11 57 23 FRM C10 58 22 CLK1 C9 59 21 CLK2 C8 60 20 M/S 19 SHL C13 55 KS0105 OSCIN, OSCR, OSCC (15-17) Output C1-C32 (36-60, 1-7) DL, DR(8, 29) Input/Output M(26) Input/Output 18 DESCRIPTION 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 NAME TEST OSCR OSCIN OSCC DD2 DD1 DD0 F1 F0 VSS DL C1 C2 C3 C4 Operating Voltage For Internal logic circuit (+5V¡¾10%) GND (0V) Negative Supply For LCD driver circuit Voltage Fig 2. 60 QFP Top View Oscillator Generate Oscillation Frequency (refer to note 1) C5 Power C6 INPUT/OUTPUT C7 PIN(No.) VDD(24) VSS(9) VEE(31) 2 1 PIN DESCRIPTION Common Output Common signal output for LCD driving (refer to note 4) Data Input or Output Data input/output pin of internal shift register Alternated Signal For LCD Driver Alternating signal input pin for LCD driving Master mode Slave mode Output Input INTERFACE Power Supply LCD Other KS0105 KS0106 KS0105 32 CH COMMON DRIVER FOR DOT MATRIX LCD PIN DESCRIPTION (continued) PIN(NO.) V1, V2(32, 33) V5, V6(34, 35) INPUT/OUTPUT Input NAME Bias Voltage DESCRIPTION Bias supply voltage terminals to drive the LCD Select level V1-V2 CL (28) Input/Output Shift Clock Non-select level V5-V6 Data Shift Clock KS0106 Master mode Slave mode FRM (23) SHL (19) Ouput Input Frame Signal Data Interface Output Operating Clock Input - DD0-DD2 (12-14) Input F0-F1 (10, 11) Input M/S(20) Input Output Input Synchronous frame signal Selection of the shift direction (slave mode) (master mode) SHL VSS VDD CLK1, CLK2 (22, 21) TEST (18) INTERFACE Power DL out in DR in out KS0106 VDD or VSS SHL Shift Direction VSS DL¡çDR VDD DL¡æDR Clock for KS0106 KS0106 Test pin (This pin must be connected VDD) Select Display Duty Can select the duty ratio according to combination of DD0-DD2 (refer to note 2) Select Frequency Can select the relationship between oscillator frequency and frame frequency. (refer to note 3) Select Master • Master mode: connect VDD or Slave - Operated the oscillator and timing generation circuit. • Slave mode: connected VSS - not operated the oscrillator and timing generation circuit. - Unnecessary pins (F0, F1, DD0-DD2, TEST) Connect VDD for prevent floating current. VDD VDD or VSS VDD or VSS VDD or VSS MAXIMUM ABSOLUTE LIMIT(Ta=25¡É) Characteristics Operating Voltage Symbol VDD Value -0.3~+7.0 Driver Supply Voltage VLCD *1 VDD-13.5~VDD+0.3 Input Voltage VIN1 -0.3~VDD+0.3 Unit V Test pin VDD, VSS, VEE DL, DR, M, SHL FO, FI, M/S, DD0-DD2 VIN2*2 VEE-0.3~VDD+0.3 Operating Temperature T OPR -20~+75 Storage Temperature T STG -55~+125 * Voltage greater than above may damage to the circuit. *1 VEE : connect a protection resistor (20Ω±5%) *2 connect a protection resistor (47Ω±10%) V1, V2, V5, V6 µA - KS0105 32 CH COMMON DRIVER FOR DOT MATRIX LCD ELECTRICAL CHARACTERISTICS DC Characteristics(VDD=+5V±10%, VSS=0V, Ta=25°C) Characteristic Operating voltage Oscillator frequency Input Voltage High Symbol VDD fOSC VIH condition Rf=68kΩ±2% Cf=10pF±5% - Min 4.5 300 0.7VDD Typ 430 - Max 5.5 560 VDD Unit V kHz Low High Low On Resistance (V-C) VIL VOH VOL RON 0 VDD-0.4 - - 0.3VDD 0.4 1 V kΩ Input Leakage Current ILKG1 IOH=-400 µs IOL=400 µs VEE=-5V+10% Load Current150 µs VIN=VDD~VSS -1 - 1 µs VIN=VDD~VEE RC Oscillation, 430kHz, 1/32 duty Rf=68kΩ±2%, Cf=10pF±5% Frame 70Hz, 1/32 duty -5 - - 5 4.4 mW - - 1.1 Output voltage Power Dissipation Master ILKG2 PD1 Slave PD2 Note 1: Oscillation frequency (fosc) Applicable Pin VDD, VSS OSCR, OSCIN, OSCC OSCIN, F0,F1,M, DD0-DD2, SHL, M/S CL, DR, DL, TEST DL, DR, M, FRM CL, CLK1, CLK2 OSCIN, F0,F1,M, DD0-DD2, SHL, M/S CL, DR, DL, TEST V1, V2, V5, V6 VDD, VSS Note 4: Rf OSCR Cf O S C IN M D H H L H L OSCC L Output level V2 V6 V1 V5 Note 2: Selects frequency Duty Duty ratio DD0 1/8 L 1/12 L 1/16 L DD1 L H DD2 L H Mode 1/24 H 1/32 H 1/48 H 1/64 H H L L H H L H L H L Master mode Note 3: Selects frequency Condition Master/slave mode F1 L Oscillator frequency (KHz) 107.5 Frame frequency (Hz) 70 M signal frequency (Hz) 35 H L 107.5 70 35 53.8 L H 215.0 70 35 107.5 H H 430.0 70 35 215.0` F0 L CLK1, CLK2 frequency (KHz) 53.8 KS0105 32 CH COMMON DRIVER FOR DOT MATRIX LCD APPLICATION CIRCUIT M/S VDD TEST DL OSC C OSC IN VDD VDD VDD VDD VSS DD 1 DD 2 F0 F1 OSC R VSS VDD VEE KS0105 (Master) DR VDD Cf Rf C1 VDD Open V5 V6 V2 V5 V6 VDD VEE VSS DD 0 V1 V1 V2 • 1/64 Duty SHL CL M C32 FRM to LCD Panel CLK1 CLK2 TO LCD VSS TEST OSC C M/S VDD OSC IN VDD VSS VDD VEE V5 V6 Open VDD Open DD1 DD2 F0 F1 OSC R Open V1 V2 V5 V6 VDD VEE VSS DD0 V1 V2 VDD C33 DL Open DR VDD SHL KS0105 (Master) CL M FRM to KS0106 Open CLK1 Open CLK2 C64 V DD V2 V5 OSC C OSC R M/S SHL MPU CLK2 TEST CL IN OSC CLK1 V3 RST E D/I R/W V1 CS 3 CS 2 CS 1 VSS VDD DB 0-DB7 V6 CL M (20¥Ø) VDD R/W 14 KS0106 RST FRM 14 DB 0 -DB 7 M V4 5 D/I S1-S 50 V DD CLK1 GND CLK2 5 5 CL M FRM CLK1 CLK2 VEE V4 V3 V2 V1 CS 3 FRM 5 5 S 1-S50 KS0106 RST VEE 14 DB 0 -DB 7 V6 D/I LCD PANEL V DD V5 GND V2 5 5 CL M FRM CLK1 CLK2 VEE V4 V3 V2 V1 CS 1 V1 CS 2 V SS F1 F0 DD2 CS 3 V DD C1-C 32 CS 1 V SS R/W CS 2 V DD R/W DD1 S1-S 50 14 DB 0 -DB 7 V SS V DD V DD VEE V4 V3 V2 V1 CS 1 DD0 CS 2 V SS R f Cf CS 3 KS0105 D/I KS 010 6 V DD 5 KS0105 32 CH COMMON DRIVER FOR DOT MATRIX LCD APPLICATION CIRCUIT(continued) GND RST E E E KS0105 32 CH COMMON DRIVER FOR DOT MATRIX LCD PAD DIAGRAM 1 60 59 58 57 56 55 54 53 52 51 50 49 48 2 47 46 45 3 44 4 43 5 42 KS0105 6 41 7 CHIP SIZE : 3820 ¡¿ 3820 40 PAD SIZE : 100¡¿100 UNIT : ¥ì m 8 39 9 38 10 37 11 36 12 35 13 Y 14 34 15 33 16 17 18 19 20 21 22 23 24 26 28 29 32 31 (0,0) X KS0105 32 CH COMMON DRIVER FOR DOT MATRIX LCD PAD LOCATION UNIT (µm) PAD NUMBER 1 PAD NAME C7 COORDINATE X Y 194.5 3698 PAD NUMBER 33 PAD NAME V2 2 C6 120.5 3 C5 120.5 4 C4 5 6 3408 34 V5 3699.5 3136 35 V6 3699.5 930 120.5 2956 36 C32 3699.5 1110 C3 120.5 2684 37 C31 3699.5 1382 C2 120.5 2504 38 C30 3699.5 1562 7 C1 120.5 2232 39 C29 3699.5 1834 8 DL 249.5 1914 40 C28 3699.5 2014 9 VSS 249.5 1718 41 C27 3699.5 2286 10 F0 249.5 1538 42 C26 3699.5 2466 11 F1 249.5 1354 43 C25 3699.5 2738 12 DD0 249.5 1170 44 C24 3699.5 2918 13 DD1 249.5 986 45 C23 3699.5 3190 14 DD2 249.5 802 46 C22 3699.5 3370 15 OSCC 249.5 618 47 C21 3699.5 3642 16 OSCR 249.5 434 48 C20 3642.5 3698 17 OSCIN 249.5 250 49 C19 3190.5 3698 18 TEST 536.5 251 50 C18 3010.5 3698 19 SHL 720.5 251 51 C17 2738.5 3698 20 M/S 904.5 251 52 C16 2558.5 3698 21 CLK2 1088.5 251 53 C15 2286.5 3698 22 CLK1 1272.5 251 54 C14 2106.5 3698 23 FRM 1456.5 251 55 C13 1834.5 3698 24 VDD 1652.5 251 56 C12 1654.5 3698 25 NC * * 57 C11 1382.5 3698 26 M 2208.5 251 58 C10 1122.5 3698 27 NC * * 59 C9 850.5 3698 28 CL 2392.5 251 60 C8 466.5 3698 29 DR 2576.5 251 30 NC * * 31 VEE 3396.5 142 32 V1 3699.5 206 COORDINATE X Y 3699.5 478 658