SEMTECH SMF05TC

SMF05 AND SMF12
TVS Diode Array
For ESD and Latch-Up Protection
PROTECTION PRODUCTS
Description
Features
u Transient protection for data lines to
The SMF series TVS arrays are designed to protect sensitive electronics from damage or latch-up due to ESD
and other voltage-induced transient events. They are
designed for use in applications where board space is at
a premium. Each device will protect up to four lines.
They are unidirectional devices and may be used on lines
where the signal polarities are above ground.
TVS diodes are solid-state devices designed specifically
for transient suppression. They feature large cross-sectional area junctions for conducting high transient currents. They offer desirable characteristics for board level
protection including fast response time, low operating
and clamping voltage, and no device degradation.
The SMF series devices may be used to meet the immunity requirements of IEC 61000-4-2, level 4. The small
SC70 package makes them ideal for use in portable electronics such as cell phones, PDA’s, notebook computers, and digital cameras.
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Mechanical Characteristics
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EIAJ SC70-5L package
Molding compound flammability rating: UL 94V-0
Marking : Marking Code
Packaging : Tape and Reel per EIA 481
Applications
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Circuit Diagram
1
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
Small package for use in portable electronics
Protects four I/O lines
Working voltage: 5V & 12V
Low leakage current
Low operating and clamping voltages
Solid-state silicon-avalanche technology
Cellular Handsets & Accessories
Cordless Phones
Personal Digital Assistants (PDA’s)
Notebooks & Handhelds
Portable Instrumentation
Digital Cameras
Peripherals
MP3 Players
Schematic & PIN Configuration
3
4
5
5
1
2
3
4
2
SC70-5L (Top View)
Revision 9/2000
1
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SMF05 & SMF12
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Symbo l
Value
Units
Peak Pulse Pow er (tp = 8/20ms)
Pp k
200
Watts
Peak Pulse Current (tp = 8/20ms)
I PP
12
A
Peak Forw ard Voltage (IF = 1A, tp =8/20ms)
V FP
1.5
V
ESD p er IEC 61000-4-2 (Air)
ESD p er IEC 61000-4-2 (Contact)
V ESD
20
15
kV
Lead Soldering Temp erature
TL
260 (10 seconds)
o
Op erating Temp erature
TJ
-55 to +125
o
TSTG
-55 to +150
o
Storage Temp erature
C
C
C
Electrical Characteristics
SMF05
Par ame te r
Symbo l
Co nd itio ns
Minimum
Typ ical
Maximum
Units
5
V
Reverse Stand-Off Voltage
VRWM
Reverse Breakdow n Voltage
V BR
It = 1mA
Reverse Leakage Current
IR
VRWM = 5V, T=25°C
10
µA
Clamp ing Voltage
VC
IPP = 1A, tp = 8/20µs
9.5
V
Clamp ing Voltage
VC
IPP = 12A, tp = 8/20µs
12.5
V
Junction Cap acitance
Cj
Betw een I/O p ins and
Gnd
V R = 0V, f = 1MHz
150
175
pF
Symbo l
Co nd itio ns
Typ ical
Maximum
Units
12
V
6
V
SMF12
Par ame te r
Minimum
Reverse Stand-Off Voltage
VRWM
Reverse Breakdow n Voltage
V BR
It = 1mA
Reverse Leakage Current
IR
VRWM = 12V, T=25°C
1
µA
Clamp ing Voltage
VC
IPP = 1A, tp = 8/20µs
19
V
Clamp ing Voltage
VC
IPP = 8A, tp = 8/20µs
25
V
Junction Cap acitance
Cj
Betw een I/O p ins and
Gnd
V R = 0V, f = 1MHz
75
pF
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13.3
V
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SMF05 & SMF12
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
Power Derating Curve
110
10
90
% of Rated Power or I PP
Peak Pulse Power - P PP (kW)
100
1
0.1
80
70
60
50
40
30
20
10
0
0.01
0.1
1
10
100
0
1000
25
Pulse Waveform
75
100
125
150
Clamping Voltage vs. Peak Pulse Current
110
30
90
80
70
e
60
Clamping Voltage - V C (V)
Waveform
Parameters:
tr = 8µs
td = 20µs
100
Percent of IPP
50
Ambient Temperature - TA (oC)
Pulse Duration - tp (µs)
-t
50
40
td = IPP/2
30
20
25
20
SMF12
15
SMF05
10
Waveform
Parameters:
tr = 8µs
td = 20µs
5
10
0
0
0
5
10
15
20
25
0
30
SMF05 ESD Clamping
(8kV Contact per IEC 61000-4-2)
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2
4
6
8
10
12
14
16
Peak Pulse Current - IPP (A)
Time (µs)
SMF12 ESD Clamping
(8kV Contact per IEC 61000-4-2)
3
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SMF05 & SMF12
PROTECTION PRODUCTS
Applications Information
SMF Circuit Diagram
Device Connection for Protection of Four Data Lines
The SMFxx is designed to protect up to four unidirectional data lines. The device is connected as follows:
1
3
4
5
1. Unidirectional protection of four I/O lines is
achieved by connecting pins 1, 3, 4, and 5 to the
data lines. Pin 2 is connected to ground. The
ground connection should be made directly to the
ground plane for best results. The path length is
kept as short as possible to reduce the effects of
parasitic inductance in the board traces.
2
Circuit Board Layout Recommendations for Suppression of ESD.
Protection of Four Unidirectional Lines
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
l Place the SMFxx near the input terminals or connectors to restrict transient coupling.
l Minimize the path length between the SMSxx and
the protected line.
l Minimize all conductive loops including power and
ground loops.
l The ESD transient return path to ground should be
kept as short as possible.
l Never run critical signals near board edges.
l Use ground planes whenever possible.
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SMF05 & SMF12
PROTECTION PRODUCTS
Typical Applications
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SMF05 & SMF12
PROTECTION PRODUCTS
Outline Drawing - SC70-5L
Land Pattern - SC70-5L
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SMF05 & SMF12
PROTECTION PRODUCTS
Marking Codes
Par t Numbe r
Mar king
Co d e
SMF05
F05
SMF12
F12
Note:
(1) Pin 1 Identified with a dot
Ordering Information
Par t Numbe r
Wo r king
Vo ltage
Qty p e r R e e l
R e e l Size
SMF05.TC
5V
3,000
7 Inch
SMF05.TG
5V
10,000
13 Inch
SMF12.TC
12V
3,000
7 Inch
SMF12.TG
12V
10,000
13 Inch
Contact Information
Semtech Corporation
Protection Products Division
652 Mitchell Rd., Newbury Park, CA 91320
Phone: (805)498-2111 FAX (805)498-3804
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