STMICROELECTRONICS 74ACT02M

74ACT02

QUAD 2-INPUT NOR GATE
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HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V
LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA = 25 oC
COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN), VIL = 0.8V (MAX)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 02
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT02 is an advanced high-speed CMOS
QUAD 2-INPUT NOR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology. It is ideal for low
power applications mantaining high speed
operation similar to equivalent Bipolar Schottky
TTL.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
T UBE
DIP
M74ACT02B
SOP
M74ACT02M
TSSOP
T& R
M74ACT02MTR
M74ACT02TTR
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
May 2000
1/8
74ACT02
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
2, 5, 8, 11
1A to 4A
Data Inputs
NAME AND FUNCT ION
3, 6, 9, 12
1B to 4B
Data Inputs
1, 4, 10, 12
1Y to 4Y
Data Outputs
7
GND
Ground (0V)
14
VCC
Positive Supply Voltage
TRUTH TABLE
A
B
Y
L
L
H
L
H
L
H
L
L
H
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Unit
-0.5 to +7
V
VI
DC Input Voltage
-0.5 to VCC + 0.5
V
VO
DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 50
mA
± 200
mA
VCC
Supply Voltage
Value
ICC or IGND DC VCC or Ground Current
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
-65 to +150
o
300
o
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Unit
Supply Voltage
4.5 to 5.5
V
VI
Input Voltage
0 to VCC
V
VO
Output Voltage
0 to VCC
VCC
Top
dt/dv
Operating Temperature:
Input Rise and Fall Time VCC = 4.5 to 5.5V (note 1)
1) VIN from 0.8 V to 2.0 V
2/8
Value
-40 to +85
8
V
o
C
ns/V
74ACT02
DC SPECIFICATIONS
Symb ol
Parameter
Test Co nditions
VIH
High Level Input Voltage
4.5
VO = 0.1 V or
VCC - 0.1 V
5.5
VIL
Low Level Input Voltage
4.5
High Level Output
Voltage
4.5
V I (* ) =
V IH or
V IL
5.5
Low Level Output
Voltage
Max.
Min.
2.0
2.0
1.5
2.0
Max.
V
1.5
0.8
0.8
1.5
0.8
0.8
IO=-50 µA
4.4
4.49
4.4
IO=-50 µA
5.4
5.49
5.4
V
V
3.86
IO=-24 mA
4.86
4.5
IO=50 µA
0.001
0.1
0.1
IO=50 mA
0.001
0.1
0.1
IO=24 mA
0.36
0.44
IO=24 mA
0.36
0.44
±0.1
±1
µA
1.5
mA
40
µA
(* )
VI =
V IH or
V IL
5.5
5.5
Input Leakage Current
1.5
IO=-24 mA
4.5
II
T yp.
2.0
5.5
4.5
VOL
Un it
-40 to 85 o C
Min.
VO = 0.1 V or
VCC - 0.1 V
5.5
VOH
Valu e
T A = 25 oC
V CC
(V)
5.5
3.76
4.76
VI = VCC or GND
ICCT
Max ICC /Input
5.5
VI = VCC -2.1 V
ICC
Quiescent Supply
Current
5.5
VI = VCC or GND
IOLD
Dynamic Output Current
(note 1, 2)
5.5
VOLD = 1.65 V max
75
mA
VOHD = 3.85 V min
-75
mA
IOHD
0.6
V
4
1) Maximum test duration 2ms, one output loaded attime
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 Ω.
(*) All outputs loaded.
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns)
Symb ol
Parameter
T est Con ditio n
V CC
(V)
tPLH
tPHL
Propagation Delay Time
5.0(*)
Valu e
T A = 25 oC
-40 to 85 o C
Min. T yp. Max. Min. Max.
1.5
5.0
8.0
1.0
9.0
Un it
ns
(*) Voltage range is 5V ± 0.5V
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
Test Co nditions
V CC
(V)
Valu e
T A = 25 oC
-40 to 85 o C
Min.
T yp.
Max.
Min.
Un it
Max.
C IN
Input Capacitance
5.0
4
pF
CPD
Power Dissipation
Capacitance (note 1)
5.0
47
pF
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/n (per circuit)
3/8
74ACT02
TEST CIRCUIT
CL = 50 pF or equivalent (includes jigand probe capacitance)
RL = R1 = 500Ω orequivalent
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
4/8
74ACT02
Plastic DIP-14 MECHANICAL DATA
mm
DIM.
MIN.
a1
0.51
B
1.39
TYP.
inch
MAX.
MIN.
TYP.
MAX.
0.020
1.65
0.055
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
15.24
0.600
F
7.1
0.280
I
5.1
0.201
L
Z
3.3
1.27
0.130
2.54
0.050
0.100
P001A
5/8
74ACT02
SO-14 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
MAX.
0.003
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45 (typ.)
D
8.55
8.75
0.336
0.344
E
5.8
6.2
0.228
0.244
e
1.27
e3
0.050
7.62
0.300
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.68
0.026
8 (max.)
P013G
6/8
74ACT02
TSSOP14 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
A
MAX.
MIN.
TYP.
MAX.
1.1
0.433
A1
0.05
0.10
0.15
0.002
0.004
0.006
A2
0.85
0.9
0.95
0.335
0.354
0.374
b
0.19
0.30
0.0075
0.0118
c
0.09
0.20
0.0035
0.0079
D
4.9
5
5.1
0.193
0.197
0.201
E
6.25
6.4
6.5
0.246
0.252
0.256
E1
4.3
4.4
4.48
0.169
0.173
0.176
e
0.65 BSC
0.0256 BSC
K
0o
4o
8o
0o
4o
8o
L
0.50
0.60
0.70
0.020
0.024
0.028
A
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
7/8
74ACT02
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granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems withoutexpress written approval of STMicroelectronics.
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