74ACT174 HEX D-TYPE FLIP FLOP WITH CLEAR PRELIMINARY DATA ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 200 MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 8 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN), VIL = 0.8V (MAX) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The ACT174 is an high-speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to eqivalent Bipolar Schottky B M (Plastic Package) (Micro Package) ORDER CODES : 74ACT174B 74ACT174M TTL. Information signals applied to D inputs are transfered to the Q output on the positive going edge of the clock pulse. When the CLEAR input is held low, the Q outputs are held low independentelyof the other inputs . The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS May 1997 1/10 74ACT174 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1 CLEAR NAME AND F UNCTIO N 2, 5, 7, 10, 12, 15 Q0 to Q5 Flip-Flop Outpus 3, 4, 6, 11, 13, 14 D0 to D5 Data Inputs 9 CLOCK Clock Input (LOW-to-HIGH, Edge- Triggered) 8 GND Ground (0V) 16 VCC Positive Supply Voltage Asyncronous Master Reset (Active LOW) TRUTH TABLE INPUTS O UTPUTS CL EAR D CLOCK Q X L L X H L L H H H H X Qn X: Don’t Care LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/10 FUNCTION CLEAR NO CHANGE 74ACT174 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 50 mA ± 300 mA ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) -65 to +150 o C 300 o C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol Valu e Unit Supply Voltage 4.5 to 5.5 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC VCC Top dt/dv Parameter Operating Temperature: Input Rise and Fall Time VCC = 4.5 to 5.5V (note 1) -40 to +85 8 V o C ns/V 1) VIN from 0.8 V to 2.0 V 3/10 74ACT174 DC SPECIFICATIONS Symbol Parameter Test Con dition s VIH High Level Input Voltage 4.5 5.5 VIL Low Level Input Voltage 4.5 5.5 VOH High Level Output Voltage 4.5 5.5 4.5 VO = 0.1 V or VCC - 0.1 V (*) VI = V IH or V IL Low Level Output Voltage 4.5 5.5 4.5 5.5 (*) VI = V IH or V IL Unit o -40 to 85 C Min. Typ. 2.0 1.5 2.0 2.0 1.5 2.0 VO = 0.1 V or VCC - 0.1 V 5.5 VOL Value o T A = 25 C V CC (V) Max. Min . Max. V 1.5 0.8 0.8 1.5 0.8 0.8 IO=-50 µA 4.4 4.49 4.4 IO=-50 µA 5.4 5.49 5.4 IO=-24 mA 3.86 3.76 IO=-24 mA 4.86 4.76 V IO=50 µA 0.001 0.1 0.1 IO=50 mA 0.001 0.1 0.1 IO=24 mA 0.36 0.44 IO=24 mA 0.36 0.44 ±0.1 V V ±1 µA 1.5 mA Input Leakage Current 5.5 VI = VCC or GND ICCT Max ICC /Input 5.5 VI = VCC -2.1 V ICC Quiescent Supply Current 5.5 VI = VCC or GND 80 µA IOLD Dynamic Output Current (note 1, 2) 5.5 VOLD = 1.65 V max 75 mA VOHD = 3.85 V min -75 mA II IOHD 1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 Ω. (*) All outputs loaded. 4/10 0.6 8 74ACT174 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = t f =3 ns) Symbol Parameter T est Cond ition tPLH tPHL Propagation Delay Time CK to Q 5.0(*) tPLH tPHL Propagation Delay Time CLR to Q 5.0(*) twL CLR pulse Width, LOW 5.0 tw CK pulse Width 5.0 ts Setup Time Q to CK HIGH or LOW 5.0 th tREM fMAX Hold Time Q to CK HIGH or LOW Recovery Time CLR to CK Maximum Clock Frequency Value Unit o o -40 to 85 C T A = 25 C Min. Typ. Max. Min . Max. 1.5 7.0 10.5 11.5 V CC (V) 1.5 ns 6.5 9.5 11.0 (*) 1.5 3.0 3.5 ns (*) 1.5 3.0 3.5 ns (*) 0.5 1.5 1.5 1.0 2.0 2.0 -1.0 0.5 0.5 (*) 5.0 (*) 5.0 (*) 5.0 165 200 140 ns ns ns ns MHz (*) Voltage range is 5V ± 0.5V CAPACITIVE CHARACTERISTICS Symbol Parameter Test Con dition s T A = 25 C V CC (V) CIN Input Capacitance 5.0 C PD Power Dissipation Capacitance (note 1) 5.0 Value o Min. fIN = 10 MHz Typ. Max. Unit o -40 to 85 C Min . Max. 4 pF TBD pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN +ICC/n (per circuit) 5/10 74ACT174 TEST CIRCUIT CL = 50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT =ZOUT of pulse generator (typically 50Ω) WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 6/10 74ACT174 WAVEFORM 2: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 3: RECOVERY TIME (f=1MHz; 50% duty cycle) 7/10 74ACT174 Plastic DIP-16 (0.25) MECHANICAL DATA mm DIM. MIN. a1 0.51 B 0.77 TYP. inch MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 8/10 74ACT174 SO-16 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.004 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 9.8 E 5.8 10 0.385 6.2 0.228 0.393 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8 (max.) P013H 9/10 74ACT174 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1997 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A . 10/10