L584 MULTIFUNCTION INJECTION INTERFACE . . .. .. .. PRELIMINARY DATA DRIVES ONE OR TWO EXTERNAL DARLINGTONS DUAL AND SINGLE LEVEL CURRENT CONTROL SWITCHMODE CURRENT REGULATION ADJUSTABLE HIGH LEVEL CURRENT DURATION WIDE SUPPLY RANGE (4.75 - 46V) TTL-COMPATIBLE LOGIC INPUTS THERMAL PROTECTION DUMP PROTECTION DIP16 (12 + 2 + 2) ORDERING NUMBER : L584 DESCRIPTION The L584 is designed to drive injector solenoids in electronic fuel injection systems and generally inductive loads for automotive applications. The device is controlled by two logic inputs and features switchmode regulation of the load current driving an external darlington and an auxiliary one for the current recirculation. A key feature of the L584 is flexibility. It can be used with a variety of darlingtons to match the requirements of the load and it allows both simple and two level current control. Moreover, the drive waveshape can be adjusted by external components. Other features of the device include dump protection, thermal shutdown, a supply voltage rangeof 4.75 - 46V and TTL-compatible inputs. The L584 is suppliedin a 16 lead Powerdip package which uses the four center pins to conduct heat to the PC board copper. BLOCK DIAGRAM November 1988 1/13 L584 PIN CONNECTION ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value DC Supply Voltage (pin 1 open) Positive Transient Voltage (pin 1 connected to VS, πf fall time constant = 100ms) (5ms ≤ trise ≤ 10ms, R source ≥ 0.5Ω) – 0.2V min; +50V Max V1 Input Voltage (pins 10, 11) – 0.2V min; +7V Max Vr External Reference Voltage (pin 2) – 0.2V min; +7V Max Sense Voltage (pin 3) – 0.2V min; +7V Max VS Vsens V8 Max D.C. and Transient Voltage Ir Reference Current (pin 9) Tstg, Tj +60V Max 50V 5mA Max Storage and Junction Temperature Range –55 to 150°C THERMAL DATA Symbol Parameter Value Unit Rth j-pins Thermal Resistance Junction-pins Max. 15 °C/W Rth j-amb Thermal Resistance Junction-ambient Max. 80 °C/W * Obtained with the GND pins soldered to printed circuit with minimized copper area. 2/13 L584 PIN FUNCTIONS No Name Functions 1 Dump Protection With pin 1 connected to pin 14 the device is protected against dump voltage ≤ 60V. The protectio.n operates at VS ≥ 32V (typ.). If this protection is not used the pin must be left open 2 Holding Current Control 3 Sensing Connection for load current sense resistor. Vazlue sets the peak and holding current levels. I P = 0.45/RS (typ.); Ih = Vset/Rs. (see block diagram and fig. 4). 4 Ground Ground Connection. With pins 5, 12 and 13 conducts heat to pc board copper. 5 Ground See pin 4. 6 Peak Current Timer 7 The voltage Vset applied to this pin sets the holding current level. A capacitor connected between this pin and ground sets the duration of the high level current (t2 in fig. 4) Discharge Time Constant A capacitor connected between this pin and ground sets the duration of toff (fig. 4). If grounded, the current switchmode control is suppressed. 8 PNP Driving Output Current sink for external PNP darlington (for recirculation). Idp = 35 Ir (typ). 9 Reference Voltage A resistor connected between this pin and ground sets the internal current reference, Ir. The recommended value is 1.2kΩ giving Ir = 1mA (typ.). 10 Input TTL-compatible Input. A high level on this pin activates the output, driving the load. 11 Inhibit TTL-compatible Inhibit Input. A high level on this input disables the output stages and logic circutry, irrespective of the state of pin 10. 12, 13 Ground 14 Supply Voltage 15 NPN Driving Output 16 Internal Clamping See Pin 4. Supply Voltage Input. Current Source for External NPN Darlington (load driver).Idn = 100 Ir (typ.) Internal Clamp Zener for Fast Turn-off. 000 3/13 L584 ELECTRICAL CHARACTERISTICS (Vs (Pin 14) = 14.4V; –40 ≤ Tj ≤ 105°C; Rref = 1.20KΩ unless otherwise specified; refer to fig. 1) Symbol Max. Unit VS Operating Supply Voltage Parameter Pin 1 Open Test Condiction Min. 4.75 Typ. 44 V Vd Dump Protection Threshold Pin 1 = VS 28 36 V Rd Dump Protection Input Resistance Pin 1 to GND 18 50 kΩ Iq Quiescent Current Pin 14 45 mA Vi Input Threshold Voltages Pin 10, 11 Low High 0.8 V V Ii Input Current 2.0 Pin 10, 11 Low High –100 –250 µA µA Vr Reference Voltage Pin 9 1.15 1.35 V Rr Reference Resistor Range Pin 9 to GND Ir = V r/Rr 1 3.3 kΩ I6 Peak Duration Control Current Pin 6 Vpin 6 ≤ 1.8V Ir/9.50 Ir/6.00 A Peak Duration Control Comparator Threshold Pin 6 1.6 V Pin 6 Saturation Voltage Pin 6 (discharge state) 200 mV Off Duration Control Current Pin 7 Vpin 7 ≤ 1.8V Off Duration Control Comparator Threshold Pin 7 Pin 7 Saturation Voltage Pin 7 (discharge state) Vspt Peak Current Threshold Voltage Pin 3 Vset Holding Current Set Voltage Range Pin 2 Vset V6th V6SAT I7 V7th V7SAT 4/13 | | 1.20 (Ir min)/9.50 | (Ir max)/6.00 | 1.6 V 200 mV 400 500 mV 0 2 V Holding Current Set Voltage Range Pin 3, Peak Value, dV/dt ≤ 1V/s Vset – 0.01 Vset + 0.01 V –200 I3 Pin 3 Bias Current Vcl Recirculation Voltage Idn NPN Driver Source Current Vpin 15 = 0V Idp PNP Driver Sink Current Vpin 8 ≥ 4.75V Zener Vpin 3 = 600mV Clamping Pin 16 to Pin 15 @ 200mA into Pin16 1.20 A µA 13.5 70 x Ir 25 x Ir 18.5 V | 140 x Ir A | 60 x Ir A L584 APPLICATION INFORMATION Controlled by a logic input and an inhibit input (both TTL compatible), the device drives the external darlington(s) to produce a load current waveform as shown in figure 4. This basic waveform shows that the device produces an initial high level current in order to ensure a fast opening, followed by a holding level current as long as the input is active. Both the peak and holding current are regulated by the L584’s switchmode circuitry. The duration of the high level current and the values of the peak and the holding currents can be adjusted by external components. Moreover, by omitting C1, C2 or both it is possible to realize single-level current control, a transitory peak followed by a regulated holding current or a simple peak (figure 1). The peak and holding current values are always re- Figure 1 : Components Connected to Pins 6 and 7 Determine the Load Current Waveshape. COMPONENTS ON PINS 6 AND 7 LOAD CURRENT WAVEFORM 5/13 L584 ferred, in the following formula, to IE, emitter current of the external darlington Q2, IE = ILOAD + Idn because the sensing detection is on the darlington emitter (not directly on the load). The peak current level I p, is set by the sensing resistor, Rs, and is found from : Ip = 0.45 / Rs (typ) The peak value of holding current level, Ih, is set by a voltage (Vset) applied to pin 2, giving : Ihp = Vsetth / Rs = (Vset ± 10mV)/Rs The peak to hold current ratio is fixed by Vset : Ip / I hp = 0.45 / Vsetth Vset is fixed by an external reference and a voltage divider (Vext, R1, R2 in fig 2) : Vset = Vext * R2 / (R1 + R2) Due to the particular darlington storage time and the device reaction time not very significant differences can be found between Ip and Ih values based on the previous formula and the real values seen in the applications. If the holding current function is not used, pin 2 cannot be left floatingand it must be connectedto GND. Figure 2 : Application Circuit Showing the Optional Components. In particular it illustrates how the holding current level is adjusted independentlyof the peak current (with R1, R2, Vext) and how the internal zener clamp is connected. This circuit produces the waveforms shown in Fig. 4. Io (A) Q1 Q2 4 BDX54 BDX53 8 BDW94 BDW93 12 BDV64 BDV65 Figure 3 : P.C. Board and Components Layout of the Circuit of Fig. 2 (1 : 1 scale). 6/13 L584 The drive current for the two darlingtons and the waveform time constants are all defined in turn by a resistor between pin 9 and ground. The recommended value for Ir is 1mA which is obtained with a 1.2KΩ resistor. The darlington drive currents are given by : PNP : Idp = 35 Ir typ. NPN : Idn = 100 Ir typ. The duration of the high current level (t2 in fig 4) is set by a capacitor connected between pin 6 and ground. This capacitor, C1 is related to the duration, t2, by : C1 V6th – V6sat t2 = C1 = 12 (typ.) Iref I6 The discharge time constant (toff in fig 4) is set by a capacitor C2 between pin 7 and ground and is found from : Cr V7th – V7sat (typ) toff = C2 ⋅ = 12 Iref I7 Figure 4 : Waveforms of the Typical Application Circuit of Fig. 2. 7/13 L584 Figure 5 : When pin 6 is grounded, as shown here, the injector current is regulated at a single level. Io (A) Q1 Q2 4 BDX54 BDX53 8 BDW94 BDW93 10 BDV64 BDV65 Figure 6 : In this application circuit, pin 6 is left open to give a single peak followed by a regulated holding current. Io (A) 8/13 Q1 Q2 4 BDX54 BDX53 8 BDW94 BDW93 10 BDV64 BDV65 L584 Figure 7 : Switchmode control of the current can be suppressed entirely by leaving pin 6 open and grounding pin 7. the peak current is still controlled. Io (A) Q1 Q2 4 BDX54 BDX53 8 BDW94 BDW93 10 BDV64 BDV65 Figure 8 : Applications circuit using only one darlington with a single level of the injector current. 9/13 L584 To have a very short off time when the L584 input goes LOW, an internal zener is available on pin 16. This zener is used with an external divider, R8, R9, as shown in figure 2. Suitable values can be found from : Vpin 16 ≅ 15V + VBEQ2 + VRsense R9 + R8 VCQ2 ≅ Vpin 16 . R8 (VCQ2 is the voltage at the collector of Q2. VCQ2 max is 47V if the pin 8 is used for slow recirculation as in fig. 2). To ensure stability, a small capacitor (about 200pF) must be connected between the base and collector of Q2 when pin 16 is used. A different opportunityfor a fast off time is based on the use of the external zener diode Dz. In this case also the maximum Dz voltage value is 47V. LOAD DUMP PROTECTION To protect the device against the positive load dump it is necessary to connect pin 1 to VS. In this case, if VS is higher than 32V, the device turns off Q2 and turns on Q1. The external resistor R6 must be used (see application circuit) to avoid that pin 8 voltage exceeds 50V during load dump. R6 must be : VDUMP – V8 R6 > Idp where VDUMP is the dump voltage value and V8 : 4.75V < V8 < 47V. For this R6 value, the minimum supply voltage VSmin guaranteeing Q1 operation is given by : 10/13 VBEQ1 Ip + V8sat VSmin = R6 (+2) R5 BQ1 In relation to VSmin it is no more verified Idp = 35 Iref (typ) even if the system correct operation is completely guaranteed. The L584 application circuit suggested in these notes allows the use of inductive loads with the lowest possible series resistance (compatible with constructional requirements) and therefore reduces notably the power dissipation. For example, an electronic injector driven from 14.4V which draws 2.4A has a series resistance of 6Ω and dissipates 34.56W. Using this circuit a injector with a 1Ω series resistance can be used and the power dissipation is : 2 2 Pd = RLIL + VDIL (1 – σ) + Vsat ⋅ IL σ + RS IL σ where RL = resistance of injector = 1Ω VD = drop across diode, VD ≅ 1V Vsat = saturation voltage of Q2, ≅ 1V RS = R11 = 185mΩ σ = duty cycle = 20% therefore : Pd ≅ 5.76 + 1.92 + 0.48 + 0.21 = 8.37W This given two advantages : the size (and cost) of the injector is reduced and the drive current is reduced from 2.4A to about 0.4A. The applicationcircuit of figure 9 isvery similar to figure 2 except that it shows the use of two supplies : one for the control circuit, one for the power stage. L584 Figure 9 : Application circuit showing how two separate supplies can be used. In this application it is assumed that the 5V supply for L584 is taken from a logic supply, which is already protected, against load dump transients and vol-tage reversal. Pin 1 must be left open, as shown in fig. 9, if VS is L lower than 46V even during the voltage tranalways R sients. Note that toff is also related to the required current ripple ∆I on the peak or on the holding current level by : (Io – ∆I) RL + Voff toff = – ln Io RL + Voff Where : Io is the initial current valuein OFF condition (equal to Ip or IH in accordance to the current level considered), VOFF = VDIODE + VCEQ1 RL is the series resistance value of the inductance L : Therefore C2 can be dimensioned directly by : ln (Io – ∆I) RL + VOFF IREF L Io RL + VOFF 12 RL Note that toff is the same for both the peak and holding current. ton time is given by : L Von – R(I1 – ∆I) ton = ln R Von – RI1 where : I1 is the final current value in ON condition (equal to Ip or IH in accordance to the current level considered), R = RL + RSENSE Von = VS – VCEsatQ2 If the constant times are respectively L L > 20 toff and > 20 ton R R it is possible to consider a purely inductive load and therefore : ∆I ∆I toff = L ; ton = L Vo Von C2 = 11/13 L584 DIP16 PACKAGE MECHANICAL DATA mm DIM. MIN. a1 0.51 B 0.77 TYP. MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 12/13 inch 3.3 0.130 1.27 0.050 L584 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A. 13/13