L9468 ALL SILICON VOLTAGE REGULATOR 1 Figure 1. Package Features ■ FULLY MONOLITHIC DESIGN ■ HIGH SIDE FIELD DRIVE ■ THERMAL PROTECTION ■ FIELD DRIVER SHORT CIRCUIT PROTECTION ■ PROTECTED DIAGNOSTIC LAMP DRIVER ■ REDUCED OUTPUT MODE ■ COMPLEX DIAGNOSTICS ■ LOAD RESPONSE CONTROL 2 Multiwatt8 Table 1. Order Codes Part Number Package L9468N Multiwatt8 plications. Description The L9468 is a monolithic multifunction generator Voltage regulator intended for use in automotive ap- This device regulates the output of an automotive generator by controlling the field winding current by means of a variable frequency PWM high side driver. Figure 2. Block Diagram S L TO ECM FAULT LAMP KEY SW VGO FM STARTER ASVR F+ BATTERY P LOADS STATOR FIELD (ROTOR) G RECTIFIER BRIDGE D02AT503 April 2005 Rev. 1 1/8 L9468 Table 2. Pin Description N° Pin Function 1 VGO Generator output sense and voltage supply to L9468 2 F+ Field high side driver output 3 G Ground for L9468 4 S Battery sense input 5 GND 6 FM 7 L Lamp terminal low side driver 8 P Phase sense input Connected to the Tab through the frame Field monitor output Table 3. Absolute Maximum Ratings Symbol Parameter Value Unit 40 V internally limited A 6 W -2.5/-6 V Value Unit Thermal Resistance junction-case -45 to 160 °C Tstg Storage Temperature -50 to 175 °C Rth sd Thermal Shut-Down 175 ±15 °C 1.5 °C/W VS Thermal Supply Voltage (load dump) IO Output Current Capability Ptot Total Power Dissipation (@Tcase = 150°C, IFIELD = 5A) VR Reverse Voltage (see figure 1) Figure 3. Pin Connection (Top view) 8 P 7 L 6 FM 5 GND 4 S 3 G 2 F+ 1 VGO Tab connected to pin 5 D02AT504 Table 4. Thermal Data Symbol Rth j-case Rth j-case 2/8 Parameter Thermal Resistance junction -case L9468 Table 5. Electrical Characteristcs (Tcase = -35°C to 150°C unless otherwise specified) Symbol Parameter Test Condition Min. VOS Operating Supply Voltage Tcase = +25 to +150 °C 8 VOS Operating Supply Voltage Tcase = - 40 to +25 °C 10 ISB Stand-by Current VGO = 12.6V, Tcase -35 to +80 °C ISB Stand-by Current VGO = 12.6 V, 80°C <Tcase< +150°C VS Regulator Set-Point @ 71°C ± 3°C VNB Generator output, no battery No battery, IOUT =2A to 50% Max Load TC Thermal compensation Voltage @ VS or VGO 2 in failsoft Typ. Max. 20 1 V 20 V 400 µA 1 mA VS+2 V 14.1 VS-2 Unit V V VLR Load Regulation 6500 grpm, 10% to 95% load 300 mV VSR Speed Regulation 15A load, 2,000 to 10,000 grpm 100 mV VFON Output Saturation Voltage IF = 6A, VGO = 14.7V, Tcase = 25°C 750 mV VFON Output Saturation Voltage IF = 5A, VGO = 13.5V, Tcase = 125°C 850 mV IFLIM Field limit current F terminal shorted to GND @ 25°C 8.3 A F terminal shorted to GND @ 150°C 5 A VF Field Discharge Rectifier IF = 6A, Tcase = 25°C IR Diode Reverse Current VR = 20V Oscillation frequency During LRC operation fOSC MFDC RFM 340 Minimum Field Duty-Cycle VUV < V(S or VGO) < VOV Impedance @ FM pin Impedance between FM and F+ 400 1.85 V 1 mA 460 Hz 6.25 3 5 % 15 KΩ Notes: 1. 20 Volts is the maximum operating voltage because above this level the FAILSAFE feature shuts down the output stage. 2. Thermal slopes are shown in fig. 2 3. This value is present when the voltage sensed at the " S" or "VGO" terminal is between VUV and VOV. When the voltage sensed at the "S" or "VGO" terminal is above VOV the Minimum Field Duty-Cycle will be 0 %. Figure 4. Reverse B+ Test Circuit + POWER SUPPLY 6V INCANDESCENT LOAD 14Ω - I + VGO L S POWER SUPPLY 2.5V - P ASVR FM F 1.8Ω FIELD G D02AT505 3/8 L9468 Figure 5. Setpoint Voltage vs. Tcase Temperature VS (V) 15.8 15.6 15.4 D02AT506 15.9 15.45 15.2 15 15.0 15.05 14 .8 14.8 14.6 14.4 14.55 14.35 14.2 14.1 14.0 13.8 14 13.65 13.85 13.6 13.4 13.2 13.0 13.35 -40 -20 0 20 40 60 80 100 120 Tcase(˚C) Table 6. Diagnostic (Tcase -35°C to +150°C unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit 21 V VFSO Failsafe Output Voltage Voltage measured at VGO 20 20.48 VFSL Switch sensing from S to VGO "S" Voltage falling into Fail Soft 4 4 4.2 VFSH Switch sensing from VGO to S "S" Voltage rising out of Fail Soft Sink current @ "S" pin VS = 14 V VUV Undervoltage grpm > 3100 ± 15% VOV Overvoltage IS V 7.6 8 V 1 1.75 2.5 mA 10.95 11.35 11.6 V VS+1 VS+1.25 VS+1.55 V VLSAT Lamp saturation voltage IL = 0.5A 1.33 1.4 V VLSAT Lamp on Voltage 5 IL < 0.5A,VGO=open, Tcase = 25°C 3.8 5 V TDELAY Fault Indication Delay Time 1.1 1.265 s 0.935 Notes: 4. When Fail Soft operation is detected, regulation sensing will switch from the "S" terminal to the VGO terminal. 5. This condition can happen when the connection between the battery and VGO or the output terminal of the generator is broken. In this case the delay of 1.1 seconds is not required. 4/8 L9468 3 FAULT The following table lists the conditions that cause the fault lamp driver to function. To prevent lamp flicker, specific faults are required to be present for TDELAY seconds before the lamp driver is activated. This delay is indicated in the table. Table 7. Conditions Delay 1. Key-on (wiring check), lamp stays on for 1 ± 0.15 sec regardless other conditions No 2. VGO / S> VOV Yes 3. VGO / S < undervoltage threshold voltage AND Phase frequency > fLRC Yes 4. Phase Voltage < VP2 AND VGO / S < setpoint Yes 5. Phase frequency < fIFR Yes 6. No connection between Battery and VGO No 7. FAILSAFE Yes Table 8. Regulation Features Symbol Parameter VLON Lamp term turn on threshold 6 ILON Lamp term current sensitivity VL = 1 V to Vsp 0.09 VP1 Initiation of regulation detection phase voltage threshold 7 IP = 1mA (sinking current) 2.5 VP2 Fault detection phase voltage threshold 8 IP Sinking current @ P terminal fIFR FSDF Test Condition VP = 1.5V Initiation of field regulation frequency Field Strobe Duty Factor LRC Load Response Control rate 9 fLRC LRC transition frequency VLCB "L" term. Cut-Back Setpoint Min. Typ. Max. Unit 0.8 1 1.15 V 0.78 mA 3 3.5 V 7 8 9 V 0.5 1 1.8 mA 53.04 61 70.15 Hz @ "power up" with fPHASE < fIFR 31.25 % 2.125 2.5 2.875 s LRC is enabled below this value 263.5 310 356.5 Hz "L" = 0V, "I" = 0V 10 V S20% V S25% VS-30% V Notes: 6. Lamp and Ignition are cooperative. Either can turn on the device when the other is left open or held low. When both go below their minimum thresholds the L9468 goes into "L" Terminal Control (LTC). The L9468 will remain in LTC until the phase (P) voltage drops below VP2 and the frequency drops below fIRF at the VP1 threshold then the L9468 is disabled. 7. This threshold on the phase signal is used to detect the phase frequency, fIFR, for the Initiation of field regulation. 8. This threshold on the phase signal is used to sense the presence of the phase for fault detection purposes. 9. This is the time duration the L9468 takes to rump up from 0 % to 100% duty cycle in response to an increased load on the enerator. The LRC ratio is set 1:4 and the Vreg comparator status is latched at foundamental frequency rate. 10. Cut-back occurs when both the "L" and "I" terminals are LOW . If the "I" terminal is disconnected it will assume a logic LOW allowing the "L" terminal to perform the function alone. In cut-back, to prevent the loss of phase signal, a 31.25% duty cycle is applied to field output when phase drops below Vp2 5/8 L9468 4 Package Information Figure 6. Multiwatt 8 Mechanical Data & Package Dimensions DIM. mm MIN. TYP. inch MAX. MIN. TYP. MAX. A 5 0.197 B 2.65 0.104 C 1.6 0.063 E 0.49 0.55 0.019 0.022 F 0.78 0.85 0.030 0.033 F1 0.68 0.75 0.027 G 2.40 2.54 2.68 0.094 0.10 0.105 G1 17.64 17.78 17.92 0.69 0.70 0.71 H1 19.6 0.029 0.772 H2 20.2 L 20.35 L2 17.05 L3 OUTLINE AND MECHANICAL DATA 0.795 20.65 0.80 17.20 17.35 0.67 0.68 0.81 0.68 17.25 17.5 17.75 0.679 0.689 0.699 L4 10.3 10.7 10.9 0.406 0.421 0.429 L5 15.45 15.75 0.61 L5* 15.05 15.35 0.59 0.60 L7 2.65 2.9 0.104 0.114 0.62 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 U 0.40 0.55 0.015 0.022 Z 0.70 0.85 0.028 0.034 Dia1 3.65 3.85 0.144 0.152 Multiwatt8 (Floating) * L5 = with wedged frame std. L5* = with wedged frame anchor holes. 0043674 F 6/8 L9468 5 Revision History Table 9. Revision History Date Revision April 2005 1 Description of Changes First Issue 7/8 L9468 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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