L9610C L9611C PWM POWER MOS CONTROLLER . .. .. HIGH EFFICIENCY DUE TO PWM CONTROL AND POWERMOS DRIVER LOAD DUMP PROTECTION LOAD POWER LIMITATION EXTERNAL POWERMOS PROTECTION LIMITED OUTPUT VOLTAGE SLEW RATE DESCRIPTION The L9610C/11C is a monolithic integrated circuit working in PWM mode as controller of an external powerMOS transistor in High Side Driver configuration. Features of the device include controlled slope of the leading and trailing edge of the gate driving voltage, linear current limiting with protection timer, settable switching frequencyfo, TTL compatible enable function, protection status ouput pin. The device is mounted in SO16 micropackage, and DIP16 package. SO16 DIP 16 ORDERING NUMBERS: L9610C L9611C BLOCK DIAGRAM November 1991 This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/9 L9610C - L9611C ABSOLUTE MAXIMUM RATINGS Symbol VS Parameter Value Unit 26 V Load Dump: 5ms ≤ trise ≤ 10ms; τf Fall Time Constant = 100ms; RSOURCE ≥ 0.5Ω 60 V Field Decay: 5ms ≤ tfall ≤ 10ms; τr Rise Time Constant = 33ms; RSOURCE ≥ 10Ω –80 V Low Energy Spike: trise =1µs, tfall = 2ms, RSOURCE ≥ 10Ω ±100 V Max. Supply Voltage Transient Peak Supply Voltage (R1 ≥ 100Ω): IS Max. Supply Current (t < 300 ms) VIN Input Voltage TJ/Tstg 0.3 A –0.3 < VIN < VS – 2.5 V – 55 to 150 °C Junction and Storage Temperature Range THERMAL DATA Symbol Rth j-amb Parameter Thermal Resistance Junction-alumina PIN CONNECTION (Top view) 2/12 Max SO16 DIP16 Value 50 90 °C/W L9610C - L9611C PIN FUNCTIONS Pin Name 1 INT A Capacitor Connected Between this Pin and OutG Defines the GATE Voltage Slew Rate. Functions 2 IN Analog Input Controlling the PWM Ratio. The operating range of the input voltage is 0 to VR. Output of an Internal Voltage Reference 3 VR 4 EN 5 PWL If this Pin is Connected to GND and V S > 13 V, the Duty Cycle and the Frequency fo are Reduced : this Allows to Transfer a Costant Power to the Load. 6 Osc Current Sink and Source Stage Connection of a Triangle Oscillator with Definite Voltage Swing. 7 IND Input of an Operational Amplifier for Short Current Sensing and Regulation. 8 NC Not Connected. 9 VS Common Supply Voltage Input 10 GND Common Ground Connection 11 TIM A Capacitor Connected Between this Pin and GND Defines the Protection Delay Time. Open Collector Monitoring Output off the PowerMOS Protection. 12 MON 13,15 P2, P1 14 BS 16 Out G TTL Compatible Input for Switching off the Output. Connection for the Charge Pump Capacitor. The Capacitor Connected Between thisPin and theSource of the Power MOS Allows to Bootstrap the Gate Driving Voltage. Output for Driving the Gate of the External PowerMOS. 3/12 L9610C - L9611C ELECTRICAL CHARACTERISITCS (Tamb = – 40 °C to 85 °C ; 6 V < VS < 16 V unless otherwise specified) Symbol Parameter VS Operating Supply Voltage Iq Quiescent Current Test Conditions Min. Typ. 6 Unit 16 V 2.5 6 mA V VSC Internal Supply Voltage Clamp 28 32 36 VSH Supply Voltage High Threshold 16 18.5 21 V VSL Supply Voltage Low Threshold 4 5 6 V VR Reference Voltage 3.3 3.5 3.7 V IR Reference Current 1 mA 0.13 0.15 0.2 VIN /VR VINL IS = 200mA Max. ∆VR ≤ 100mV Input Low Threshold KF Oscillator Freq. Constant Note 1 800 KS Gate Voltage Slew Rate Constant Note 2 3 KT Protection Time Delay Constant Note 3 0.12 VSi Sense Input Volt. 80 VGON Gate Driving Volt. above VS VS = 16V VGOFF Gate Voltage in OFF Condition IG = 100 µA IIN Input Current VENL Low Enable Voltage VENH High Enable Voltage IEN Enable Input Current SR Slew Rate Without CS Saturation Voltage (pin 12) IMON = VMONsat 100 8 –5 2500 nF/s 9 nFV/ms 0.44 ms/nF 120 mV 5 16 V 1.2 V µA –1 0.8 2.0 V V 2 0.5 V/µs 1.5 2.5 mA µA V Notes : 1. fo = KF/CF. 2. dVG/dt = Ks/Cs. 3. tprot = KT CT. FUNCTIONAL DESCRIPTION PULSE WIDTH COMPARATOR A ground compatible comparator generates the PWM signal which controls the gate of the external powerMOS. The slopes of the leading and trailing edges of the gate driving signal are defined by the external capacitor CS according to : dVG/dt = KS/CS This feature allows to optimize the switching speed for the power and RFI performance best suited for the application. The lower limit of the duty cycle is fixed at 15 % of the ratio between the input and the reference voltage (see fig. 1). Input voltages lower than this value disable the internal oscillator signal and therefore the gate driver. 4/12 GROUND COMPATIBLE TRIANGLE OSCILLATOR The triangle oscillator provides the switching frequency fo set by the external capacitorCF according to : fo = KF/CF If the pin PWL (power limitation) is connected to ground and Vs is higher than the PWL threshold voltage, the duty cycle and the fo frequency are reduced : this allows to transfer a costant power to the load (see fig. 2). TIMER AND PROTECTION LATCH When an overcurrent occurs, the device starts charging the external capacitor CT ; the protection time is set according to : tprot = KT . CT L9610C - L9611C After the overcurrent protection time is reached, the powerMOS is switched-off ; this condition is latched by setting an internal flip-flop and is externallymonitored by the low state of the MON pin. To resetthe latch the supply voltage hasto fall below VSL or the device must be switched off. UNDER AND OVERVOLTAGE SENSE WITH LOAD DUMP PROTECTION The undervoltage detection feature resets the timer and switches off the output driving signal when the supply voltage is less than VSL. If the supply voltage exceeds the max operating supply voltage value, an internal comparator disables the charge pump, the oscillator and the external powerMOS. In both cases the thresholds are provided with suitable hysteresis values. The load dump protection function allows the device to withstand - for a limited time - high overvoltages. It consists of an active clamping diode which limits the circuit supply voltage to VCLAMP and an external current limiting resistor R1. The maximum pulse supply current (see abs. max. ratings is equal to 0.3A. Therefore the maximum load dump voltage is given by : VDUMP = VSC + 0.3R1 In this condition the gate of the powerMOS is held at the GND pin potential and thus the load voltage is : VL = Vs - VCLAMP - VGS Figure 1 : Typical Transfer Curve. 5/12 L9610C - L9611C Figure 2 : The Typical Waveforms for the Power Limitation Function. SHORT CIRCUIT CURRENT REGULATION The maximum load current in the short circuit condition can be chosen by the value of the current sensing resistor RS according to : ISC = VSI/RS Two identical VS compatible comparators are provided to realize the short circuit protection. After reaching the lower threshold voltage (typical value VSI-10 mV), the first comparator enables the timer and the gate is driven with the full continuous pump voltage : when the upper threshold voltage value is reached the second comparator maintains the chosen ISC driving the NMOS gate in continuous mode. This function - showed in fig. 3 - speeds up the switch on phase for a lamp as a load. BANDGAP VOLTAGE REFERENCE The circuit provides a reference voltage which may 6/12 be used as control input voltage through a resistive divider. This reference is protectedagainst the short circuit current. CHARGE PUMP The charge pump circuit holds the N-MOS gate above the supply voltage during the ON phase. This circuit consists of an RC astable which drives a comparator with a push-pull output stage. The external charge pump capacitor CP must be at least equal to the NMOS parasitic input capacitance. For fast gate voltage variation CP must be increased or the bootstrapfunction can be used. The bootstrap capacitor should be at least 10 times greater than the powerMOS parasitic capacitance. The charge pump voltage VPUMP can reach to : VPUMP = 2 VS - VBE - VCESAT The circuit is disabled if the supply voltage is higher than VSH. L9610C - L9611C Figure 3 : The Typical Waveforms for Short Circuit Current Condition. 7/12 L9610C - L9611C APPLICATION CIRCUIT Figure 4. Note : All node voltages are referred to ground pin (GND) The currents flowing in the arrow direction are assumed positive without CBS : CP = 1nF without CBS : CBS must be at least 10 times higher than the gate capacitance : CP = 100 pF. CONTROLLING A 120W HALOGEN LAMP WITH THE L9610C/11C DIMMER The L9610C/11C Lamp Dimmer is used to control the brightness of vehicle headlamps using H4 type lamps (see fig. 5). With switch S1 open the full supply voltage is applied to the lamps : closing the 8/12 switch it is a possible to reduce the average lamp voltage as desired : R3 VL = VS R2 + R3 If pin 5 is connected to ground the average lamp voltage is constant, even for supply voltages in excess of 13 V. L9610C - L9611C Figure 5 : Application Circuit. The sensing resistor RS and timing capacitor Ct should be dimensioned according to : VSi RS = 2Inom (@Vs=14 V) Ct = 2 x limitation time KT In normal conditions (VCC = 14 V, maximum brightness) the voltage drop across the sense resistor must be 50 mV. The current limiter intervenes attwice the nominal current, Inom. The timing capacitor Ct (Vct =3.5 V) must be chosen so that the delay before intervention is twice the duration of the current limitation at power-on. The optimal value of the oscillator frequency, taking tolerances into account, must be slightly higher than the frequency at which lamp flicker is noticable (min 60 Hz). The switching times are a compromise between possible EMI and switching power losses. The recommended value for Cs is 47pF. 9/12 L9610C - L9611C DIP16 PACKAGE MECHANICAL DATA mm DIM. MIN. a1 0.51 B 0.77 TYP. MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 10/12 inch 3.3 0.130 1.27 0.050 L9610C - L9611C mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.069 0.25 a2 MAX. 0.004 0.009 1.6 0.063 b 0.35 0.46 0.014 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.020 c1 45 (typ.) D 9.8 10 0.386 0.394 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.150 0.157 L 0.4 1.27 0.016 0.050 M S 0.62 0.024 8 (max.) 11/12 L9610C - L9611C Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A. 12/12